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41 Commits (463186e8565c717049fabd4ff1c2442053c8ba9a)

Author SHA1 Message Date
Andrew Kelley 463186e856 stage2: wire up -Dskip-non-native 
The purpose of this is to save time in the edit-compile-test cycle when
working on stage2 code.
 2020-12-02 14:52:56 -07:00
joachimschmidt557 2ad2636588
stage2 ARM: use strb + implement genBoolOp 2020-11-28 18:19:22 +01:00
joachimschmidt557 f06f0ebcda
stage2 ARM: Implement genNot 2020-11-28 18:19:22 +01:00
joachimschmidt557 85a3991a43
stage2 codegen: use switch in genBoolOp 2020-11-28 18:19:22 +01:00
joachimschmidt557 27c5c97f21
stage2 ARM: genAdd, genSub for simple cases 2020-11-28 18:19:19 +01:00
Jakub Konka 5ed76268c9 stage2 macho: apply more review comments 2020-11-27 20:55:34 +01:00
Jakub Konka 02baaac506
Update src/codegen.zig 
Co-authored-by: Andrew Kelley <andrew@ziglang.org>
 2020-11-27 20:31:26 +01:00
Jakub Konka 64eae8f392 stage2 macho: move PIE fixups to link file; fix tests 2020-11-26 11:50:09 +01:00
Jakub Konka c749b78df5 stage2 macho: add orr and orn instructions 2020-11-26 11:50:09 +01:00
Jakub Konka 10942e3f86 stage2 macho: Hello, Silicon! 2020-11-26 11:50:09 +01:00
Jakub Konka 2cd84b1b3f stage2 macho: refactor PIE generation on x86_64 2020-11-26 11:50:09 +01:00
Jakub Konka ef5132c508 stage2 macho: first, rough draft at trampolining 2020-11-26 11:50:09 +01:00
Jakub Konka 80b1041c21 stage2 macho: use RIP-relative for memory-set regs x86_64 2020-11-26 11:50:09 +01:00
Tadeo Kondrak 25ec2dbc1e Add builtin.Signedness, use it instead of is_signed 2020-11-19 18:59:21 +02:00
tgschultz 48d60834fd
Move leb128 and remove trivial *mem functions as discussed in #5588 (#6876) 
* Move leb128 out of debug and remove trivial *mem functions as discussed in #5588

* Turns out one of the *Mem functions was used by MachO. Replaced with trivial use of FixedBufferStream.
 2020-11-16 18:51:54 -05:00
Jakub Konka a6bc19ea2a stage2 aarch64: add genCall for aarch64 MachO 2020-11-11 14:34:53 +01:00
Jakub Konka 993eb22a77 stage2 aarch64: add .memory prong in genSetReg 2020-11-11 14:34:53 +01:00
joachimschmidt557 ca0016a225 stage2 ARM: start implementing genCall for ELF + genSetReg immediates 2020-11-11 14:34:53 +01:00
joachimschmidt557 4c8f69241a stage2 aarch64: add more instructions 2020-11-11 14:34:53 +01:00
Jakub Konka 4ef6864a15 Add move wide with zero (movz) instruction 2020-11-11 14:34:53 +01:00
Jakub Konka d601b0f4eb Add basic genSetReg for aarch64 2020-11-11 14:34:53 +01:00
Jakub Konka d542e88706 Implement genAsm on aarch64 
Add remaining PCS info: param and return registers in procedure calls.
 2020-11-11 14:34:53 +01:00
joachimschmidt557 5ad501c00b stage2 aarch64: add codegen/aarch64.zig 2020-11-11 14:34:53 +01:00
joachimschmidt557 03ae77b8b0 stage2 ARM: miscellaneous improvements 2020-11-07 17:27:23 +01:00
Vexu 4ed2c52fb7
stage2: switch put swap condbr and block 
condbr is noreturn so having the other way around caused
subsequent cases to be eliminated as dead
 2020-10-30 15:58:13 +02:00
Vexu 4155d2ae24
stage2: switch ranges and multi item prongs 2020-10-30 15:58:13 +02:00
Vexu 2020ca640e
stage2: switch emit zir 2020-10-30 15:58:12 +02:00
Vexu 11998d2972
stage2: basic switch analysis 2020-10-30 15:58:12 +02:00
joachimschmidt557 7b4f3c7cfc stage2 ARM: genSetStack and genSetReg from stack 2020-10-25 12:51:19 +01:00
joachimschmidt557 7d14426da4 stage2 ARM: enable backpatching return statement 2020-10-25 12:51:19 +01:00
joachimschmidt557 7391087df1 stage2 ARM: better immediate loading feat. movw and movt 2020-10-25 12:51:19 +01:00
Andrew Kelley b2b0bf0506 fixups for the previous commit 
* std.fs.File.copyRange and copyRangeAll return u64 instead of usize -
   the returned value is how much of the `len` is transferred, so the
   types should match. This removes the need for an `@intCast`.
 * fix typo that removed a subtraction
 * Fix the size of codegen.AnyMCValue which gave me a compile error when
   I tried to build self-hosted for i386-linux.
 * restore the coercion to u64 of syms_sect.sh_info. We want to make
   sure the multiplication happens with 64 bits and not the smaller type
   used by the ELF format.
 * fix another offset parameter in link/Elf.zig to be u64 instead of usize
 * add a nice little TODO note to help out Jakub
 * FmtError already has FileTooBig in it; we just need to return it.
 2020-10-07 00:39:13 -07:00
joachimschmidt557 7c5a24e08c Turn zig fmt back on in various src/ files 2020-10-05 04:48:58 -04:00
Andrew Kelley da596b7e4f
Merge pull request #6255 from joachimschmidt557/stage2-arm 
stage2 ARM: more instructions, return values, parameters
 2020-10-04 19:49:18 -04:00
Jakub Konka 737a8bf204 Redo local symbols and offsets tracking to match Elf's approach 2020-10-04 15:31:47 +02:00
Jakub Konka 2ba23abd9d Add missing ensureCapacity call in codegen 2020-10-04 15:31:47 +02:00
Jakub Konka f8dd48bcd2 Fix after rebase and enable stage2 tests for macOS 
Also, rewrites codegen section to store symbol address in a register
to then later invoke `callq` on the register.
 2020-10-04 15:31:47 +02:00
joachimschmidt557 cfe486e388 stage2 ARM: Add push, pop alias instructions; non-leaf functions 
Non-leaf functions now work. Combined with simple parameters and return
types, this allows more complicated programs than Hello World to be
correctly compiled.
 2020-10-02 19:39:17 +02:00
joachimschmidt557 35b228630c stage2 ARM: Add stm, ldm variants and misc. additions 2020-10-02 19:39:17 +02:00
joachimschmidt557 0a54f04dbc stage2 ARM: start adding more instructions, return values, parameters 2020-10-02 19:39:17 +02:00
Andrew Kelley 528832bd3a rename src-self-hosted/ to src/ 2020-09-21 18:38:55 -07:00