stage2 ARM: miscellaneous improvements
joachimschmidt557
Jakub Konka
parent
5430642fa0
commit
03ae77b8b0
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@ -236,6 +236,11 @@ const InnerError = error{
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};
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fn Function(comptime arch: std.Target.Cpu.Arch) type {
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const writeInt = switch (arch.endian()) {
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.Little => mem.writeIntLittle,
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.Big => mem.writeIntBig,
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};
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return struct {
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gpa: *Allocator,
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bin_file: *link.File,
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@ -565,14 +570,14 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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try self.dbgSetEpilogueBegin();
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}
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},
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.arm => {
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.arm, .armeb => {
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const cc = self.fn_type.fnCallingConvention();
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if (cc != .Naked) {
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// push {fp, lr}
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// mov fp, sp
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// sub sp, sp, #reloc
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.push(.al, .{ .fp, .lr }).toU32());
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, .fp, Instruction.Operand.reg(.sp, Instruction.Operand.Shift.none)).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.push(.al, .{ .fp, .lr }).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, .fp, Instruction.Operand.reg(.sp, Instruction.Operand.Shift.none)).toU32());
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const backpatch_reloc = self.code.items.len;
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try self.code.resize(backpatch_reloc + 4);
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@ -584,7 +589,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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const stack_end = self.max_end_stack;
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const aligned_stack_end = mem.alignForward(stack_end, self.stack_align);
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if (Instruction.Operand.fromU32(@intCast(u32, aligned_stack_end))) |op| {
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mem.writeIntLittle(u32, self.code.items[backpatch_reloc..][0..4], Instruction.sub(.al, .sp, .sp, op).toU32());
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writeInt(u32, self.code.items[backpatch_reloc..][0..4], Instruction.sub(.al, .sp, .sp, op).toU32());
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} else {
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return self.fail(self.src, "TODO ARM: allow larger stacks", .{});
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}
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@ -607,10 +612,10 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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// the space because there may be
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// other jumps we already relocated to
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// the address. Instead, insert a nop
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mem.writeIntLittle(u32, self.code.items[jmp_reloc..][0..4], Instruction.nop().toU32());
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writeInt(u32, self.code.items[jmp_reloc..][0..4], Instruction.nop().toU32());
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} else {
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if (math.cast(i26, amt)) |offset| {
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mem.writeIntLittle(u32, self.code.items[jmp_reloc..][0..4], Instruction.b(.al, offset).toU32());
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writeInt(u32, self.code.items[jmp_reloc..][0..4], Instruction.b(.al, offset).toU32());
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} else |err| {
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return self.fail(self.src, "exitlude jump is too large", .{});
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}
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@ -619,8 +624,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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// mov sp, fp
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// pop {fp, pc}
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, .sp, Instruction.Operand.reg(.fp, Instruction.Operand.Shift.none)).toU32());
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.pop(.al, .{ .fp, .pc }).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, .sp, Instruction.Operand.reg(.fp, Instruction.Operand.Shift.none)).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.pop(.al, .{ .fp, .pc }).toU32());
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} else {
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try self.dbgSetPrologueEnd();
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try self.genBody(self.mod_fn.analysis.success);
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@ -1372,11 +1377,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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var instr = Instruction{ .condition = .always, .input0 = .zero, .input1 = .zero, .modify_flags = false, .output = .discard, .command = .undefined1 };
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mem.writeIntLittle(u16, self.code.items[self.code.items.len - 2 ..][0..2], @bitCast(u16, instr));
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},
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.arm => {
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.bkpt(0).toU32());
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},
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.armeb => {
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mem.writeIntBig(u32, try self.code.addManyAsArray(4), Instruction.bkpt(0).toU32());
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.arm, .armeb => {
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.bkpt(0).toU32());
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},
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else => return self.fail(src, "TODO implement @breakpoint() for {}", .{self.target.cpu.arch}),
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}
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@ -1520,7 +1522,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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return self.fail(inst.base.src, "TODO implement calling runtime known function pointer", .{});
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}
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},
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.arm => {
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.arm, .armeb => {
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for (info.args) |mc_arg, arg_i| {
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const arg = inst.args[arg_i];
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const arg_mcv = try self.resolveInst(inst.args[arg_i]);
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@ -1569,10 +1571,10 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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// TODO: add Instruction.supportedOn
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// function for ARM
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if (Target.arm.featureSetHas(self.target.cpu.features, .has_v5t)) {
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.blx(.al, .lr).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.blx(.al, .lr).toU32());
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} else {
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, .lr, Instruction.Operand.reg(.pc, Instruction.Operand.Shift.none)).toU32());
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.bx(.al, .lr).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, .lr, Instruction.Operand.reg(.pc, Instruction.Operand.Shift.none)).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.bx(.al, .lr).toU32());
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}
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} else {
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return self.fail(inst.base.src, "TODO implement calling bitcasted functions", .{});
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@ -1692,7 +1694,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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.riscv64 => {
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.jalr(.zero, 0, .ra).toU32());
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},
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.arm => {
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.arm, .armeb => {
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// Just add space for an instruction, patch this later
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try self.code.resize(self.code.items.len + 4);
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try self.exitlude_jump_relocs.append(self.gpa, self.code.items.len - 4);
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@ -1961,9 +1963,9 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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mem.writeIntLittle(i32, self.code.addManyAsArrayAssumeCapacity(4), delta);
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}
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},
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.arm => {
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.arm, .armeb => {
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if (math.cast(i26, @intCast(i32, index) - @intCast(i32, self.code.items.len))) |delta| {
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.b(.al, delta).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.b(.al, delta).toU32());
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} else |err| {
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return self.fail(src, "TODO: enable larger branch offset", .{});
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}
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@ -2082,7 +2084,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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return self.fail(inst.base.src, "TODO implement support for more SPU II assembly instructions", .{});
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}
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},
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.arm => {
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.arm, .armeb => {
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for (inst.inputs) |input, i| {
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if (input.len < 3 or input[0] != '{' or input[input.len - 1] != '}') {
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return self.fail(inst.base.src, "unrecognized asm input constraint: '{}'", .{input});
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@ -2095,7 +2097,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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}
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if (mem.eql(u8, inst.asm_source, "svc #0")) {
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.svc(.al, 0).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.svc(.al, 0).toU32());
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} else {
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return self.fail(inst.base.src, "TODO implement support for more arm assembly instructions", .{});
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}
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@ -2224,7 +2226,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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fn genSetStack(self: *Self, src: usize, ty: Type, stack_offset: u32, mcv: MCValue) InnerError!void {
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switch (arch) {
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.arm => switch (mcv) {
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.arm, .armeb => switch (mcv) {
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.dead => unreachable,
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.ptr_stack_offset => unreachable,
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.ptr_embedded_in_code => unreachable,
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@ -2257,7 +2259,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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.register => |reg| {
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// TODO: strb, strh
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if (stack_offset <= math.maxInt(u12)) {
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.str(.al, reg, .fp, .{
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.str(.al, reg, .fp, .{
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.offset = Instruction.Offset.imm(@intCast(u12, stack_offset)),
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.positive = false,
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}).toU32());
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@ -2371,7 +2373,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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fn genSetReg(self: *Self, src: usize, reg: Register, mcv: MCValue) InnerError!void {
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switch (arch) {
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.arm => switch (mcv) {
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.arm, .armeb => switch (mcv) {
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.dead => unreachable,
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.ptr_stack_offset => unreachable,
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.ptr_embedded_in_code => unreachable,
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@ -2386,15 +2388,15 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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if (x > math.maxInt(u32)) return self.fail(src, "ARM registers are 32-bit wide", .{});
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if (Instruction.Operand.fromU32(@intCast(u32, x))) |op| {
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, reg, op).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, reg, op).toU32());
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} else if (Instruction.Operand.fromU32(~@intCast(u32, x))) |op| {
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.mvn(.al, reg, op).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.mvn(.al, reg, op).toU32());
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} else if (x <= math.maxInt(u16)) {
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if (Target.arm.featureSetHas(self.target.cpu.features, .has_v7)) {
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.movw(.al, reg, @intCast(u16, x)).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.movw(.al, reg, @intCast(u16, x)).toU32());
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} else {
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, reg, Instruction.Operand.imm(@truncate(u8, x), 0)).toU32());
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.orr(.al, reg, reg, Instruction.Operand.imm(@truncate(u8, x >> 8), 12)).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, reg, Instruction.Operand.imm(@truncate(u8, x), 0)).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.orr(.al, reg, reg, Instruction.Operand.imm(@truncate(u8, x >> 8), 12)).toU32());
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}
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} else {
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// TODO write constant to code and load
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@ -2403,18 +2405,18 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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// immediate: 0xaaaabbbb
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// movw reg, #0xbbbb
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// movt reg, #0xaaaa
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.movw(.al, reg, @truncate(u16, x)).toU32());
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.movt(.al, reg, @truncate(u16, x >> 16)).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.movw(.al, reg, @truncate(u16, x)).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.movt(.al, reg, @truncate(u16, x >> 16)).toU32());
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} else {
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// immediate: 0xaabbccdd
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// mov reg, #0xaa
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// orr reg, reg, #0xbb, 24
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// orr reg, reg, #0xcc, 16
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// orr reg, reg, #0xdd, 8
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, reg, Instruction.Operand.imm(@truncate(u8, x), 0)).toU32());
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.orr(.al, reg, reg, Instruction.Operand.imm(@truncate(u8, x >> 8), 12)).toU32());
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.orr(.al, reg, reg, Instruction.Operand.imm(@truncate(u8, x >> 16), 8)).toU32());
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.orr(.al, reg, reg, Instruction.Operand.imm(@truncate(u8, x >> 24), 4)).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, reg, Instruction.Operand.imm(@truncate(u8, x), 0)).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.orr(.al, reg, reg, Instruction.Operand.imm(@truncate(u8, x >> 8), 12)).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.orr(.al, reg, reg, Instruction.Operand.imm(@truncate(u8, x >> 16), 8)).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.orr(.al, reg, reg, Instruction.Operand.imm(@truncate(u8, x >> 24), 4)).toU32());
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}
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}
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},
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@ -2424,19 +2426,19 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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return;
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// mov reg, src_reg
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, reg, Instruction.Operand.reg(src_reg, Instruction.Operand.Shift.none)).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.mov(.al, reg, Instruction.Operand.reg(src_reg, Instruction.Operand.Shift.none)).toU32());
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},
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.memory => |addr| {
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// The value is in memory at a hard-coded address.
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// If the type is a pointer, it means the pointer address is at this memory location.
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try self.genSetReg(src, reg, .{ .immediate = addr });
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.ldr(.al, reg, reg, .{ .offset = Instruction.Offset.none }).toU32());
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.ldr(.al, reg, reg, .{ .offset = Instruction.Offset.none }).toU32());
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},
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.stack_offset => |unadjusted_off| {
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// TODO: ldrb, ldrh
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// TODO: maybe addressing from sp instead of fp
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if (unadjusted_off <= math.maxInt(u12)) {
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mem.writeIntLittle(u32, try self.code.addManyAsArray(4), Instruction.ldr(.al, reg, .fp, .{
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writeInt(u32, try self.code.addManyAsArray(4), Instruction.ldr(.al, reg, .fp, .{
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.offset = Instruction.Offset.imm(@intCast(u12, unadjusted_off)),
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.positive = false,
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}).toU32());
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@ -2898,7 +2900,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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else => return self.fail(src, "TODO implement function parameters for {} on x86_64", .{cc}),
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}
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},
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.arm => {
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.arm, .armeb => {
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switch (cc) {
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.Naked => {
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assert(result.args.len == 0);
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@ -2965,7 +2967,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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},
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else => return self.fail(src, "TODO implement function return values for {}", .{cc}),
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},
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.arm => switch (cc) {
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.arm, .armeb => switch (cc) {
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.Naked => unreachable,
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.Unspecified, .C => {
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const ret_ty_size = @intCast(u32, ret_ty.abiSize(self.target.*));
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@ -3004,8 +3006,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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.x86_64 => @import("codegen/x86_64.zig"),
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.riscv64 => @import("codegen/riscv64.zig"),
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.spu_2 => @import("codegen/spu-mk2.zig"),
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.arm => @import("codegen/arm.zig"),
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.armeb => @import("codegen/arm.zig"),
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.arm, .armeb => @import("codegen/arm.zig"),
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else => struct {
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pub const Register = enum {
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dummy,
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@ -3019,7 +3020,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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};
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/// An integer whose bits represent all the registers and whether they are free.
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const FreeRegInt = @Type(.{ .Int = .{ .is_signed = false, .bits = callee_preserved_regs.len } });
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const FreeRegInt = std.meta.Int(.unsigned, callee_preserved_regs.len);
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fn parseRegName(name: []const u8) ?Register {
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if (@hasDecl(Register, "parseRegName")) {
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