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stage2: switch put swap condbr and block 

condbr is noreturn so having the other way around caused
subsequent cases to be eliminated as dead
master
Vexu 2020-10-30 15:47:12 +02:00
parent e2e0b6272b
commit 4ed2c52fb7
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GPG Key ID: 59AEB8936E16A6AC
3 changed files with 20 additions and 14 deletions
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22
src/astgen.zig
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@ -1733,32 +1733,28 @@ fn switchExpr(mod: *Module, scope: *Scope, rl: ResultLoc, switch_node: *ast.Node
}
}
const condbr = try addZIRInstSpecial(mod, &else_scope.base, case_src, zir.Inst.CondBr, .{
const condbr = try addZIRInstSpecial(mod, &case_scope.base, case_src, zir.Inst.CondBr, .{
.condition = any_ok.?,
.then_body = undefined, // populated below
.else_body = undefined, // populated below
}, .{});
const cond_block = try addZIRInstBlock(mod, &else_scope.base, case_src, .block, .{
.instructions = try scope.arena().dupe(*zir.Inst, case_scope.instructions.items),
});
// reset cond_scope for then_body
case_scope.instructions.items.len = 0;
try switchCaseExpr(mod, &case_scope.base, case_rl, block, case);
condbr.positionals.then_body = .{
.instructions = try scope.arena().dupe(*zir.Inst, case_scope.instructions.items),
};
// reset to add the empty block
case_scope.instructions.items.len = 0;
const empty_block = try addZIRInstBlock(mod, &case_scope.base, case_src, .block, .{
.instructions = undefined, // populated below
});
condbr.positionals.else_body = .{
.instructions = try scope.arena().dupe(*zir.Inst, case_scope.instructions.items),
};
// reset to add a break to the empty block
// reset cond_scope for else_body
case_scope.instructions.items.len = 0;
_ = try addZIRInst(mod, &case_scope.base, case_src, zir.Inst.BreakVoid, .{
.block = empty_block,
.block = cond_block,
}, .{});
empty_block.positionals.body = .{
condbr.positionals.else_body = .{
.instructions = try scope.arena().dupe(*zir.Inst, case_scope.instructions.items),
};
}

11
src/codegen.zig
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@ -2033,8 +2033,17 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
}
fn genBoolOp(self: *Self, inst: *ir.Inst.BinOp) !MCValue {
if (inst.base.isUnused())
return MCValue.dead;
switch (arch) {
else => return self.fail(inst.base.src, "TODO genBoolOp for {}", .{self.target.cpu.arch}),
.x86_64 => if (inst.base.tag == .booland) {
// lhs AND rhs
return try self.genX8664BinMath(&inst.base, inst.lhs, inst.rhs, 4, 0x20);
} else {
// lhs OR rhs
return try self.genX8664BinMath(&inst.base, inst.lhs, inst.rhs, 1, 0x08);
},
else => return self.fail(inst.base.src, "TODO implement sub for {}", .{self.target.cpu.arch}),
}
}

1
src/main.zig
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@ -2421,6 +2421,7 @@ pub fn cmdFmt(gpa: *Allocator, args: []const []const u8) !void {
var stdin_flag: bool = false;
var check_flag: bool = false;
var input_files = ArrayList([]const u8).init(gpa);
defer input_files.deinit();
{
var i: usize = 0;