Introduce the type Cmm.exttype to precisely describe arguments to
external C functions, especially unboxed numerical arguments.
Annotate Cmm.Cextcall with the types of the arguments (Cmm.exttype list).
An empty list means "all arguments have default type XInt".
Annotate Mach.Iextcall with the type of the result (Cmm.machtype)
and the types of the arguments (Cmm.exttype list).
Change (slightly) the API for describing calling conventions in Proc:
- loc_external_arguments now takes a Cmm.exttype list,
in order to know more precisely the types of the arguments.
- loc_arguments, loc_parameters, loc_results, loc_external_results
now take a Cmm.machype instead of an array of pseudoregisters.
(Only the types of the pseudoregisters mattered anyway.)
Update the implementations of module Proc accordingly, in every port.
Introduce a new overridable method in Selectgen, insert_move_extcall_arg,
to produce the code that moves an argument of an external C function
to the locations returned by Proc.loc_external_arguments.
Revise the selection of external calls accordingly
(method emit_extcall_args in Selectgen).
There's no need for allocation on amd64 to clobber the %rax register. It's only used in one case (-compact out-of-line allocation of >3 words), and only used there to do a single subtraction. That subtraction can be done by the caller at no code size penalty, freeing up %rax.
Inside amd64.S functions, %r11 can be used instead of %rax as temporary. %r11 is destroyed by PLT stub code, so on ELF platforms it costs nothing to use.
Mark PLT-clobbered registers as destroyed across the Ialloc instruction.
Currently only x86-64 is affected, in PIC mode only, and only with the glibc dynamic loader.
A change on trunk in cmmgen was causing problems: the use of array_indexing
in bigarray_indexing was constructing derived pointers of Addr type
instead of the correct Int type. (Because bigarray inner pointers
are outside the heap, and because they are live across allocations.)
Added an optional argument to array_indexing to specify expected
pointer type, and adapted bigarray_indexing to use it with type Int.
git-svn-id: http://caml.inria.fr/svn/ocaml/branches/cmm-mach-types@16268 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
- Register type "Addr" is split into
. "Val" (well-formed OCaml values, appropriate as GC roots)
. "Addr" (derived pointers within the heap, must not survive a GC)
- memory_chunk "Word" is split into
. "Word_val" (OCaml value)
. "Word_int" (native-sized integer, not a pointer into the heap)
Cmmgen was updated to use Word_val or Word_int as appropriate.
Application #1: fail at compile-time if a derived pointer within the heap
survives a GC point (cf. PR#6484).
Application #2: CSE can do a better job across allocation points
(keep factoring expressions of type Int, Val, Float, but not Addr).
git-svn-id: http://caml.inria.fr/svn/ocaml/branches/cmm-mach-types@15568 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
the x87 FP stack, which must not be eliminated.
CSEgen: harden against the same x87-specific issue + against reuse of
values in fixed hardware registers that were destroyed by a prior
operation.
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@14877 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
(Reuses results of previous computations instead of recomputing them.)
(Cherry-picked from branch backend-optim.)
Tested on amd64/linux and i386/linux.
Other back-ends compile (after assorted updates) but are untested.
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@14688 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
This way we can avoid having to duplicate the same functionality for
every backend, and we may also benefit from other optimizations performed
during C-- generation.
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@14303 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
Fails to compile alt-ergo without frame-pointers. No time to debug
before tonight, so I revert and will merge again after fixing the
problem.
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@13732 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
This option can be used to tell the native compiler that it should
update frame pointers, so that debuggers and profiling tools
(especially Linux perf) can use them. For now, it is only supported
by the Unix/amd64 port.
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@13730 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
so that r10 and r11 are no longer used for parameter passing,
and can therefore be destroyed by the dynamic loader without harm.
(Cherry-picked from version/4.00, commit 12907).
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@12908 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
This avoids much code duplication and is a baby step towards Mingw-64 bits
support (PR#5179). (There will be no need to create a third proc_xxx.ml
file for this configuration.)
Also, in amd64/emit_nt.mlp, the ml64 assembler didn't like my label subtractions, so I put the jumptable in code area instead of in data area.
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@11319 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02