Improve code-generation for 32-to-64-bit zero-extension on amd64.

Changes

@@ -126,6 +126,10 @@ Working version
   and because it leads to ignoring preference edges with 0 weight.
   (Eric Stavarache, review by Xavier Leroy)
 
+- #9006: int32 code generation improvements
+  (Stephen Dolan, designed with Greta Yorsh, review by Xavier Clerc,
+   Xavier Leroy and Alain Frisch)
+
 ### Runtime system:
 
 - #8619: Ensure Gc.minor_words remains accurate after a GC.

asmcomp/amd64/CSE.ml

@@ -27,7 +27,7 @@ method! class_of_operation op =
   match op with
   | Ispecific spec ->
     begin match spec with
-    | Ilea _ | Isextend32 -> Op_pure
+    | Ilea _ | Isextend32 | Izextend32 -> Op_pure
     | Istore_int(_, _, is_asg) -> Op_store is_asg
     | Ioffset_loc(_, _) -> Op_store true
     | Ifloatarithmem _ | Ifloatsqrtf _ -> Op_load

asmcomp/amd64/arch.ml

@@ -44,6 +44,9 @@ type specific_operation =
   | Ifloatsqrtf of addressing_mode     (* Float square root from memory *)
   | Isextend32                         (* 32 to 64 bit conversion with sign
                                           extension *)
+  | Izextend32                         (* 32 to 64 bit conversion with zero
+                                          extension *)
+
 and float_operation =
     Ifloatadd | Ifloatsub | Ifloatmul | Ifloatdiv
 
@@ -130,6 +133,8 @@ let print_specific_operation printreg op ppf arg =
       fprintf ppf "bswap_%i %a" i printreg arg.(0)
   | Isextend32 ->
       fprintf ppf "sextend32 %a" printreg arg.(0)
+  | Izextend32 ->
+      fprintf ppf "zextend32 %a" printreg arg.(0)
 
 let win64 =
   match Config.system with

asmcomp/amd64/emit.mlp

@@ -791,6 +791,8 @@ let emit_instr fallthrough i =
       I.sqrtsd (addressing addr REAL8 i 0) (res i 0)
   | Lop(Ispecific(Isextend32)) ->
       I.movsxd (arg32 i 0) (res i 0)
+  | Lop(Ispecific(Izextend32)) ->
+      I.mov (arg32 i 0) (res32 i 0)
   | Lop (Iname_for_debugger _) -> ()
   | Lreloadretaddr ->
       ()

asmcomp/amd64/proc.ml

@@ -369,7 +369,7 @@ let op_is_pure = function
   | Icall_ind _ | Icall_imm _ | Itailcall_ind _ | Itailcall_imm _
   | Iextcall _ | Istackoffset _ | Istore _ | Ialloc _
   | Iintop(Icheckbound _) | Iintop_imm(Icheckbound _, _) -> false
-  | Ispecific(Ilea _|Isextend32) -> true
+  | Ispecific(Ilea _|Isextend32|Izextend32) -> true
   | Ispecific _ -> false
   | _ -> true
 

asmcomp/amd64/selection.ml

@@ -238,6 +238,16 @@ method! select_operation op args dbg =
           (Ispecific Isextend32, [k])
         | _ -> super#select_operation op args dbg
       end
+  (* Recognize zero extension *)
+  | Cand ->
+    begin match args with
+    | [arg; Cconst_int (0xffff_ffff, _)]
+    | [arg; Cconst_natint (0xffff_ffffn, _)]
+    | [Cconst_int (0xffff_ffff, _); arg]
+    | [Cconst_natint (0xffff_ffffn, _); arg] ->
+      Ispecific Izextend32, [arg]
+    | _ -> super#select_operation op args dbg
+    end
   | _ -> super#select_operation op args dbg
 
 (* Recognize float arithmetic with mem *)