Doxygen work. How the heck can one enforce a consistent device
documentation? (nw)master
parent
f61e1f2123
commit
6a770d7086
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@ -16,6 +16,14 @@ NETLIST_START(ne555_astable)
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*
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*/
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/*!
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*
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* abc | def
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* ghj | ddd
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* iop | xyz
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*
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*
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*/
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/* Standard stuff */
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SOLVER(Solver, 48000)
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@ -771,7 +771,7 @@ WARN_LOGFILE =
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# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING
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# Note: If this tag is empty the current directory is searched.
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INPUT = .. ../analog ../documentation ../devices
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INPUT = .. ../analog ../documentation ../devices
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# This tag can be used to specify the character encoding of the source files
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# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
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@ -844,7 +844,7 @@ EXCLUDE_SYMBOLS =
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# that contain example code fragments that are included (see the \include
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# command).
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EXAMPLE_PATH = ../../../../nl_examples
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EXAMPLE_PATH = ../../../../nl_examples ../documentation
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# If the value of the EXAMPLE_PATH tag contains directories, you can use the
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# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
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@ -9,9 +9,14 @@
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#
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###########################################################################
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OBJ = obj
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SRC = ..
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ifeq ($(subst Windows_NT,windows,$(OS)),windows)
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OBJ = obj/mingw
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else
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OBJ = obj/nix
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endif
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#-fuse-ld=gold -Wpedantic -march=native -march=native
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# LTO = -flto=4 -fuse-linker-plugin -flto-partition=balanced -Wodr
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@ -187,7 +192,8 @@ mingw:
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#
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doc:
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doc: nltool
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./nltool -c docheader > ../documentation/devsyn.dox.h
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$(DOXYGEN) doxygen.conf
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#-------------------------------------------------
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@ -195,15 +201,11 @@ doc:
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#-------------------------------------------------
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.depend: $(SOURCES)
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ifeq ($(OS),windows)
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@echo using existing .depend
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else
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@echo creating .depend
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@rm -f ./.depend
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@for i in $(SOURCES); do \
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$(CC) $(CFLAGS) -MM $$i -MT `echo $$i | sed -e 's/$(SRC)/$(OBJ)/' -e 's/.cpp/.o/' ` >>./.depend; \
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$(CC) $(CFLAGS) -MM $$i -MT `echo $$i | sed -e 's+$(SRC)+$(OBJ)+' -e 's+.cpp+.o+' ` >>./.depend; \
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done
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endif
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depend: .depend
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@ -232,3 +234,4 @@ $(OBJ)/%.a:
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@echo Archiving $@...
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$(RM) $@
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$(AR) $(ARFLAGS) $@ $^
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@ -9,10 +9,13 @@
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*
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* \section ne555_1 Synopsis
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*
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* \code
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* NE555(name)
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* NE555_DIP(name)
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* \endcode
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* \snippet devsyn.dox.h NE555 synopsis
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* \snippet devsyn.dox.h NE555_DIP synopsis
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* \section ne555_11 "C" Synopsis
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*
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* \snippet devsyn.dox.h NE555 csynopsis
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* \snippet devsyn.dox.h NE555_DIP csynopsis
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*
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* For the \c NE555 use verbose pin assignments like \c name.TRIG or \c name.OUT.
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* For the \c NE555_DIP use pin numbers like \c name.1.
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@ -32,12 +35,7 @@
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*
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* \section ne555_3 Function Table
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*
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* | CLR | CLK | D | Q | QQ |
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* |-----|-----|---|:-:|:---:|
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* | 0 | X | X | 0 | 1 |
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* | 1 | R | 1 | 1 | 0 |
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* | 1 | R | 0 | 0 | 1 |
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* | 1 | 0 | X | Q0| Q0Q |
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* Please refer to the datasheet.
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*
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* \section ne555_4 Limitations
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*
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@ -3,202 +3,6 @@
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*/
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/*!
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* \defgroup devices Devices
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*
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*/
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/*!
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* \page devices Devices
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*
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* Below is a list of all the devices currently supported ...
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*
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* - \subpage AFUNC
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* - \subpage ANALOG_INPUT
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* - \subpage CAP
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* - \subpage CCCS
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* - \subpage CD4001_DIP
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* - \subpage CD4001_NOR
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* - \subpage CD4016_DIP
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* - \subpage CD4020_DIP
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* - \subpage CD4020
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* - \subpage CD4020_WI
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* - \subpage CD4066_DIP
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* - \subpage CD4066_GATE
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* - \subpage CD4316_DIP
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* - \subpage CD4316_GATE
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* - \subpage CD4538_DIP
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* - \subpage CLOCK
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* - \subpage CS
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* - \subpage DIODE
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* - \subpage DUMMY_INPUT
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* - \subpage EPROM_2716_DIP
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* - \subpage EPROM_2716
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* - \subpage EXTCLOCK
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* - \subpage FRONTIER_DEV
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* - \subpage GND
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* - \subpage IND
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* - \subpage LM324_DIP
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* - \subpage LM358_DIP
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* - \subpage LM3900
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* - \subpage LM747A_DIP
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* - \subpage LM747_DIP
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* - \subpage LOGD
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* - \subpage LOGIC_INPUT
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* - \subpage LOG
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* - \subpage LVCCS
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* - \subpage MAINCLOCK
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* - \subpage MB3614_DIP
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* - \subpage MC14584B_DIP
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* - \subpage MC14584B_GATE
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* - \subpage MM5837_DIP
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* - \subpage NE555_DIP
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* - \subpage NE555
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* - \subpage NETDEV_DELAY
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* - \subpage NETDEV_RSFF
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* - \subpage OPAMP
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* - \subpage opamp_layout_1_11_6
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* - \subpage opamp_layout_1_7_4
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* - \subpage opamp_layout_1_8_5
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* - \subpage opamp_layout_2_13_9_4
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* - \subpage opamp_layout_2_8_4
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* - \subpage opamp_layout_4_4_11
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* - \subpage PARAMETER
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* - \subpage POT2
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* - \subpage POT
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* - \subpage PROM_82S115_DIP
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* - \subpage PROM_82S115
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* - \subpage PROM_82S123_DIP
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* - \subpage PROM_82S123
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* - \subpage PROM_82S126_DIP
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* - \subpage PROM_82S126
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* - \subpage QBJT_EB
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* - \subpage QBJT_SW
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* - \subpage R2R_DAC
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* - \subpage RAM_2102A_DIP
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* - \subpage RAM_2102A
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* - \subpage RES
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* - \subpage RES_SWITCH
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* - \subpage SN74LS629_DIP
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* - \subpage SN74LS629
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* - \subpage SOLVER
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* - \subpage SWITCH2
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* - \subpage SWITCH
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* - \subpage TTL_7400_DIP
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* - \subpage TTL_7400_GATE
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* - \subpage TTL_7400_NAND
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* - \subpage TTL_7402_DIP
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* - \subpage TTL_7402_GATE
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* - \subpage TTL_7402_NOR
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* - \subpage TTL_7404_DIP
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* - \subpage TTL_7404_GATE
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* - \subpage TTL_7404_INVERT
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* - \subpage TTL_7408_AND
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* - \subpage TTL_7408_DIP
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* - \subpage TTL_7408_GATE
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* - \subpage TTL_74107A
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* - \subpage TTL_74107_DIP
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* - \subpage TTL_74107
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* - \subpage TTL_7410_DIP
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* - \subpage TTL_7410_GATE
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* - \subpage TTL_7410_NAND
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* - \subpage TTL_7411_AND
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* - \subpage TTL_7411_DIP
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* - \subpage TTL_7411_GATE
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* - \subpage TTL_74123_DIP
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* - \subpage TTL_74123
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* - \subpage TTL_74153_DIP
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* - \subpage TTL_74153
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* - \subpage TTL_74161_DIP
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* - \subpage TTL_74161
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* - \subpage TTL_74165_DIP
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* - \subpage TTL_74165
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* - \subpage TTL_74166_DIP
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* - \subpage TTL_74166
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* - \subpage TTL_7416_DIP
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* - \subpage TTL_7416_GATE
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* - \subpage TTL_74174_DIP
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* - \subpage TTL_74174
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* - \subpage TTL_74175_DIP
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* - \subpage TTL_74175
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* - \subpage TTL_74192_DIP
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* - \subpage TTL_74192
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* - \subpage TTL_74193_DIP
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* - \subpage TTL_74193
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* - \subpage TTL_74194_DIP
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* - \subpage TTL_74194
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* - \subpage TTL_7420_DIP
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* - \subpage TTL_7420_GATE
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* - \subpage TTL_7420_NAND
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* - \subpage TTL_7425_DIP
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* - \subpage TTL_7425_GATE
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* - \subpage TTL_7425_NOR
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* - \subpage TTL_74260_DIP
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* - \subpage TTL_74260_GATE
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* - \subpage TTL_74260_NOR
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* - \subpage TTL_74279_DIP
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* - \subpage TTL_7427_DIP
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* - \subpage TTL_7427_GATE
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* - \subpage TTL_7427_NOR
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* - \subpage TTL_7430_DIP
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* - \subpage TTL_7430_GATE
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* - \subpage TTL_7430_NAND
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* - \subpage TTL_7432_DIP
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* - \subpage TTL_7432_GATE
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* - \subpage TTL_7432_OR
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* - \subpage TTL_74365_DIP
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* - \subpage TTL_74365
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* - \subpage TTL_7437_DIP
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* - \subpage TTL_7437_GATE
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* - \subpage TTL_7437_NAND
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* - \subpage TTL_7448_DIP
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* - \subpage TTL_7448
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* - \subpage TTL_7450_ANDORINVERT
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* - \subpage TTL_7450_DIP
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* - \subpage TTL_7473A_DIP
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* - \subpage TTL_7473A
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* - \subpage TTL_7473_DIP
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* - \subpage TTL_7473
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* - \subpage TTL_7474_DIP
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* - \subpage TTL_7474
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* - \subpage TTL_7475_DIP
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* - \subpage TTL_7475
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* - \subpage TTL_7477_DIP
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* - \subpage TTL_7477
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* - \subpage TTL_7483_DIP
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* - \subpage TTL_7483
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* - \subpage TTL_7485_DIP
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* - \subpage TTL_7485
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* - \subpage TTL_7486_DIP
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* - \subpage TTL_7486_GATE
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* - \subpage TTL_7486_XOR
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* - \subpage TTL_7490_DIP
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* - \subpage TTL_7490
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* - \subpage TTL_7493_DIP
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* - \subpage TTL_7493
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* - \subpage TTL_82S16_DIP
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* - \subpage TTL_82S16
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* - \subpage TTL_9310_DIP
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* - \subpage TTL_9310
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* - \subpage TTL_9312_DIP
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* - \subpage TTL_9312
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* - \subpage TTL_9316_DIP
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* - \subpage TTL_9316
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* - \subpage TTL_9322_DIP
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* - \subpage TTL_9322
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* - \subpage TTL_9334_DIP
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* - \subpage TTL_9334
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* - \subpage TTL_9602_DIP
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* - \subpage TTL_AM2847_DIP
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* - \subpage TTL_AM2847
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* - \subpage TTL_INPUT
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* - \subpage TTL_TRISTATE3
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* - \subpage TTL_TRISTATE
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* - \subpage UA741_DIP10
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* - \subpage UA741_DIP14
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* - \subpage UA741_DIP8
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* - \subpage VCCS
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* - \subpage VCVS
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* - \subpage VS
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*
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* \mainpage Netlist
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@ -21,7 +21,7 @@ public:
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tool_options_t() :
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plib::options(),
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opt_grp1(*this, "General options", "The following options apply to all commands."),
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opt_cmd (*this, "c", "cmd", "run", "run:convert:listdevices:static:header", "run|convert|listdevices|static|header"),
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opt_cmd (*this, "c", "cmd", "run", "run:convert:listdevices:static:header:docheader", "run|convert|listdevices|static|header"),
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opt_file(*this, "f", "file", "-", "file to process (default is stdin)"),
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opt_defines(*this, "D", "define", "predefine value as macro, e.g. -Dname=value. If '=value' is omitted predefine it as 1. This option may be specified repeatedly."),
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opt_rfolders(*this, "r", "rom", "where to look for files"),
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@ -339,6 +339,50 @@ static void mac_out(const pstring s, const bool cont = true)
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pout("{1}\n", s);
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}
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static void cmac(const netlist::factory::element_t *e)
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{
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auto v = plib::psplit(e->param_desc(), ",");
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pstring vs;
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for (auto s : v)
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vs += ", p" + s.replace("+","").replace(".","_");
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mac_out("#define " + e->name() + "(name" + vs + ")");
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mac_out("\tNET_REGISTER_DEV(" + e->name() +", name)");
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for (auto s : v)
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{
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pstring r(s.replace("+","").replace(".","_"));
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if (s.startsWith("+"))
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mac_out("\tNET_CONNECT(name, " + r + ", p" + r + ")");
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else
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mac_out("\tNETDEV_PARAMI(name, " + r + ", p" + r + ")");
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}
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mac_out("", false);
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}
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static void mac(const netlist::factory::element_t *e)
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{
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auto v = plib::psplit(e->param_desc(), ",");
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pstring vs;
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for (auto s : v)
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{
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vs += ", " + s.replace("+","").replace(".","_");
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}
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pout("{1}(name{2})\n", e->name(), vs);
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if (v.size() > 0)
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{
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pout("/*\n");
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for (auto s : v)
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{
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pstring r(s.replace("+","").replace(".","_"));
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if (s.startsWith("+"))
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pout("{1:10}: Terminal\n",r);
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else
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pout("{1:10}: Parameter\n", r);
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}
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pout("*/\n");
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}
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}
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static void create_header(tool_options_t &opts)
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{
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netlist_tool_t nt("netlist");
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@ -376,22 +420,7 @@ static void create_header(tool_options_t &opts)
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pout("{1}\n", pstring("// Source: ").cat(e->sourcefile().replace("../","")));
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pout("{1}\n", pstring("// ").rpad("-", 72));
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}
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auto v = plib::psplit(e->param_desc(), ",");
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pstring vs;
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for (auto s : v)
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vs += ", p" + s.replace("+","").replace(".","_");
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mac_out("#define " + e->name() + "(name" + vs + ")");
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mac_out("\tNET_REGISTER_DEV(" + e->name() +", name)"); \
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for (auto s : v)
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{
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pstring r(s.replace("+","").replace(".","_"));
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if (s.startsWith("+"))
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mac_out("\tNET_CONNECT(name, " + r + ", p" + r + ")");
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else
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mac_out("\tNETDEV_PARAMI(name, " + r + ", p" + r + ")");
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}
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mac_out("", false);
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cmac(e.get());
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}
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pout("#endif // __PLIB_PREPROCESSOR__\n");
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pout("#endif\n");
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@ -399,6 +428,52 @@ static void create_header(tool_options_t &opts)
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}
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static void create_docheader(tool_options_t &opts)
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{
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netlist_tool_t nt("netlist");
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nt.init();
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nt.log().verbose.set_enabled(false);
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nt.log().warning.set_enabled(false);
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nt.setup().register_source(plib::make_unique_base<netlist::source_t,
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netlist::source_proc_t>(nt.setup(), "dummy", &netlist_dummy));
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nt.setup().include("dummy");
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std::vector<pstring> devs;
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for (auto &e : nt.setup().factory())
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devs.push_back(e->name());
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std::sort(devs.begin(), devs.end(), [&](pstring &a, pstring &b) { return a < b; });
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pout("// license:GPL-2.0+\n");
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pout("// copyright-holders:Couriersud\n");
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pout("/* ----------------------------------------------------------------------------\n");
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pout(" * Automatically created file. DO NOT MODIFY.\n");
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pout(" * ---------------------------------------------------------------------------*/\n");
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pout("/*!\n");
|
||||
pout(" * \\page devices Devices\n");
|
||||
pout(" *\n");
|
||||
pout(" * Below is a list of all the devices currently known to the system ...\n");
|
||||
pout(" *\n");
|
||||
|
||||
for (auto &s : devs)
|
||||
pout(" * - \\subpage {1}\n", s);
|
||||
|
||||
pout(" *\n");
|
||||
|
||||
for (auto &e : nt.setup().factory())
|
||||
{
|
||||
pout("//! [{1} csynopsis]\n", e->name());
|
||||
cmac(e.get());
|
||||
pout("//! [{1} csynopsis]\n", e->name());
|
||||
pout("//! [{1} synopsis]\n", e->name());
|
||||
mac(e.get());
|
||||
pout("//! [{1} synopsis]\n", e->name());
|
||||
}
|
||||
nt.stop();
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
listdevices - list all known devices
|
||||
|
@ -549,6 +624,8 @@ int main(int argc, char *argv[])
|
|||
static_compile(opts);
|
||||
else if (cmd == "header")
|
||||
create_header(opts);
|
||||
else if (cmd == "docheader")
|
||||
create_docheader(opts);
|
||||
else if (cmd == "convert")
|
||||
{
|
||||
pstring contents;
|
||||
|
|
Loading…
Reference in New Issue