172 lines
4.6 KiB
C
172 lines
4.6 KiB
C
/*
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* Documentation settings
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*/
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/*!
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*
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* \mainpage Netlist
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##Netlist
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###A mixed signal circuit simulation.
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- D: Device
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- O: Rail output (output)
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- I: Infinite impedance input (input)
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- T: Terminal (finite impedance)
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The following example shows a typical connection between several devices:
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+---+ +---+ +---+ +---+ +---+
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| | | | | | | | | |
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| D | | D | | D | | D | | D |
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| | | | | | | | | |
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+-O-+ +-I-+ +-I-+ +-T-+ +-T-+
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+-+---------+---------+---------+---------+-+
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| rail net |
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+-------------------------------------------+
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A rail net is a net which is driven by exactly one output with an
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(idealized) internal resistance of zero.
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Ideally, it can deliver infinite current.
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A infinite resistance input does not source or sink current.
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Terminals source or sink finite (but never zero) current.
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The system differentiates between analog and logic input and outputs and
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analog terminals. Analog and logic devices can not be connected to the
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same net. Instead, proxy devices are inserted automatically:
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+---+ +---+
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| | | |
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| D1| | D2|
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| A | | L |
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+-O-+ +-I-+
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+-+---------+---+
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| rail net |
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+---------------+
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is converted into
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+----------+
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+---+ +-+-+ | +---+
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| | | L | A-L | | |
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| D1| | D | Proxy | | D2|
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| A | | A | | | |
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+-O-+ +-I-+ | +-I-+
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+-+---------+--+ +-+-----+-------+
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| rail net (A) | | rail net (L) |
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+--------------| +---------------+
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This works both analog to logic as well as logic to analog.
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The above is an advanced implementation of the existing discrete
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subsystem in MAME. Instead of relying on a fixed time-step, analog devices
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could either connect to fixed time-step clock or use an internal clock
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to update them. This would however introduce macro devices for RC, diodes
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and transistors again.
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Instead, the following approach in case of a pure terminal/input network
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is taken:
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+---+ +---+ +---+ +---+ +---+
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| | | | | | | | | |
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| D | | D | | D | | D | | D |
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+-T-+ +-I-+ +-I-+ +-T-+ +-T-+
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'+' | | '-' '-'
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+-+---------+---------+---------+---------+-+
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| Calculated net |
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+-------------------------------------------+
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Netlist uses the following basic two terminal device:
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(k)
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+-----T-----+
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| +--+--+ |
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| R | |
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| R | |
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| R I |
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| | I | Device n
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| V+ I |
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| V | |
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| V- | |
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| +--+--+ |
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+-----T-----+
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(l)
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This is a resistance in series to a voltage source and paralleled by a
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current source. This is suitable to model voltage sources, current sources,
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resistors, capacitors, inductances and diodes.
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\f[
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I_{n,l} = - I_{n,k} = ( V_k - V^N - V_l ) \frac{1}{R^n} + I^n
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\f]
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Now, the sum of all currents for a given net must be 0:
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\f[
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\sum_n I_{n,l} = 0 = \sum_{n,k} (V_k - V^n - V_l ) \frac{1}{R^n} + I^n
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\f]
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With \f$ G^n = \frac{1}{R^n} \f$ and \f$ \sum_n G^n = G^{tot} \f$ and \f$k=k(n)\f$
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\f[
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0 = - V_l G^{tot} + \sum_n (V_{k(n)} - V^n) G^n + I^n)
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\f]
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and with \f$ l=l(n)\f$ and fixed \f$ k\f$
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\f[
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0 = -V_k G^{tot} + sum_n( V_{l(n)} + V^n ) G^n - I^n)
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\f]
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These equations represent a linear Matrix equation (with more math).
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In the end the solution of the analog subsystem boils down to
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\f[
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\mathbf{\it{(G - D) v = i}}
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\f]
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with G being the conductance matrix, D a diagonal matrix with the total
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conductance on the diagonal elements, V the net voltage vector and I the
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current vector.
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By using solely two terminal devices, we can simplify the whole calculation
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significantly. A BJT now is a four terminal device with two terminals being
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connected internally.
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The system is solved using an iterative approach:
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G V - D V = I
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assuming V=Vn=Vo
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Vn = D-1 (I - G Vo)
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Each terminal thus has three properties:
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a) Resistance
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b) Voltage source
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c) Current source/sink
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Going forward, the approach can be extended e.g. to use a linear
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equation solver.
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The formal representation of the circuit will stay the same, thus scales.
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*/
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