LemonBoy
b81c5be451
riscv: Remove 'relax' from the baseline cpu features
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LLD doesn't implement relaxations at the moment.
2020-02-11 17:03:11 +01:00
Andrew Kelley
fbfda7f00e
fix incorrect list of sub-arches for aarch64
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tests use older sub-arch that works in the older qemu
2020-01-23 13:02:45 -05:00
Andrew Kelley
ead7d15772
use an older arm64 sub-arch for test suite
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hopefully this avoids the older qemu version crashing
2020-01-23 00:41:46 -05:00
Andrew Kelley
9845264a0b
aarch64: less feature-full baseline CPU
2020-01-22 18:40:34 -05:00
Andrew Kelley
48c7e6c48b
std.Target.CpuFeatures is now a struct with both CPU and feature set
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Previously it was a tagged union which was one of:
* baseline
* a specific CPU
* a set of features
Now, it's possible to have a CPU but also modify the CPU's feature set
on top of that. This is closer to what LLVM does.
This is more correct because Zig's notion of CPUs (and LLVM's) is not
exact CPU models. For example "skylake" is not one very specific model;
there are several different pieces of hardware that match "skylake" that
have different feature sets enabled.
2020-01-22 17:13:31 -05:00
Andrew Kelley
68b6867e76
lazily compute the full cpu features dependencies
2020-01-21 20:11:36 -05:00
Andrew Kelley
92559cd02c
hit a comptime limitation with computing dense sets
2020-01-21 19:40:44 -05:00
Andrew Kelley
6793af8d8b
these are not real cpu features
2020-01-21 12:14:36 -05:00
Andrew Kelley
e640d01535
fixups to arch data, support any number of cpu features
2020-01-21 00:34:54 -05:00
Andrew Kelley
6118b11afa
Revert "aarch64: remove CPU features that are actually just CPUs"
...
This reverts commit 6dd514ac8aa3ee2e5c6fd0374469d361ccfce5b9.
This strategy won't work for arm 32-bit; instead need to try to figure
out how to get more bits into the bit set.
2020-01-20 23:15:07 -05:00
Andrew Kelley
89e107ee4e
uncomment all the archs in target.zig
2020-01-20 23:14:35 -05:00
Andrew Kelley
6dd514ac8a
aarch64: remove CPU features that are actually just CPUs
2020-01-20 22:49:26 -05:00
Andrew Kelley
6e88883edf
import data from llvm 9
2020-01-20 22:21:45 -05:00
Andrew Kelley
8f29d14073
stage1 is building. zig targets now self-hosted
2020-01-20 01:42:31 -05:00
Andrew Kelley
e3b5e91878
do the x86 arch
2020-01-19 20:54:05 -05:00
Andrew Kelley
a867b43366
progress towards merging
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see BRANCH_TODO file
2020-01-19 20:54:04 -05:00
Layne Gustafson
de8a5cf5f5
Remove features/cpus not in LLVM v9
2020-01-19 20:53:20 -05:00
Layne Gustafson
03dd376b55
Add builtin.zig support
2020-01-19 20:53:19 -05:00
Layne Gustafson
79a2747de4
Add llvm_name to feature defs
2020-01-19 20:53:19 -05:00
Layne Gustafson
e4ecdefa9a
Rename subfeatures -> dependencies
2020-01-19 20:53:19 -05:00
Layne Gustafson
51372200d3
Filter out non-features
2020-01-19 20:53:19 -05:00
Layne Gustafson
c8f1e0d6d8
Remove llvm_name from features
2020-01-19 20:53:19 -05:00
Layne Gustafson
c131e50ea7
Switch CPU/features to simple format
2020-01-19 20:53:18 -05:00
Layne Gustafson
21908e100e
Fix CPU and feature defs
2020-01-19 20:53:18 -05:00
Layne Gustafson
8f191e0166
Update term feature deps -> subfeatures
2020-01-19 20:53:18 -05:00
Layne Gustafson
0f46c12f78
Create initial target details infrastructure
2020-01-19 20:53:15 -05:00
