Commit Graph

2373 Commits (8d3e4147d591342d6ec4ce54c5e14da98c1a692a)

Author SHA1 Message Date
Andrew Kelley cc1c2bd568 simplify ZIR spec; separate parsing/rendering from analysis 2020-04-20 19:21:03 -04:00
Andrew Kelley f92ccf365b generic ir parsing framework 2020-04-19 19:31:50 -04:00
Andrew Kelley bd4280decf beginnings of zig ir parser 2020-04-19 19:31:50 -04:00
Vexu b6fe839248
update std lib to decls being disallowed between fields 2020-04-18 23:56:05 +03:00
Vexu fff00c3bbb
disallow declarations between container fields 2020-04-18 23:56:03 +03:00
Vexu 4f02cf32b4
fix typeInfo tests 2020-04-18 11:39:52 +03:00
Vexu 1afaf42525
add error for non-exter variadic functions 2020-04-17 22:02:49 +03:00
Vexu c026a9f6d2 fix missing compile errors on builtin cast functions 2020-04-17 14:22:20 -04:00
LemonBoy 8e96922f31 stage1: Fix several bugs in constant generation
The codegen would sometimes change the LLVM type for some constants to
an unnamed structure in order to accomodate extra padding. This is fine
as long as the alignment of each field is still respected and it was not
the case for structure types, leading to ill-formed constants being
generated.

Optional types suffer from this to a lower extent as their layout is
quite lucky, the only missing piece was the tail padding.

Closes #4530
Closes #4594
Closes #4295
Closes my will to live
2020-04-17 13:42:23 -04:00
Vexu ca3bf6e6ad
translate-c cleanup and zig fmt 2020-04-15 15:15:32 +03:00
Vexu a016fb8c62
translate-c: correct invalid shortcut 2020-04-15 15:14:10 +03:00
foobles 022a71ca7d
Shift error message now says "fixed-width integer type" instead of just "integer type" (#5028)
* error message of ir_analyze_bit_shift now more accurate/specific

* fixed compile error test to match bit shift error message
2020-04-14 16:19:45 -04:00
LemonBoy ce21a784a4 stage1: More fixes for BE targets
* Fix packed struct alignment
* Adjust some tests
2020-04-13 17:35:14 -04:00
xackus dbc00e2424 ArrayList: remove old (before span) API 2020-04-11 20:40:34 -04:00
Vexu 1b1cbd9358
Merge pull request #4973 from SuperAuguste/nameless-fields
Nameless fields
2020-04-10 21:31:32 +03:00
Auguste Rame df14578c9d
Merge branch 'master' into nameless-fields 2020-04-10 11:49:50 -04:00
Vexu f60e7348d5
add error message for invalid assignment 2020-04-09 11:50:32 +03:00
Andrew Kelley beae932e0f
Merge pull request #4975 from Vexu/param-reassign
Fix missing compile error on assign to slice and array parameters
2020-04-08 21:02:50 -04:00
Lachlan Easton d7902707bc
Translate C: Allow casting literal ints to pointers 2020-04-08 14:11:01 -04:00
Vexu 7b5fb79b5b
Translate C: Put an alignCast in c style pointer casts to allow opaque types to cast properly in C macros
Translate C: add test case for aligning opaque types in pointer casts
2020-04-08 14:11:01 -04:00
Vexu b1e44adcba
move array and struct const checks to more appropriate places 2020-04-08 14:32:02 +03:00
xackus 66b2477ab6 fix lazy value in ir_analyze_instruction_elem_ptr 2020-04-07 18:22:17 -04:00
Vexu ff0f97a1bc
fix missing compile error on assign to slice and array parameters 2020-04-08 00:27:14 +03:00
Andrew Kelley ed23dad487
fix the new runtime-safety tests
Thanks to Vexu's work in e62671f643, compile errors were identified in
these test cases! This commit fixes them to use `const` as appropriate.
2020-04-07 16:05:42 -04:00
SuperAuguste 116c76cf82 fix tests 2020-04-07 15:19:28 -04:00
SuperAuguste 882aa86843 more fixes 2020-04-07 15:08:46 -04:00
Andrew Kelley 22dbeab29d
Merge pull request #4857 from LemonBoy/fix-4777
Rewrite the bound checks in slice operator
2020-04-07 14:51:25 -04:00
Vexu 95fefcd4c9
fix broken tests 2020-04-07 16:56:48 +03:00
Vexu e62671f643
fix missing const on address of literal 2020-04-07 15:25:44 +03:00
LemonBoy 0a936c1d76 Add some tests for the runtime safety checks 2020-04-06 20:14:06 +02:00
LemonBoy a59d31bd28 ir: Support tuple multiplication 2020-04-06 14:03:43 -04:00
Vexu c5ced0d74a
Merge pull request #4939 from SuperAuguste/master
translate-c: Properly translate C multicharacter literals
2020-04-06 10:31:17 +03:00
SuperAuguste 6106cf4419 fixes 2020-04-05 19:06:43 -04:00
Andrew Kelley e84b9b70ff
annotate disabled tests with github issue links 2020-04-05 18:34:32 -04:00
Andrew Kelley 5597b11a52
add runtime safety tests for SIMD integer division 2020-04-05 18:34:31 -04:00
LemonBoy 0f964e1910
I'm getting tired of this shit LLVM 2020-04-05 18:34:31 -04:00
LemonBoy 91a8e3b47b
tests: Chop away some flaky tests 2020-04-05 18:34:31 -04:00
LemonBoy d2d97e55cc
ir: Support shift left/right on vectors 2020-04-05 18:34:31 -04:00
LemonBoy 2485f30046
ir: Support bitwise not on vectors 2020-04-05 18:34:31 -04:00
LemonBoy 54ffcf95a8
ir: Support div/mod/rem on vector types
Closes #4050
2020-04-05 18:34:31 -04:00
Andrew Kelley e2dc63644a
type_has_one_possible_value takes comptime struct fields into account
Before, type_has_one_possible_value would return false for the value
`.{1}`. But actually, that type is a tuple with a single comptime field.
Such a type, in fact, has one possible value.

This plus the corresponding adjustment to get_the_one_possible_value
solves #3878.
2020-04-05 17:09:01 -04:00
Vexu 6ef15fc8d0
Merge pull request #4901 from phase/feature/translate-c-remassign
translate-c: RemAssign and DivAssign
2020-04-05 21:05:18 +03:00
xackus cd20e0cc67 rename mem.separate to mem.split 2020-04-04 17:37:51 -04:00
Jadon Fowler 391ee996a5 translate-c: account for signedness when translating div & mod
Signed-off-by: Jadon Fowler <j@jadon.io>
2020-04-04 02:16:30 -04:00
Andrew Kelley e89c42655c
Merge pull request #4868 from xackus/new-arraylist-api
new ArrayList API
2020-04-03 22:31:15 -04:00
Michael Dusan 8b6a06eefe
add compiler-error test: coerce
Issue fixed by an unknown commit.

closes #4207
2020-04-03 19:11:51 -04:00
Michael Dusan db4c06ce60 stage1: add compile errors for sentinel slicing
closes #3963
2020-04-03 19:05:30 -04:00
Andrew Kelley a2cad9a3d9
add issue links to disabled test cases 2020-04-03 18:36:13 -04:00
Andrew Kelley 11b50e3ad8 change the default ABI of riscv64-linux-musl
Before, this would cause a link failure when mixing Zig and C code for
RISC-V targets.

Now, the ABIs match and Zig and C code can be mixed successfully.

I will file a follow-up issue for the ability to deal more explicitly
with ABIs.

closes #4863
2020-04-03 13:13:09 -04:00
Andrew Kelley 048da6f631 ci: enable riscv64-linux tests
Thanks to Michael Dusan's work in
deef063bbf these tests can be enabled.
2020-04-02 21:44:03 -04:00