Commit Graph

33 Commits (555a2c03286507ffe4bd3bea2154dbfb719ebef1)

Author SHA1 Message Date
Andrew Kelley 2b33e27e1c
arm baseline CPU is v7a rather than v6m
v6m is thumb-mode and the baseline should probably be an 'a' variant.
2020-02-26 12:37:13 -05:00
Andrew Kelley 7da7fbb912
update ARM cpu models to correctly include the sub-arch 2020-02-21 12:29:27 -05:00
Andrew Kelley 33c69d5cb6
arm: clarify which CPU features are sub-architectures
versus which ones are instruction sets.
2020-02-20 15:27:42 -05:00
Andrew Kelley 9c3eff9193
Revert "arm: clean up the messy sub-architecture & CPU features"
This reverts commit 96f45c27b6.
2020-02-20 12:18:32 -05:00
Andrew Kelley 84f1893c18
remove the concept of "sub-architecture"
in favor of CPU features. Also rearrange the `std.Target`
data structure.

 * note: `@import("builtin")` was already deprecated in favor of
   `@import("std").builtin`.
 * `std.builtin.arch` is now deprecated in favor of
   `std.builtin.cpu.arch`.
 * `std.Target.CpuFeatures.Cpu` is now `std.Target.Cpu.Model`.
 * `std.Target.CpuFeatures` is now `std.Target.Cpu`.
 * `std.Target` no longer has an `arch` field. Instead it has a
   `cpu` field, which has `arch`, `model`, and `features`.
 * `std.Target` no longer has a `cpu_features` field.
 * `std.Target.Arch` is moved to `std.Target.Cpu.Arch` and
   it is an enum instead of a tagged union.
 * `std.Target.parseOs` is moved to `std.Target.Os.parse`.
 * `std.Target.parseAbi` is moved to `std.Target.Abi.parse`.
 * `std.Target.parseArchSub` is only for arch now and moved
    to `std.Target.Cpu.Arch.parse`.
 * `std.Target.parse` is improved to accept CPU name and features.
 * `std.Target.Arch.getBaselineCpuFeatures` is moved to
   `std.Target.Cpu.baseline`.
 * `std.Target.allCpus` is renamed to `std.Target.allCpuModels`.
 * `std.Target.defaultAbi` is moved to `std.Target.Abi.default`.
 * Significant cleanup of aarch64 and arm CPU features, resulting in
   the needed bit count for cpu feature set going from 174 to 138.
 * Add `std.Target.Cpu.Feature.Set.addFeatureSet` for merging
   feature sets together.

`-target-feature` and `-target-cpu` are removed in favor of
`-mcpu`, to conform to established conventions, and it gains
additional power to support cpu features. The syntax is:
-mcpu=name+on1+on2-off1-off2

closes #4261
2020-02-19 21:30:36 -05:00
Andrew Kelley 96f45c27b6
arm: clean up the messy sub-architecture & CPU features 2020-02-19 19:11:20 -05:00
Andrew Kelley 4c6f207aff
clean up arm CPU features
* remove "cpu features" that are actually just processors
 * rename `v8` to `v8a`. this matches the corresponding
   change to target/aarch64.zig
 * rename types in preparation for removing sub-architecture
   from `std.Target`.

I have other files changed in my dirty working tree, but about to make
some changes to arm.zig that I don't want batched with this commit.
2020-02-19 18:12:06 -05:00
LemonBoy b81c5be451 riscv: Remove 'relax' from the baseline cpu features
LLD doesn't implement relaxations at the moment.
2020-02-11 17:03:11 +01:00
Andrew Kelley fbfda7f00e
fix incorrect list of sub-arches for aarch64
tests use older sub-arch that works in the older qemu
2020-01-23 13:02:45 -05:00
Andrew Kelley ead7d15772
use an older arm64 sub-arch for test suite
hopefully this avoids the older qemu version crashing
2020-01-23 00:41:46 -05:00
Andrew Kelley 9845264a0b
aarch64: less feature-full baseline CPU 2020-01-22 18:40:34 -05:00
Andrew Kelley 48c7e6c48b
std.Target.CpuFeatures is now a struct with both CPU and feature set
Previously it was a tagged union which was one of:
 * baseline
 * a specific CPU
 * a set of features

Now, it's possible to have a CPU but also modify the CPU's feature set
on top of that. This is closer to what LLVM does.

This is more correct because Zig's notion of CPUs (and LLVM's) is not
exact CPU models. For example "skylake" is not one very specific model;
there are several different pieces of hardware that match "skylake" that
have different feature sets enabled.
2020-01-22 17:13:31 -05:00
Andrew Kelley 68b6867e76
lazily compute the full cpu features dependencies 2020-01-21 20:11:36 -05:00
Andrew Kelley 92559cd02c
hit a comptime limitation with computing dense sets 2020-01-21 19:40:44 -05:00
Andrew Kelley 6793af8d8b
these are not real cpu features 2020-01-21 12:14:36 -05:00
Andrew Kelley e640d01535
fixups to arch data, support any number of cpu features 2020-01-21 00:34:54 -05:00
Andrew Kelley 6118b11afa
Revert "aarch64: remove CPU features that are actually just CPUs"
This reverts commit 6dd514ac8a.

This strategy won't work for arm 32-bit; instead need to try to figure
out how to get more bits into the bit set.
2020-01-20 23:15:07 -05:00
Andrew Kelley 89e107ee4e
uncomment all the archs in target.zig 2020-01-20 23:14:35 -05:00
Andrew Kelley 6dd514ac8a
aarch64: remove CPU features that are actually just CPUs 2020-01-20 22:49:26 -05:00
Andrew Kelley 6e88883edf
import data from llvm 9 2020-01-20 22:21:45 -05:00
Andrew Kelley 8f29d14073
stage1 is building. `zig targets` now self-hosted 2020-01-20 01:42:31 -05:00
Andrew Kelley e3b5e91878
do the x86 arch 2020-01-19 20:54:05 -05:00
Andrew Kelley a867b43366
progress towards merging
see BRANCH_TODO file
2020-01-19 20:54:04 -05:00
Layne Gustafson de8a5cf5f5
Remove features/cpus not in LLVM v9 2020-01-19 20:53:20 -05:00
Layne Gustafson 03dd376b55
Add builtin.zig support 2020-01-19 20:53:19 -05:00
Layne Gustafson 79a2747de4
Add llvm_name to feature defs 2020-01-19 20:53:19 -05:00
Layne Gustafson e4ecdefa9a
Rename subfeatures -> dependencies 2020-01-19 20:53:19 -05:00
Layne Gustafson 51372200d3
Filter out non-features 2020-01-19 20:53:19 -05:00
Layne Gustafson c8f1e0d6d8
Remove llvm_name from features 2020-01-19 20:53:19 -05:00
Layne Gustafson c131e50ea7
Switch CPU/features to simple format 2020-01-19 20:53:18 -05:00
Layne Gustafson 21908e100e
Fix CPU and feature defs 2020-01-19 20:53:18 -05:00
Layne Gustafson 8f191e0166
Update term feature deps -> subfeatures 2020-01-19 20:53:18 -05:00
Layne Gustafson 0f46c12f78
Create initial target details infrastructure 2020-01-19 20:53:15 -05:00