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gambatte/hwtests/sprites
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sinamas a05aa50c68 various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up. 
git-svn-id: https://gambatte.svn.sourceforge.net/svnroot/gambatte@118 9dfb2916-2d38-0410-aef4-c5fe6c9ffc24
2008-01-31 07:43:54 +00:00
..
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2007-08-22 02:36:41 +00:00
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wx affects sprite m3 cycles. cache m3 cycles, related refactoring. readjust cgb dma cycles to previously changed m3 timing. clean up goofy lyc calculation.
2008-01-08 05:02:29 +00:00
1spritesPrLine_1sprite8pBgCover_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
1spritesPrLine_1sprite8pBgCover_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
1spritesPrLine_1sprite8pBgPrior_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
1spritesPrLine_1sprite8pBgPrior_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
1spritesPrLine_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
1spritesPrLine_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
1spritesPrLine_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
1spritesPrLine_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
1spritesPrLine_offset7_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
1spritesPrLine_offset7_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
1spritesPrLine_scx1_offset7_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
1spritesPrLine_scx1_offset7_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
2spritesPrLine_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
2spritesPrLine_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
2spritesPrLine_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
2spritesPrLine_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
3spritesPrLine_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
3spritesPrLine_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
3spritesPrLine_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
3spritesPrLine_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
4spritesPrLine_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
4spritesPrLine_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
4spritesPrLine_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
4spritesPrLine_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
5spritesPrLine_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
5spritesPrLine_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
5spritesPrLine_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
5spritesPrLine_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
6spritesPrLine_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
6spritesPrLine_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
6spritesPrLine_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
6spritesPrLine_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
7spritesPrLine_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
7spritesPrLine_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
7spritesPrLine_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
7spritesPrLine_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
8spritesPrLine_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
8spritesPrLine_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
8spritesPrLine_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
8spritesPrLine_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
9spritesPrLine_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
9spritesPrLine_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
9spritesPrLine_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
9spritesPrLine_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa0_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa0_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa1_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa1_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa2_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa2_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa3_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa3_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa4_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa4_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa5_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa5_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa6_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa6_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa7_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_1xposa7_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap1_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap1_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap2_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap2_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap3_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap3_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap4_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap4_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap5_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap5_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap6_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap6_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap7_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap7_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap8_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2overlap8_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2xposa2overlap8_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2xposa2overlap8_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2xposa7overlap8_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_2xposa7overlap8_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_3overlap8_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesprline_3overlap8_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
10spritesPrLine_1xpos0_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
10spritesPrLine_1xpos0_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
10spritesPrLine_1xposA8_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
10spritesPrLine_1xposA8_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
10spritesprline_m0stat_1.gb
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2007-08-22 02:36:41 +00:00
10spritesprline_m0stat_2.gb
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2007-08-22 02:36:41 +00:00
10spritesPrLine_m2stat_1.gb
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2007-08-22 02:36:41 +00:00
10spritesPrLine_m2stat_2.gb
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2007-08-22 02:36:41 +00:00
10spritesPrLine_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
10spritesPrLine_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
10spritesPrLine_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
10spritesPrLine_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00
11spritesPrLine_10xposA8.gb
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2007-08-22 02:36:41 +00:00
11spritesPrLine_10xposA8.gbc
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2007-08-22 02:36:41 +00:00
late_disable_ds_1.gbc
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2007-08-22 02:36:41 +00:00
late_sizechange_1.gb
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2007-08-22 02:36:41 +00:00
late_sizechange_2.gb
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2007-08-22 02:36:41 +00:00
late_sizechange_ds_1.gbc
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2007-08-22 02:36:41 +00:00
late_sizechange_ds_2.gbc
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2007-08-22 02:36:41 +00:00
late_sizechange_sp00_1_out0.gb
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp00_2_out3.gb
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp00_3_out3.gb
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp00_4_out0.gb
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp00_ds_1_out0.gbc
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp00_ds_2_out3.gbc
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp01_1_out0.gb
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp01_2_out3.gb
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp01_ds_1_out0.gbc
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp01_ds_2_out3.gbc
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp02_1_out0.gb
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp02_2_out3.gb
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp39_1_out0.gb
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp39_2_out3.gb
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp39_ds_1_out0.gbc
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
late_sizechange_sp39_ds_2_out3.gbc
various oamdma accuracy. oamdma bus conflicts with cpu, ppu, cgbdma. rewritten memory read/write methods. accurate timing of ppu sprite mapping reads. fix recent cgb sprite cycles sorting slip up.
2008-01-31 07:43:54 +00:00
mix_m3stat_1.gb
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2007-08-22 02:36:41 +00:00
mix_m3stat_2.gb
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2007-08-22 02:36:41 +00:00
mix_m3stat_ds_1.gbc
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2007-08-22 02:36:41 +00:00
mix_m3stat_ds_2.gbc
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2007-08-22 02:36:41 +00:00