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gambatte/test/hwtests
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sinamas 1a0ce36a69 libgambatte: speed change re work 
Findings of note:
- The LCD (PPU) can seemingly end up at a cycle offset relative to the
CPU that is a non-multiple of 4 when switching away from double speed
mode (as compared with normal). The behaviour appears equivalent to a
CPU tick being skipped relative to the LCD/PPU, which can result in 2
different offsets depending on whether the speed change is done at an
odd M-cycle (i.e. an odd multiple of 4 cycles in double speed mode).
This will also seemingly carry over to double speed mode upon another
speed change, and, repeated speed changes can seemingly produce all 4
offsets.
2019-09-30 17:45:53 +02:00
..
bgen
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
bgtiledata
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
bgtilemap
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
cgbpal_m3
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
display_startstate
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
div
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
dma
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
dmgpalette_during_m3
rename test directory.
2014-07-24 13:00:59 +02:00
enable_display
libgambatte: lcdc enable ds timing re work and simplification
2019-09-30 16:30:27 +02:00
halt
libgambatte: halt re work
2019-03-31 23:46:26 +02:00
irq_precedence
libgambatte: irq timing detail re work
2019-03-25 23:31:04 +01:00
lcdirq_precedence
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
ly0
libgambatte: irq timing detail re work
2019-03-25 23:31:04 +01:00
lyc0int_m0irq
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
lyc153int_m2irq
libgambatte: irq timing detail re work
2019-03-25 23:31:04 +01:00
lycEnable
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
lycint_ly
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
lycint_lycflag
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
lycint_lycirq
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
lycint_m0stat
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
lycm2int
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
lywrite
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
m0enable
libgambatte: lcdc enable ds timing re work and simplification
2019-09-30 16:30:27 +02:00
m0int_m0irq
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
m0int_m0stat
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
m0int_m3stat
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
m1
libgambatte: more lcd mode 2 status irq re work
2019-04-10 09:11:40 +02:00
m2enable
libgambatte: subject m2 irqs to lyc comparison latency
2019-04-14 09:18:24 +02:00
m2int_m0irq
libgambatte: irq timing detail re work
2019-03-25 23:31:04 +01:00
m2int_m0stat
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
m2int_m2irq
libgambatte: irq timing detail re work
2019-03-25 23:31:04 +01:00
m2int_m2stat
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
m2int_m3stat
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
miscmstatirq
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
oam_access
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
oamdma
libgambatte: irq precedence timing re work
2019-03-17 18:05:06 +01:00
scx_during_m3
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
scy
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
serial
libgambatte: irq timing detail re work
2019-03-25 23:31:04 +01:00
sound
libgambatte: speed change re work
2019-09-30 17:45:53 +02:00
speedchange
libgambatte: speed change re work
2019-09-30 17:45:53 +02:00
sprites
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
tima
verify DMG TIMA test output
2019-03-31 23:42:46 +02:00
vram_m3
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
vramw_m3end
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
window
hwtests: indicate cgb revision tested.
2015-03-23 02:19:55 +01:00
cgb_bgp_dumper.asm
rename test directory.
2014-07-24 13:00:59 +02:00
cgb_objp_dumper.asm
rename test directory.
2014-07-24 13:00:59 +02:00
fexx_ffxx_dumper_cgb.bin
rename test directory.
2014-07-24 13:00:59 +02:00
fexx_ffxx_dumper_dmg08.bin
rename test directory.
2014-07-24 13:00:59 +02:00
fexx_ffxx_dumper.asm
rename test directory.
2014-07-24 13:00:59 +02:00
fexx_read_reset_set_dumper_cgb.bin
rename test directory.
2014-07-24 13:00:59 +02:00
fexx_read_reset_set_dumper_dmg08.bin
rename test directory.
2014-07-24 13:00:59 +02:00
fexx_read_reset_set_dumper.asm
rename test directory.
2014-07-24 13:00:59 +02:00
ioregs_reset_dumper_cgb.bin
rename test directory.
2014-07-24 13:00:59 +02:00
ioregs_reset_dumper_dmg08.bin
rename test directory.
2014-07-24 13:00:59 +02:00
ioregs_reset_dumper.asm
rename test directory.
2014-07-24 13:00:59 +02:00
jpadirq_1.asm
rename test directory.
2014-07-24 13:00:59 +02:00
jpadirq_2.asm
rename test directory.
2014-07-24 13:00:59 +02:00
jpadirq.txt
test: add a textual description of jpad irq observations.
2014-07-26 17:40:15 +02:00
sram.asm
rename test directory.
2014-07-24 13:00:59 +02:00
vram_dumper_cgb.bin
rename test directory.
2014-07-24 13:00:59 +02:00
vram_dumper_dmg08.bin
rename test directory.
2014-07-24 13:00:59 +02:00
vram_dumper.asm
rename test directory.
2014-07-24 13:00:59 +02:00
wram_dumper_cgb.bin
rename test directory.
2014-07-24 13:00:59 +02:00
wram_dumper_dmg08.bin
rename test directory.
2014-07-24 13:00:59 +02:00
wram_dumper.asm
rename test directory.
2014-07-24 13:00:59 +02:00