10 Commits

Author SHA1 Message Date
sinamas
7f31aca5c2 verify DMG TIMA test output 2019-03-31 23:42:46 +02:00
sinamas
ac291bc950 libgambatte: irq timing detail re work
Besides the improved coverage, this uncovered a few off-by-ones w.r.t.
IF writes, and IRQ ACK timing.

The IF write adjustment is a one-liner that has as consequence that mode
0 IRQs for lines with particular timing (e.g. due to scx offsets and/or
object positions) can be overwritten at up to one instruction earlier
than previously.

The ACK-related adjustments have consequence for cases when the same IRQ
is reasserted shortly after it has effected an interrupt in the sense
that, for the affected IRQs, the time window for when this will be
ignored is up to one instruction longer.
2019-03-25 23:31:04 +01:00
sinamas
61e51c9417 libgambatte: irq ack timing re work 2019-03-18 13:46:08 +01:00
sinamas
b1b49a507a improve halt test coverage 2019-03-18 07:22:19 +01:00
sinamas
659b5508b3 libgambatte: irq precedence timing re work
fixes Pinball Deluxe.
2019-03-17 18:05:06 +01:00
sinamas
2b474ca1bc libgambatte: oam dma re work 2019-02-24 19:00:26 +01:00
sinamas
f9fb003e1a hwtests: indicate cgb revision tested. 2015-03-23 02:19:55 +01:00
sinamas
46e06da8bd libgambatte: push return address after pc mod.
unsurprising that the call target is fetched prior to
pushing the return address (sufficiently so to verify
this based on wtf-factor alone, really). more surprising
that the 4 cycle delay that accompanies pc mods also
precedes it.

"woody woodpecker racing" barely avoids an oam dma bus
conflict due to this fact.
2014-12-14 11:13:14 +01:00
sinamas
4fb609ee01 test: add a textual description of jpad irq observations.
this would seem worthwile with the relevant tests lacking a
specification of expected output (for now at least).
2014-07-26 17:40:15 +02:00
sinamas
29aa0cb538 rename test directory. 2014-07-24 13:00:59 +02:00