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Add alloying recipes for cheaper digiline cables (#198)

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* cheaper recipes for lv,mv,hv digiline cable and plate

* Revert "cheaper recipes for lv,mv,hv digiline cable and plate"

This reverts commit d1ee15fc3afbf567c2050656e0799d07c9aef661.

* add config option to replace "technic:" recipes

* trailing whitespace removed

* Revert "trailing whitespace removed"

This reverts commit cc0f321cbb40b890e5f60443d7c676ba3d8036e9.

* Revert "add config option to replace "technic:" recipes"

This reverts commit 33c272f38ed2f7bd8d53b3b0d21034b973b586da.

* add alternative alloy recipes for lv,mv,hv digiline cable und plate

* longer alloying time for digi cables (3x)

* digi cable crafting recipes removed

* fix lint: line is too long (122 > 120)

Co-authored-by: SX <50966843+S-S-X@users.noreply.github.com>
This commit is contained in:
nixnoxus 2021-08-06 19:42:24 +02:00 committed by GitHub
parent 5b2e3d9970
commit 05cbffbc3f
4 changed files with 19 additions and 94 deletions
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30
technic/machines/HV/cables.lua
View File

@ -13,36 +13,6 @@ if minetest.get_modpath("digilines") then
local S = technic.getter
if minetest.get_modpath("digistuff") then
minetest.register_craft({
output = 'technic:hv_digi_cable 1',
type = "shapeless",
recipe = {'digistuff:digimese', 'technic:hv_cable'}
})
minetest.register_craft({
output = 'technic:hv_digi_cable_plate_1 1',
type = "shapeless",
recipe = {'digistuff:digimese', 'technic:hv_cable_plate_1'}
})
else
minetest.register_craft({
output = 'technic:hv_digi_cable 1',
recipe = {
{'digilines:wire_std_00000000', 'digilines:wire_std_00000000', 'digilines:wire_std_00000000'},
{'digilines:wire_std_00000000', 'technic:hv_cable', 'digilines:wire_std_00000000'},
{'digilines:wire_std_00000000', 'digilines:wire_std_00000000', 'digilines:wire_std_00000000'},
}
})
minetest.register_craft({
output = 'technic:hv_digi_cable_plate_1 1',
recipe = {
{'digilines:wire_std_00000000', 'digilines:wire_std_00000000', 'digilines:wire_std_00000000'},
{'digilines:wire_std_00000000', 'technic:hv_cable_plate_1', 'digilines:wire_std_00000000'},
{'digilines:wire_std_00000000', 'digilines:wire_std_00000000', 'digilines:wire_std_00000000'},
}
})
end
technic.register_cable("HV", 3/16, S("HV Cable (digiline)"), "_digi", {
digiline = {
wire = {

30
technic/machines/LV/cables.lua
View File

@ -16,36 +16,6 @@ if minetest.get_modpath("digilines") then
local S = technic.getter
if minetest.get_modpath("digistuff") then
minetest.register_craft({
output = 'technic:lv_digi_cable 1',
type = "shapeless",
recipe = {'digistuff:digimese', 'technic:lv_cable'}
})
minetest.register_craft({
output = 'technic:lv_digi_cable_plate_1 1',
type = "shapeless",
recipe = {'digistuff:digimese', 'technic:lv_cable_plate_1'}
})
else
minetest.register_craft({
output = 'technic:lv_digi_cable 1',
recipe = {
{'digilines:wire_std_00000000', 'digilines:wire_std_00000000', 'digilines:wire_std_00000000'},
{'digilines:wire_std_00000000', 'technic:lv_cable', 'digilines:wire_std_00000000'},
{'digilines:wire_std_00000000', 'digilines:wire_std_00000000', 'digilines:wire_std_00000000'},
}
})
minetest.register_craft({
output = 'technic:lv_digi_cable_plate_1 1',
recipe = {
{'digilines:wire_std_00000000', 'digilines:wire_std_00000000', 'digilines:wire_std_00000000'},
{'digilines:wire_std_00000000', 'technic:lv_cable_plate_1', 'digilines:wire_std_00000000'},
{'digilines:wire_std_00000000', 'digilines:wire_std_00000000', 'digilines:wire_std_00000000'},
}
})
end
technic.register_cable("LV", 2/16, S("LV Cable (digiline)"), "_digi", {
digiline = {
wire = {

30
technic/machines/MV/cables.lua
View File

@ -16,36 +16,6 @@ if minetest.get_modpath("digilines") then
local S = technic.getter
if minetest.get_modpath("digistuff") then
minetest.register_craft({
output = 'technic:mv_digi_cable 1',
type = "shapeless",
recipe = {'digistuff:digimese', 'technic:mv_cable'}
})
minetest.register_craft({
output = 'technic:mv_digi_cable_plate_1 1',
type = "shapeless",
recipe = {'digistuff:digimese', 'technic:mv_cable_plate_1'}
})
else
minetest.register_craft({
output = 'technic:mv_digi_cable 1',
recipe = {
{'digilines:wire_std_00000000', 'digilines:wire_std_00000000', 'digilines:wire_std_00000000'},
{'digilines:wire_std_00000000', 'technic:mv_cable', 'digilines:wire_std_00000000'},
{'digilines:wire_std_00000000', 'digilines:wire_std_00000000', 'digilines:wire_std_00000000'},
}
})
minetest.register_craft({
output = 'technic:mv_digi_cable_plate_1 1',
recipe = {
{'digilines:wire_std_00000000', 'digilines:wire_std_00000000', 'digilines:wire_std_00000000'},
{'digilines:wire_std_00000000', 'technic:mv_cable_plate_1', 'digilines:wire_std_00000000'},
{'digilines:wire_std_00000000', 'digilines:wire_std_00000000', 'digilines:wire_std_00000000'},
}
})
end
technic.register_cable("MV", 2.5/16, S("MV Cable (digiline)"), "_digi", {
digiline = {
wire = {

15
technic/machines/register/alloy_recipes.lua
View File

@ -39,6 +39,21 @@ if minetest.get_modpath("ethereal") then
table.insert(recipes, {"default:clay", "dye:grey", "bakedclay:grey"})
end
if minetest.get_modpath("digilines") then
table.insert(recipes,
{"technic:lv_cable", "digilines:wire_std_00000000 2", "technic:lv_digi_cable", 18})
table.insert(recipes,
{"technic:lv_cable_plate_1", "digilines:wire_std_00000000 2", "technic:lv_digi_cable_plate_1", 18})
table.insert(recipes,
{"technic:mv_cable", "digilines:wire_std_00000000 2", "technic:mv_digi_cable", 18})
table.insert(recipes,
{"technic:mv_cable_plate_1", "digilines:wire_std_00000000 2", "technic:mv_digi_cable_plate_1", 18})
table.insert(recipes,
{"technic:hv_cable", "digilines:wire_std_00000000 2", "technic:hv_digi_cable", 18})
table.insert(recipes,
{"technic:hv_cable_plate_1", "digilines:wire_std_00000000 2", "technic:hv_digi_cable_plate_1", 18})
end
for _, data in pairs(recipes) do
technic.register_alloy_recipe({input = {data[1], data[2]}, output = data[3], time = data[4]})
end