330 lines
12 KiB
C++
330 lines
12 KiB
C++
#include "config.h"
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#include <arm_neon.h>
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#include <limits>
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#include "AL/al.h"
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#include "AL/alc.h"
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#include "alcmain.h"
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#include "alu.h"
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#include "hrtf.h"
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#include "defs.h"
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#include "hrtfbase.h"
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namespace {
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inline void ApplyCoeffs(float2 *RESTRICT Values, const ALuint IrSize, const HrirArray &Coeffs,
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const float left, const float right)
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{
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float32x4_t leftright4;
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{
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float32x2_t leftright2 = vdup_n_f32(0.0);
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leftright2 = vset_lane_f32(left, leftright2, 0);
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leftright2 = vset_lane_f32(right, leftright2, 1);
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leftright4 = vcombine_f32(leftright2, leftright2);
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}
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ASSUME(IrSize >= 4);
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for(ALuint c{0};c < IrSize;c += 2)
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{
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float32x4_t vals = vld1q_f32(&Values[c][0]);
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float32x4_t coefs = vld1q_f32(&Coeffs[c][0]);
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vals = vmlaq_f32(vals, coefs, leftright4);
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vst1q_f32(&Values[c][0], vals);
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}
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}
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} // namespace
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template<>
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const ALfloat *Resample_<LerpTag,NEONTag>(const InterpState*, const ALfloat *RESTRICT src,
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ALuint frac, ALuint increment, const al::span<float> dst)
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{
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const int32x4_t increment4 = vdupq_n_s32(static_cast<int>(increment*4));
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const float32x4_t fracOne4 = vdupq_n_f32(1.0f/FRACTIONONE);
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const int32x4_t fracMask4 = vdupq_n_s32(FRACTIONMASK);
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alignas(16) ALuint pos_[4], frac_[4];
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int32x4_t pos4, frac4;
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InitPosArrays(frac, increment, frac_, pos_, 4);
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frac4 = vld1q_s32(reinterpret_cast<int*>(frac_));
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pos4 = vld1q_s32(reinterpret_cast<int*>(pos_));
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auto dst_iter = dst.begin();
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const auto aligned_end = (dst.size()&~3u) + dst_iter;
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while(dst_iter != aligned_end)
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{
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const int pos0{vgetq_lane_s32(pos4, 0)};
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const int pos1{vgetq_lane_s32(pos4, 1)};
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const int pos2{vgetq_lane_s32(pos4, 2)};
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const int pos3{vgetq_lane_s32(pos4, 3)};
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const float32x4_t val1{src[pos0], src[pos1], src[pos2], src[pos3]};
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const float32x4_t val2{src[pos0+1], src[pos1+1], src[pos2+1], src[pos3+1]};
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/* val1 + (val2-val1)*mu */
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const float32x4_t r0{vsubq_f32(val2, val1)};
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const float32x4_t mu{vmulq_f32(vcvtq_f32_s32(frac4), fracOne4)};
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const float32x4_t out{vmlaq_f32(val1, mu, r0)};
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vst1q_f32(dst_iter, out);
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dst_iter += 4;
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frac4 = vaddq_s32(frac4, increment4);
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pos4 = vaddq_s32(pos4, vshrq_n_s32(frac4, FRACTIONBITS));
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frac4 = vandq_s32(frac4, fracMask4);
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}
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if(dst_iter != dst.end())
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{
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src += static_cast<ALuint>(vgetq_lane_s32(pos4, 0));
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frac = static_cast<ALuint>(vgetq_lane_s32(frac4, 0));
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do {
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*(dst_iter++) = lerp(src[0], src[1], static_cast<float>(frac) * (1.0f/FRACTIONONE));
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frac += increment;
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src += frac>>FRACTIONBITS;
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frac &= FRACTIONMASK;
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} while(dst_iter != dst.end());
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}
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return dst.begin();
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}
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template<>
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const ALfloat *Resample_<BSincTag,NEONTag>(const InterpState *state, const ALfloat *RESTRICT src,
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ALuint frac, ALuint increment, const al::span<float> dst)
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{
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const float *const filter{state->bsinc.filter};
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const float32x4_t sf4{vdupq_n_f32(state->bsinc.sf)};
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const size_t m{state->bsinc.m};
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src -= state->bsinc.l;
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for(float &out_sample : dst)
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{
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// Calculate the phase index and factor.
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#define FRAC_PHASE_BITDIFF (FRACTIONBITS-BSINC_PHASE_BITS)
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const ALuint pi{frac >> FRAC_PHASE_BITDIFF};
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const float pf{static_cast<float>(frac & ((1<<FRAC_PHASE_BITDIFF)-1)) *
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(1.0f/(1<<FRAC_PHASE_BITDIFF))};
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#undef FRAC_PHASE_BITDIFF
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// Apply the scale and phase interpolated filter.
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float32x4_t r4{vdupq_n_f32(0.0f)};
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{
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const float32x4_t pf4{vdupq_n_f32(pf)};
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const float *fil{filter + m*pi*4};
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const float *phd{fil + m};
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const float *scd{phd + m};
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const float *spd{scd + m};
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size_t td{m >> 2};
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size_t j{0u};
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do {
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/* f = ((fil + sf*scd) + pf*(phd + sf*spd)) */
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const float32x4_t f4 = vmlaq_f32(
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vmlaq_f32(vld1q_f32(fil), sf4, vld1q_f32(scd)),
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pf4, vmlaq_f32(vld1q_f32(phd), sf4, vld1q_f32(spd)));
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fil += 4; scd += 4; phd += 4; spd += 4;
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/* r += f*src */
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r4 = vmlaq_f32(r4, f4, vld1q_f32(&src[j]));
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j += 4;
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} while(--td);
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}
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r4 = vaddq_f32(r4, vrev64q_f32(r4));
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out_sample = vget_lane_f32(vadd_f32(vget_low_f32(r4), vget_high_f32(r4)), 0);
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frac += increment;
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src += frac>>FRACTIONBITS;
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frac &= FRACTIONMASK;
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}
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return dst.begin();
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}
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template<>
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const ALfloat *Resample_<FastBSincTag,NEONTag>(const InterpState *state,
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const ALfloat *RESTRICT src, ALuint frac, ALuint increment, const al::span<float> dst)
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{
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const float *const filter{state->bsinc.filter};
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const size_t m{state->bsinc.m};
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src -= state->bsinc.l;
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for(float &out_sample : dst)
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{
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// Calculate the phase index and factor.
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#define FRAC_PHASE_BITDIFF (FRACTIONBITS-BSINC_PHASE_BITS)
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const ALuint pi{frac >> FRAC_PHASE_BITDIFF};
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const float pf{static_cast<float>(frac & ((1<<FRAC_PHASE_BITDIFF)-1)) *
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(1.0f/(1<<FRAC_PHASE_BITDIFF))};
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#undef FRAC_PHASE_BITDIFF
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// Apply the phase interpolated filter.
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float32x4_t r4{vdupq_n_f32(0.0f)};
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{
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const float32x4_t pf4{vdupq_n_f32(pf)};
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const float *fil{filter + m*pi*4};
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const float *phd{fil + m};
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size_t td{m >> 2};
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size_t j{0u};
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do {
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/* f = fil + pf*phd */
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const float32x4_t f4 = vmlaq_f32(vld1q_f32(fil), pf4, vld1q_f32(phd));
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/* r += f*src */
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r4 = vmlaq_f32(r4, f4, vld1q_f32(&src[j]));
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fil += 4; phd += 4; j += 4;
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} while(--td);
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}
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r4 = vaddq_f32(r4, vrev64q_f32(r4));
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out_sample = vget_lane_f32(vadd_f32(vget_low_f32(r4), vget_high_f32(r4)), 0);
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frac += increment;
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src += frac>>FRACTIONBITS;
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frac &= FRACTIONMASK;
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}
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return dst.begin();
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}
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template<>
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void MixHrtf_<NEONTag>(FloatBufferLine &LeftOut, FloatBufferLine &RightOut,
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const float *InSamples, float2 *AccumSamples, const size_t OutPos, const ALuint IrSize,
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MixHrtfFilter *hrtfparams, const size_t BufferSize)
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{
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MixHrtfBase<ApplyCoeffs>(LeftOut, RightOut, InSamples, AccumSamples, OutPos, IrSize,
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hrtfparams, BufferSize);
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}
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template<>
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void MixHrtfBlend_<NEONTag>(FloatBufferLine &LeftOut, FloatBufferLine &RightOut,
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const float *InSamples, float2 *AccumSamples, const size_t OutPos, const ALuint IrSize,
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const HrtfFilter *oldparams, MixHrtfFilter *newparams, const size_t BufferSize)
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{
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MixHrtfBlendBase<ApplyCoeffs>(LeftOut, RightOut, InSamples, AccumSamples, OutPos, IrSize,
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oldparams, newparams, BufferSize);
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}
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template<>
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void MixDirectHrtf_<NEONTag>(FloatBufferLine &LeftOut, FloatBufferLine &RightOut,
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const al::span<const FloatBufferLine> InSamples, float2 *AccumSamples, DirectHrtfState *State,
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const size_t BufferSize)
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{ MixDirectHrtfBase<ApplyCoeffs>(LeftOut, RightOut, InSamples, AccumSamples, State, BufferSize); }
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template<>
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void Mix_<NEONTag>(const al::span<const float> InSamples, const al::span<FloatBufferLine> OutBuffer,
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float *CurrentGains, const float *TargetGains, const size_t Counter, const size_t OutPos)
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{
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const ALfloat delta{(Counter > 0) ? 1.0f / static_cast<ALfloat>(Counter) : 0.0f};
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const bool reached_target{InSamples.size() >= Counter};
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const auto min_end = reached_target ? InSamples.begin() + Counter : InSamples.end();
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const auto aligned_end = minz(static_cast<uintptr_t>(min_end-InSamples.begin()+3) & ~3u,
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InSamples.size()) + InSamples.begin();
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for(FloatBufferLine &output : OutBuffer)
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{
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ALfloat *RESTRICT dst{al::assume_aligned<16>(output.data()+OutPos)};
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ALfloat gain{*CurrentGains};
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const ALfloat diff{*TargetGains - gain};
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auto in_iter = InSamples.begin();
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if(std::fabs(diff) > std::numeric_limits<float>::epsilon())
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{
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const ALfloat step{diff * delta};
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ALfloat step_count{0.0f};
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/* Mix with applying gain steps in aligned multiples of 4. */
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if(ptrdiff_t todo{(min_end-in_iter) >> 2})
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{
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const float32x4_t four4{vdupq_n_f32(4.0f)};
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const float32x4_t step4{vdupq_n_f32(step)};
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const float32x4_t gain4{vdupq_n_f32(gain)};
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float32x4_t step_count4{vsetq_lane_f32(0.0f,
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vsetq_lane_f32(1.0f,
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vsetq_lane_f32(2.0f,
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vsetq_lane_f32(3.0f, vdupq_n_f32(0.0f), 3),
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2), 1), 0
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)};
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do {
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const float32x4_t val4 = vld1q_f32(in_iter);
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float32x4_t dry4 = vld1q_f32(dst);
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dry4 = vmlaq_f32(dry4, val4, vmlaq_f32(gain4, step4, step_count4));
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step_count4 = vaddq_f32(step_count4, four4);
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vst1q_f32(dst, dry4);
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in_iter += 4; dst += 4;
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} while(--todo);
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/* NOTE: step_count4 now represents the next four counts after
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* the last four mixed samples, so the lowest element
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* represents the next step count to apply.
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*/
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step_count = vgetq_lane_f32(step_count4, 0);
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}
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/* Mix with applying left over gain steps that aren't aligned multiples of 4. */
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while(in_iter != min_end)
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{
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*(dst++) += *(in_iter++) * (gain + step*step_count);
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step_count += 1.0f;
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}
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if(reached_target)
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gain = *TargetGains;
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else
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gain += step*step_count;
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*CurrentGains = gain;
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/* Mix until pos is aligned with 4 or the mix is done. */
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while(in_iter != aligned_end)
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*(dst++) += *(in_iter++) * gain;
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}
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++CurrentGains;
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++TargetGains;
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if(!(std::fabs(gain) > GAIN_SILENCE_THRESHOLD))
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continue;
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if(ptrdiff_t todo{(InSamples.end()-in_iter) >> 2})
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{
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const float32x4_t gain4 = vdupq_n_f32(gain);
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do {
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const float32x4_t val4 = vld1q_f32(in_iter);
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float32x4_t dry4 = vld1q_f32(dst);
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dry4 = vmlaq_f32(dry4, val4, gain4);
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vst1q_f32(dst, dry4);
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in_iter += 4; dst += 4;
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} while(--todo);
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}
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while(in_iter != InSamples.end())
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*(dst++) += *(in_iter++) * gain;
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}
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}
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template<>
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void MixRow_<NEONTag>(const al::span<float> OutBuffer, const al::span<const float> Gains,
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const float *InSamples, const size_t InStride)
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{
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for(const ALfloat gain : Gains)
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{
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const ALfloat *RESTRICT input{InSamples};
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InSamples += InStride;
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if(!(std::fabs(gain) > GAIN_SILENCE_THRESHOLD))
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continue;
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auto out_iter = OutBuffer.begin();
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if(size_t todo{OutBuffer.size() >> 2})
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{
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const float32x4_t gain4{vdupq_n_f32(gain)};
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do {
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const float32x4_t val4 = vld1q_f32(input);
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float32x4_t dry4 = vld1q_f32(out_iter);
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dry4 = vmlaq_f32(dry4, val4, gain4);
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vst1q_f32(out_iter, dry4);
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out_iter += 4; input += 4;
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} while(--todo);
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}
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auto do_mix = [gain](const float cur, const float src) noexcept -> float
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{ return cur + src*gain; };
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std::transform(out_iter, OutBuffer.end(), input, out_iter, do_mix);
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}
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}
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