Add NEON-enhanced resamplers
This commit is contained in:
Chris Robinson
parent
427f484e01
commit
27695e2b24
16
Alc/mixer.c
16
Alc/mixer.c
@ -113,6 +113,10 @@ static inline ResamplerFunc SelectResampler(enum Resampler resampler)
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case PointResampler:
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return Resample_point32_C;
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case LinearResampler:
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#ifdef HAVE_NEON
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if((CPUCapFlags&CPU_CAP_NEON))
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return Resample_lerp32_Neon;
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#endif
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#ifdef HAVE_SSE4_1
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if((CPUCapFlags&CPU_CAP_SSE4_1))
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return Resample_lerp32_SSE41;
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@ -123,6 +127,10 @@ static inline ResamplerFunc SelectResampler(enum Resampler resampler)
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#endif
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return Resample_lerp32_C;
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case FIR4Resampler:
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#ifdef HAVE_NEON
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if((CPUCapFlags&CPU_CAP_NEON))
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return Resample_fir4_32_Neon;
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#endif
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#ifdef HAVE_SSE4_1
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if((CPUCapFlags&CPU_CAP_SSE4_1))
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return Resample_fir4_32_SSE41;
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@ -133,6 +141,10 @@ static inline ResamplerFunc SelectResampler(enum Resampler resampler)
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#endif
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return Resample_fir4_32_C;
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case FIR8Resampler:
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#ifdef HAVE_NEON
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if((CPUCapFlags&CPU_CAP_NEON))
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return Resample_fir8_32_Neon;
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#endif
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#ifdef HAVE_SSE4_1
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if((CPUCapFlags&CPU_CAP_SSE4_1))
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return Resample_fir8_32_SSE41;
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@ -143,6 +155,10 @@ static inline ResamplerFunc SelectResampler(enum Resampler resampler)
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#endif
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return Resample_fir8_32_C;
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case BSincResampler:
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#ifdef HAVE_NEON
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if((CPUCapFlags&CPU_CAP_NEON))
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return Resample_bsinc32_Neon;
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#endif
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#ifdef HAVE_SSE
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if((CPUCapFlags&CPU_CAP_SSE))
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return Resample_bsinc32_SSE;
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@ -67,10 +67,6 @@ inline void InitiatePositionArrays(ALuint frac, ALint increment, ALuint *restric
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}
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}
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const ALfloat *Resample_bsinc32_SSE(const BsincState *state, const ALfloat *restrict src,
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ALuint frac, ALint increment, ALfloat *restrict dst,
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ALsizei dstlen);
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const ALfloat *Resample_lerp32_SSE2(const BsincState *state, const ALfloat *restrict src,
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ALuint frac, ALint increment, ALfloat *restrict dst,
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ALsizei numsamples);
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@ -92,6 +88,10 @@ const ALfloat *Resample_fir8_32_SSE41(const BsincState *state, const ALfloat *re
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ALuint frac, ALint increment, ALfloat *restrict dst,
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ALsizei numsamples);
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const ALfloat *Resample_bsinc32_SSE(const BsincState *state, const ALfloat *restrict src,
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ALuint frac, ALint increment, ALfloat *restrict dst,
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ALsizei dstlen);
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/* Neon mixers */
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void MixHrtf_Neon(ALfloat *restrict LeftOut, ALfloat *restrict RightOut,
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const ALfloat *data, ALsizei Counter, ALsizei Offset, ALsizei OutPos,
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@ -108,4 +108,18 @@ void MixRow_Neon(ALfloat *OutBuffer, const ALfloat *Gains,
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const ALfloat (*restrict data)[BUFFERSIZE], ALsizei InChans,
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ALsizei InPos, ALsizei BufferSize);
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/* Neon resamplers */
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const ALfloat *Resample_lerp32_Neon(const BsincState *state, const ALfloat *restrict src,
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ALuint frac, ALint increment, ALfloat *restrict dst,
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ALsizei numsamples);
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const ALfloat *Resample_fir4_32_Neon(const BsincState *state, const ALfloat *restrict src,
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ALuint frac, ALint increment, ALfloat *restrict dst,
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ALsizei numsamples);
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const ALfloat *Resample_fir8_32_Neon(const BsincState *state, const ALfloat *restrict src,
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ALuint frac, ALint increment, ALfloat *restrict dst,
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ALsizei numsamples);
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const ALfloat *Resample_bsinc32_Neon(const BsincState *state, const ALfloat *restrict src,
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ALuint frac, ALint increment, ALfloat *restrict dst,
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ALsizei dstlen);
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#endif /* MIXER_DEFS_H */
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260
Alc/mixer_neon.c
260
Alc/mixer_neon.c
@ -7,6 +7,266 @@
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#include "alMain.h"
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#include "alu.h"
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#include "hrtf.h"
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#include "mixer_defs.h"
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#ifdef __GNUC__
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#define ASSUME_ALIGNED(ptr, ...) __builtin_assume_aligned((ptr), __VA_ARGS__)
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#else
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#define ASSUME_ALIGNED(ptr, ...) (ptr)
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#endif
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const ALfloat *Resample_lerp32_Neon(const BsincState* UNUSED(state), const ALfloat *restrict src,
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ALuint frac, ALint increment, ALfloat *restrict dst,
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ALsizei numsamples)
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{
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const int32x4_t increment4 = vdupq_n_s32(increment*4);
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const float32x4_t fracOne4 = vdupq_n_f32(1.0f/FRACTIONONE);
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const uint32x4_t fracMask4 = vdupq_n_u32(FRACTIONMASK);
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alignas(16) ALint pos_[4];
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alignas(16) ALuint frac_[4];
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int32x4_t pos4;
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uint32x4_t frac4;
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ALsizei i;
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InitiatePositionArrays(frac, increment, frac_, pos_, 4);
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frac4 = vld1q_u32(frac_);
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pos4 = vld1q_s32(pos_);
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for(i = 0;numsamples-i > 3;i += 4)
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{
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const float32x4_t val1 = (float32x4_t){src[pos_[0]], src[pos_[1]], src[pos_[2]], src[pos_[3]]};
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const float32x4_t val2 = (float32x4_t){src[pos_[0]+1], src[pos_[1]+1], src[pos_[2]+1], src[pos_[3]+1]};
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/* val1 + (val2-val1)*mu */
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const float32x4_t r0 = vsubq_f32(val2, val1);
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const float32x4_t mu = vmulq_f32(vcvtq_f32_u32(frac4), fracOne4);
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const float32x4_t out = vmlaq_f32(val1, mu, r0);
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vst1q_f32(&dst[i], out);
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frac4 = vaddq_u32(frac4, (uint32x4_t)increment4);
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pos4 = vaddq_s32(pos4, (int32x4_t)vshrq_n_u32(frac4, FRACTIONBITS));
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frac4 = vandq_u32(frac4, fracMask4);
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vst1q_s32(pos_, pos4);
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}
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if(i < numsamples)
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{
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/* NOTE: These four elements represent the position *after* the last
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* four samples, so the lowest element is the next position to
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* resample.
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*/
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ALint pos = pos_[0];
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frac = vgetq_lane_u32(frac4, 0);
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do {
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dst[i] = lerp(src[pos], src[pos+1], frac * (1.0f/FRACTIONONE));
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frac += increment;
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pos += frac>>FRACTIONBITS;
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frac &= FRACTIONMASK;
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} while(++i < numsamples);
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}
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return dst;
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}
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const ALfloat *Resample_fir4_32_Neon(const BsincState* UNUSED(state), const ALfloat *restrict src,
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ALuint frac, ALint increment, ALfloat *restrict dst,
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ALsizei numsamples)
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{
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const int32x4_t increment4 = vdupq_n_s32(increment*4);
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const uint32x4_t fracMask4 = vdupq_n_u32(FRACTIONMASK);
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alignas(16) ALint pos_[4];
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alignas(16) ALuint frac_[4];
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int32x4_t pos4;
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uint32x4_t frac4;
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ALsizei i;
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InitiatePositionArrays(frac, increment, frac_, pos_, 4);
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frac4 = vld1q_u32(frac_);
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pos4 = vld1q_s32(pos_);
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--src;
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for(i = 0;numsamples-i > 3;i += 4)
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{
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const float32x4_t val0 = vld1q_f32(&src[pos_[0]]);
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const float32x4_t val1 = vld1q_f32(&src[pos_[1]]);
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const float32x4_t val2 = vld1q_f32(&src[pos_[2]]);
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const float32x4_t val3 = vld1q_f32(&src[pos_[3]]);
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float32x4_t k0 = vld1q_f32(ResampleCoeffs.FIR4[frac_[0]]);
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float32x4_t k1 = vld1q_f32(ResampleCoeffs.FIR4[frac_[1]]);
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float32x4_t k2 = vld1q_f32(ResampleCoeffs.FIR4[frac_[2]]);
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float32x4_t k3 = vld1q_f32(ResampleCoeffs.FIR4[frac_[3]]);
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float32x4_t out;
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k0 = vmulq_f32(k0, val0);
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k1 = vmulq_f32(k1, val1);
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k2 = vmulq_f32(k2, val2);
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k3 = vmulq_f32(k3, val3);
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k0 = vcombine_f32(vpadd_f32(vget_low_f32(k0), vget_high_f32(k0)),
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vpadd_f32(vget_low_f32(k1), vget_high_f32(k1)));
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k2 = vcombine_f32(vpadd_f32(vget_low_f32(k2), vget_high_f32(k2)),
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vpadd_f32(vget_low_f32(k3), vget_high_f32(k3)));
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out = vcombine_f32(vpadd_f32(vget_low_f32(k0), vget_high_f32(k0)),
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vpadd_f32(vget_low_f32(k2), vget_high_f32(k2)));
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vst1q_f32(&dst[i], out);
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frac4 = vaddq_u32(frac4, (uint32x4_t)increment4);
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pos4 = vaddq_s32(pos4, (int32x4_t)vshrq_n_u32(frac4, FRACTIONBITS));
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frac4 = vandq_u32(frac4, fracMask4);
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vst1q_s32(pos_, pos4);
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vst1q_u32(frac_, frac4);
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}
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if(i < numsamples)
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{
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/* NOTE: These four elements represent the position *after* the last
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* four samples, so the lowest element is the next position to
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* resample.
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*/
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ALint pos = pos_[0];
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frac = frac_[0];
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do {
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dst[i] = resample_fir4(src[pos], src[pos+1], src[pos+2], src[pos+3], frac);
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frac += increment;
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pos += frac>>FRACTIONBITS;
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frac &= FRACTIONMASK;
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} while(++i < numsamples);
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}
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return dst;
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}
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const ALfloat *Resample_fir8_32_Neon(const BsincState* UNUSED(state), const ALfloat *restrict src,
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ALuint frac, ALint increment, ALfloat *restrict dst,
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ALsizei numsamples)
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{
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const int32x4_t increment4 = vdupq_n_s32(increment*4);
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const uint32x4_t fracMask4 = vdupq_n_u32(FRACTIONMASK);
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alignas(16) ALint pos_[4];
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alignas(16) ALuint frac_[4];
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int32x4_t pos4;
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uint32x4_t frac4;
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ALsizei i, j;
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InitiatePositionArrays(frac, increment, frac_, pos_, 4);
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frac4 = vld1q_u32(frac_);
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pos4 = vld1q_s32(pos_);
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src -= 3;
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for(i = 0;numsamples-i > 3;i += 4)
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{
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float32x4_t out[2];
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for(j = 0;j < 8;j+=4)
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{
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const float32x4_t val0 = vld1q_f32(&src[pos_[0]+j]);
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const float32x4_t val1 = vld1q_f32(&src[pos_[1]+j]);
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const float32x4_t val2 = vld1q_f32(&src[pos_[2]+j]);
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const float32x4_t val3 = vld1q_f32(&src[pos_[3]+j]);
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float32x4_t k0 = vld1q_f32(&ResampleCoeffs.FIR4[frac_[0]][j]);
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float32x4_t k1 = vld1q_f32(&ResampleCoeffs.FIR4[frac_[1]][j]);
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float32x4_t k2 = vld1q_f32(&ResampleCoeffs.FIR4[frac_[2]][j]);
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float32x4_t k3 = vld1q_f32(&ResampleCoeffs.FIR4[frac_[3]][j]);
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k0 = vmulq_f32(k0, val0);
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k1 = vmulq_f32(k1, val1);
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k2 = vmulq_f32(k2, val2);
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k3 = vmulq_f32(k3, val3);
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k0 = vcombine_f32(vpadd_f32(vget_low_f32(k0), vget_high_f32(k0)),
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vpadd_f32(vget_low_f32(k1), vget_high_f32(k1)));
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k2 = vcombine_f32(vpadd_f32(vget_low_f32(k2), vget_high_f32(k2)),
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vpadd_f32(vget_low_f32(k3), vget_high_f32(k3)));
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out[j>>2] = vcombine_f32(vpadd_f32(vget_low_f32(k0), vget_high_f32(k0)),
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vpadd_f32(vget_low_f32(k2), vget_high_f32(k2)));
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}
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out[0] = vaddq_f32(out[0], out[1]);
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vst1q_f32(&dst[i], out[0]);
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frac4 = vaddq_u32(frac4, (uint32x4_t)increment4);
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pos4 = vaddq_s32(pos4, (int32x4_t)vshrq_n_u32(frac4, FRACTIONBITS));
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frac4 = vandq_u32(frac4, fracMask4);
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vst1q_s32(pos_, pos4);
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vst1q_u32(frac_, frac4);
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}
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if(i < numsamples)
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{
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/* NOTE: These four elements represent the position *after* the last
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* four samples, so the lowest element is the next position to
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* resample.
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*/
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ALint pos = pos_[0];
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frac = frac_[0];
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do {
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dst[i] = resample_fir8(src[pos ], src[pos+1], src[pos+2], src[pos+3],
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src[pos+4], src[pos+5], src[pos+6], src[pos+7], frac);
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frac += increment;
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pos += frac>>FRACTIONBITS;
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frac &= FRACTIONMASK;
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} while(++i < numsamples);
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}
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return dst;
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}
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const ALfloat *Resample_bsinc32_Neon(const BsincState *state, const ALfloat *restrict src,
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ALuint frac, ALint increment, ALfloat *restrict dst,
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ALsizei dstlen)
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{
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const float32x4_t sf4 = vdupq_n_f32(state->sf);
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const ALsizei m = state->m;
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const ALfloat *fil, *scd, *phd, *spd;
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ALsizei pi, i, j;
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float32x4_t r4;
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ALfloat pf;
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src += state->l;
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for(i = 0;i < dstlen;i++)
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{
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// Calculate the phase index and factor.
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#define FRAC_PHASE_BITDIFF (FRACTIONBITS-BSINC_PHASE_BITS)
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pi = frac >> FRAC_PHASE_BITDIFF;
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pf = (frac & ((1<<FRAC_PHASE_BITDIFF)-1)) * (1.0f/(1<<FRAC_PHASE_BITDIFF));
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#undef FRAC_PHASE_BITDIFF
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fil = ASSUME_ALIGNED(state->coeffs[pi].filter, 16);
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scd = ASSUME_ALIGNED(state->coeffs[pi].scDelta, 16);
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phd = ASSUME_ALIGNED(state->coeffs[pi].phDelta, 16);
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spd = ASSUME_ALIGNED(state->coeffs[pi].spDelta, 16);
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// Apply the scale and phase interpolated filter.
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r4 = vdupq_n_f32(0.0f);
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{
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const float32x4_t pf4 = vdupq_n_f32(pf);
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for(j = 0;j < m;j+=4)
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{
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float32x4_t f4 = vmlaq_f32(vld1q_f32(&fil[j]), sf4, vld1q_f32(&scd[j]));
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f4 = vmlaq_f32(f4,
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pf4, vmlaq_f32(vld1q_f32(&phd[j]),
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sf4, vld1q_f32(&spd[j])
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)
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);
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r4 = vmlaq_f32(r4, f4, vld1q_f32(&src[j]));
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}
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}
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r4 = vaddq_f32(r4, vcombine_f32(vrev64_f32(vget_high_f32(r4)),
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vrev64_f32(vget_low_f32(r4))));
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dst[i] = vget_lane_f32(vadd_f32(vget_low_f32(r4), vget_high_f32(r4)), 0);
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frac += increment;
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src += frac>>FRACTIONBITS;
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frac &= FRACTIONMASK;
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}
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return dst;
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}
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static inline void ApplyCoeffsStep(ALsizei Offset, ALfloat (*restrict Values)[2],
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