767 lines
15 KiB
NASM
767 lines
15 KiB
NASM
B>type powerup.asm
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.title "Powerup tests"
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.sbttl "FRENZY"
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.ident POWERUP
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;----------------
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; power up tests
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;----------------
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.insert EQUS
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.extern MAIN,NMI,DSPSW,ALIGN
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; locations NMIflg are scratch flags. they are cleared by the game
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; when it starts up. NMIflg is used to select which nmi routine to run.
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%Zero == .
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.main.::
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nop ;this must be here for the sound processor
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di ;this is a good idea.
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xra a
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out NMIOFF
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stai
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; test vfb signature analysis dip
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in DIP1 ;bottom dip bank
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bit 0,A
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jnz VFBSA ;do vfb signature analysis if switch one closed
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bit 2,A
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jnz DSPSW
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bit 3,A
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jnz ALIGN
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lxi x,ROMTST
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jmpr D2
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;MACROS
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.define PCALL[ADR]=[
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lxi x,.+4+3
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jmp ADR
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]
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ROMNUM: .byte 4 ;number of roms (not including utility)
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RAMST: .word BatteryRAM ;start of battery backup ram
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RAMS12: .word Credits-BatteryRAM-2 ;length of battery backup ram
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; flash LED ring bell
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D0: lxi b,00 ;delay
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DEL1: dcr c
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jrnz DEL1
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djnz DEL1
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D1: in 66H ;led on
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D2: mvi A,1 ;tone on
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lxi b,0141H
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lxi d,8247H
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D3: OUTP B ; 01 to 41 or 51
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dcr c
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OUTP D ; 82 to 40 or 50
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inr c
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inr c
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OUTP B ; 01 to 42 or 52
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inr c
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OUTP B ; 01 to 43 or 53
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inr c
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inr c
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inr c
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OUTP E ; 47 to 46 or 56
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mvi C,51H
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dcr a
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jrz D3
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lxi b,00 ;delay
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DEL2: dcr c
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jrnz DEL2
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djnz DEL2
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in 67H ;led off
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xra a
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out 40H ;tone off
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out 50H ;tone off
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pcix
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;-------------------
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; place nmi in here
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;-------------------
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.blkb 66h-(.-%Zero)
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.ifn (.-%Zero)-66h,[.error /NMI Address/]
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out NMIOFF
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push psw ;don't change this without fixing nmi in file main
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lda NMIflg
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ora a
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jnz NMIADD ; do test nmi
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; pop psw ;done in nmi
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jmp NMI
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; ROM test
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;this routine reads romnum from the first game rom.
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;it tests the checksum in the first romnum game roms and flags an error
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;if there is one. It checks the remaining game roms to see if they contain
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;any zeros. if a rom does, it tests its checksum and flags an error if
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;there is one. it tests the checksum of the utility rom and flags an error
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;if necessary. If I=1 it goes to scrram if no error and to exclp if an error.
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;e will equal
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;1 error in game rom 6 [C000-Cfff]
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;2 5 [3000-3Fff]
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;3 3 [2000-2Fff]
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;4 1 [1000-1Fff]
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;80 error in utility rom [0-Fff]
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;if i = 0 and there is an error it will halt if no error it will go to romrtn.
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ROMTST:: mvi E,4
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lxi x,1000H
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ROM1: lxi b,1000H ;bc = 4096
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mvi H,0 ;h = 0
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mvi L,0FFH ;l = ff
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ROM2: mov a,0(x) ;a = [ix]
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mov d,a
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ana l
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mov l,a ;l = l and a
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mov a,d
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add H
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mov h,a ;h = h + a
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inx x ;ix = ix + 1
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dcr c
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jrnz ROM2
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djnz ROM2 ;loop 2048 times
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lda ROMNUM
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cpi 0FFH ;bad system rom
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jrz ROM5
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mov a,E
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CPI 2
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JNZ ..
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LXI X,0C000H
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..: ora a
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jp ROM3 ;jmp if testing system rom
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mov a,l ;test for empty socket
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inr a
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jrz ROM4 ;jmp to rom4 if l = ff
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ROM3:
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; mvi A,0FFH
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mov a,e ;get rom number
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cmp h ;xsum = romnum?
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jrnz ROM5 ;jmp to rom5 if checksum <> ff
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ROM4: mov a,e ;here if chksm = ff or empty socket
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rlcr A ;contains all zeros
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jc ROMRTN ;to romrtn if e = 80
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dcr e ;e = e - 1
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jrnz ROM1 ;to rom1 if e <> 0
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ldai
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ana a
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jnz SCRRAM ;jump to scrram if in sa
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lxi x,0 ;ix = 0
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mvi E,080H ;e = 80h
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jmpr ROM1 ;to rom1 to start new rom
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ROM5: ldai ;here if checksum error
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ana a
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jnz EXCLP ;to exclp if in sa
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CKTRAP:: ;halt if in powerup (cksum error)
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jmpr . ;hang in the real system
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;
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ROMRTN: PCALL D0 ;in power up, ring bell & led
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jmp SCRRAM
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BYTE1:: .byte 0
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; zpu sa loop
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ZPUSA: mvi A,1
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stai ;i = 1
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jmp ROMTST
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; you get here by restarting with the sae connector in the test position
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; .loc 100H
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.blkb 100h-(.-%Zero)
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.ifn (.-%Zero)-100h,[.error /100 Address/]
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jmpr ZPUSA
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; sa error execution loop
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; e = one of the following numbers upon entering this routine
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;e = 20 no ram or rom errors - - sa = 0
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;e = 1 rom error 3800-3fff
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;e = 2 rom error 3000-37ff
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;e = 3 " " 2800-2fff
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;e = 4 " " 2000-27ff
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;e = 5 " " 1800-1fff - - sa = 5220 VCC = 8A02
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;e = 6 " " 1000-17ff
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;e = 10 ram error both nibbles - - sa = 6u6f
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;e = 11 ram error low nibble - - sa = fa6p
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;e = 12 ram error high nibble - - sa = ufp4
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;the routine will loop forever and a signature corresponding
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;to the value of e can be read on a13 with the rising edge of
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; 0 as the clock and a15 as the start/stop signal
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EXCLP: lxi b,08C0H
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lxi h,0H
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mvi D,8
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RDLP: mov a,m ;read once from each rom and
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dad b ;ram chip, write to ram chips
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xra a
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star
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sta 1000H
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dcr d
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jrnz RDLP
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mvi C,7FH ;c = 7f
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mvi D,20H
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INPLP: mov a,e
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ani 20H
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mov b,a ;b = e and 20h
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inp A ;input w.bit 5 of e on a13
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rrcr E ;rotate e right
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dcr c ;c = c - 1
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dcr d
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jrnz INPLP ;do it for c=7f to 60(ports on zpu board)
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mvi A,80H
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lxi b,8057H
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OUTLP: OUTP A
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dcr b
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dcr c
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rrcr A
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jrnc OUTLP
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mvi C,47H
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OUTLP1: OUTP A
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dcr c
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rrcr A
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jrnc OUTLP1
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jmpr EXCLP
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; scratch ram test
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;
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;this routine tests the scratchpad ram, starting at location ramst,
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;and going to location ramst+rams12-1. ramst and rams12 are read from
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;the first game rom. If I=1 then you are in sa and the routine goes
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;to exclp with e = 20h if no errors, e = 12 if only errors in bits 4-7,
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;e = 11 if only errors in bits 0 - 3, or e=10 if errors in both.
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;if i = 0 then you are in game power up routine and it will halt if
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;there are errors or go to ramt if no errors.
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SCRRAM: lhld RAMST
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lbcd RAMS12
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SCR1: mvi M,55H ;fill ram with 55 s
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dcx h
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cci ;bc = bc - 1
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jpo SCR2 ;jump if bc=0
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inx h ;hl = hl + 1
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jmpr SCR1 ;loop
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SCR2: mvi D,0AAH
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lxi sp,0FFFFH
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SCR3: lbcd RAMS12 ;bc = rams12
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SCR4: mov a,d
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cma ;a = invert d
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xra m
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jrnz SCRERR ;jump if error
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mov m,d ;[hl] = d
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dcx h
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cci ;bc = bc - 1
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jpe SCR6 ;jump if bc <> 0
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mov a,d
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cpi 55H
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jrz SCR5 ;to scr5 if d = 55h
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lxi sp,1H ;sp = 1
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mvi D,55H ;d = 55
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jmpr SCR3
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SCR6: dad sp ;hl = hl + sp
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jmpr SCR4
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SCRERR: mov d,a
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ldai
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rrcr A
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jrc SCR7 ;jump if in sa
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hlt ;halt if in power up
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SCR7: mvi E,12H
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mov a,d
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ani 0FH ;test for error in low nibble
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jz EXCLP ;jmp w. e = 12 if no error
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dcr e
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mov a,d
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ani 0F0H ;test for error in high nibble
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jz EXCLP ;jump w. e = 11 if no error
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dcr e
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jmp EXCLP ;jump w. e=10 if error in both
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SCR5: ldai
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rrcr A
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mvi E,20H
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jnc RAMT ;to ramt if in game powerup
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jmp EXCLP
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;---------------------
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; report ram errors Part of RAMTST
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; bc=error bits
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ERROR: lxi h,TABLE ;of screen addresses
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lxi d,1 ; test bit
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CHECK: mov a,b ; bad ram bit?
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ana d
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jnz PLOT
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mov a,c ; bad ram2 bit
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ana e
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jmp PLOT
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RET1: xchg
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dad h ; shift test bit
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xchg
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jnc CHECK
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lxi d,4000H ; wait value
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..wt: dcr e
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mov a,0(y) ; waste time
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jnz ..wt
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dcr d
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jnz ..wt
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jmp RAMT2
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;---------------+
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; plot bad dips
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;---------------+
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PLOT: exaf ; save whether good or bad
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mov a,m ; get screen address word
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inx h
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exx
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mov l,a
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exx
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mov a,m
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inx h
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exx
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mov h,a
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lxi d,32-1 ; offset to next line
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mvi B,3 ; number of notch lines
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exaf ; bad/good flag
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ZORK: ora a
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jrz GOOD1
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mvi M,0FCH ; half of ic
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inx h
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mvi M,03FH ; second half
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jmpr ON1
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GOOD1: mvi M,84H ; first 1/2
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inx h
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mvi M,21H ; second 1/2
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ON1: dad d ; goto next line
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djnz ZORK
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mvi B,36 ; lines of body of ic
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ZAP: ora a
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jrz GOOD2
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mvi M,0FFH
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inx h
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mvi M,0FFH
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jmpr ON2
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GOOD2: mvi M,80H
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inx h
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mvi M,01H
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ON2: dad d
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djnz ZAP
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exx
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jmp ret1
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;vfb signature analysis routine
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;you get here by resetting with switch one of dip switch chip #26 closed
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; .loc 01fcH
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.blkb 1fch-(.-%Zero)
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.ifn (.-%Zero)-1fch,[.error /1FC TITAB Address/]
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TITAB: .word INTADD ;general interupts
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.word BADINT ;general interupts with a bit stuck
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;.=200
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VFBSA: lxi b,1048H
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inp A ;in from 48
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inr c
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inp A ;in from 49
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inr c
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inp A ;in from 4a
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inr c
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inr c
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inp A ;in from 4c
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inr c
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inp A ;in from 4d
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inr c
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inp A ;in from 4e
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inr c
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mvi A,1
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OUTP A ;out 01 to 4f
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lxi b,0048H
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inp A ;in from 48
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inr c
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inp A ;in from 49
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inr c
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inp A ;in from 4a
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;this routine fully exercises the shifter,flopper, and intercept logic
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;1.75 msec
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lxi h,5000H
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lxi d,7000H
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mvi B,10H
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VSA2: mov a,b
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dcr a ;a = b - 1
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out 4BH ;output a to magic reg
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mvi A,80H
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VSA3: mov m,a ;write a to 5000h
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stax d ;write a to 7000h
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mov c,m
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rrcr A
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jrnc VSA3 ;loop 8 times
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xra a
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in 4EH ;input from intercept
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mvi A,08H
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sta 5000H
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sta 7000H
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xra a
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in 4EH
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inx h
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inx d
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djnz VSA2 ;loop 16 times
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;this routine exercises all address bits to the ram and writes a pattern
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;which can sa'ed at the serial video output
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;228 usec
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mvi B,0DH ;b = 13
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lxi d,0A000H
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lxi h,05FFEH
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mvi A,80H ;a = 80
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VSA1: dcr h
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mov m,a ;[hl] = a write to ram
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mov c,m ;c = [hl] read it back
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inr h
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stc
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ralr L
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ralr H
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dad d
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rrcr A ;rotate a right
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djnz VSA1 ;loop 13 times
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; fill bs color ram
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lxi h,1111H
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lxi d,1111H
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lxi sp,8800H
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mvi C,16
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BS1: mvi B,16
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BS2: push h
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push h
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push h
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push h
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djnz BS2
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dad d
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pop psw
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dcx sp
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dcx sp
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dcr c
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jrnz BS1
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;----
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in 4CH ;turn on nmi
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xra a
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in 4EH ;input interrupt feedback
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xra a
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in DIP1
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BIT 1,A
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VSA6: jrz VSA6 ;loop if not to do full test
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;here to do full alu test
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;you get here by closing switches 1,2 of dip switch pack 1
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lxi h,5000H
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lxi d,7000H
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mvi A,0F0H
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stai ;i = f0h
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VSA10: lxi b,004BH
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ldai
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OUTP A ;output to magic reg
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mvi C,0
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VSA11: mov a,c
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mov m,b ;write b to 5000h
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stax d ;write c,a to 7000h
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mov c,b
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cma
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mov b,m ;read back from 5000h
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mov b,a
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ora c
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jrnz VSA11
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ldai
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sui 10H
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stai ;i = i - 16
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jrnz VSA10 ;loop if i >= 0
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VSA12: jmpr VSA12
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;------------------------
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; official vfb ram test
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;------------------------
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RAMT: PCALL D0 ;ring bell & led
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RAMT2: lxi h,5FFFH
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lxi d,0
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PCALL UPDN
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lxi b,0 ;clear error bits
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lxi h,4000H ;start of ram
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PCALL CELL.T ;test data lines
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;do up down testing for address line problems
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lxi h,4000H
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lxi d,0055H
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PCALL UPDN
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lxi h,5FFFH
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lxi d,55AAH
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PCALL UPDN
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lxi h,4000H
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lxi d,0AAFFH
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PCALL UPDN
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lxi h,5FFFH
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lxi d,0FF00H
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PCALL UPDN
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mov a,c
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ora b
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jnz ERROR
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PCALL D0 ;ring bell & led
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;do color ram testing
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lxi h,87FFH
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lxi d,0
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PCALL UPDN
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lxi b,0 ;clear error bits
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lxi h,8000H ;start of 1kx4 ram
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PCALL CELL.T ;test data lines
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lxi h,8400H ;start of 1kx4 ram
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PCALL CELL.T ;test data lines
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;do up down testing for address line problems
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lxi h,8000H
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lxi d,0055H
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PCALL UPDN2
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lxi h,87FFH
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lxi d,55AAH
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PCALL UPDN2
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lxi h,8000H
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lxi d,0AAFFH
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PCALL UPDN2
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lxi h,87FFH
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lxi d,0FF00H
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PCALL UPDN2
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mov a,c
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ora b
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..err: jnz ..err
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lxi x,SHFTST ;ring bell & led
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jmp D0
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;----------------------------------
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; cell test for data line problems
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;----------------------------------
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CELL.T: mvi D,0 ; test value
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C.LOOP: mov m,d ; write test value
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mov a,m ; read back
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xra d ; check for bad bits
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ora b ; add old bad bits
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mov b,a ; save error bits
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inx h ; test bank2
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mov m,d
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mov a,m
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xra d
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ora c
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mov c,a
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dcx h
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dcr d ; new test value
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jnz C.LOOP
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mvi M,0
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inx h
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mvi M,0
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pcix
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;--------------------------------------
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; up down test for addressing problems
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;--------------------------------------
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UPDN2: exx
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lxi b,800H
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jmpr UPDN3
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;
|
|
UPDN: exx
|
|
lxi b,2000H ; length of screen
|
|
UPDN3: exx
|
|
D.LOOP: mov a,m ; read old value
|
|
xra d ; set error bits
|
|
ora b ; add old errors
|
|
mov b,a ; save errors
|
|
mov m,e ; store new value
|
|
mov a,m ; test now
|
|
xra e ; check
|
|
ora b ; save errors
|
|
mov b,a
|
|
bit 0,E ; test direction
|
|
jnz UP
|
|
dcx h
|
|
; ld a,<dec hl> for timing considerations
|
|
.byte 3Eh ; mvi a,next byte
|
|
UP: inx h
|
|
mov a,b ; swap b:c
|
|
mov b,c
|
|
mov c,a
|
|
exx
|
|
dcr c
|
|
jnz D.E
|
|
dcr b
|
|
jz DONE
|
|
D.E: exx
|
|
jmp D.LOOP
|
|
DONE: exx
|
|
mov a,b ; swap b:c
|
|
mov b,c
|
|
mov c,a
|
|
pcix
|
|
;-----------------------+
|
|
; table of ic locations
|
|
; arranged by bit number
|
|
; odd bank first
|
|
;-----------------------+
|
|
.define XY[PAR1,PAR2]=[
|
|
.word PAR1+PAR2+4400H
|
|
]
|
|
;
|
|
C1 == 9 ;column xs
|
|
C2 == C1+4
|
|
C3 == C2+4
|
|
C4 == C3+4
|
|
R1 == 0 ;row ys
|
|
R2 == 50*32
|
|
R3 == 100*32
|
|
R4 == 150*32
|
|
;
|
|
TABLE: XY C2,R3 ;o0
|
|
XY C2,R2 ;o1
|
|
XY C2,R1 ;o2
|
|
XY C2,R4 ;o3
|
|
XY C4,R1 ;o4
|
|
XY C4,R2 ;o5
|
|
XY C4,R3 ;o6
|
|
XY C4,R4 ;o7
|
|
XY C1,R3 ;e0
|
|
XY C1,R2 ;e1
|
|
XY C1,R1 ;e2
|
|
XY C1,R4 ;e3
|
|
XY C3,R1 ;e4
|
|
XY C3,R2 ;e5
|
|
XY C3,R3 ;e6
|
|
XY C3,R4 ;e7
|
|
;------------------------------------------------
|
|
;this routine loops forever if there is an
|
|
;error in the shifter or flopper
|
|
;if no error it turns on the led and
|
|
;tone for 1/4 second then turns them off
|
|
;and goes to alutst
|
|
SHFTST: lxi h,6000H ;magic ram address
|
|
mvi D,01H ;shift bit pattern
|
|
SHFT6: mov b,d ;b=shift bit pattern
|
|
xra a
|
|
mov c,a ;c=
|
|
mov e,a ;e=expected value
|
|
stai ;i= magic value
|
|
SHFT5: ldai
|
|
out 4BH ;magic register = i
|
|
mvi M,0FFH ;prime HI
|
|
mov m,d ;6000h = d
|
|
mvi M,0 ;6000h = 0
|
|
mov a,m ;get result
|
|
cmp e ;compare to expected
|
|
jrnz . ;error-loop forever
|
|
ldai ;get magic value
|
|
inr a ;inc the shift
|
|
stai ;store magic
|
|
cpi 10H ;compare to legal range
|
|
jrnz SHFT1 ;jump if .ne. 16
|
|
ralr D ;rotate left the bit pattern
|
|
jrnc SHFT6 ; so try all patterns of one bit
|
|
lxi x,ALUTST ;go to next test
|
|
jmp D0 ;delay, then to alutst
|
|
|
|
SHFT1: mov a,c ;rotate bc right
|
|
rarr A
|
|
rarr B ;bit pattern
|
|
rarr C
|
|
mov e,c ;e = c
|
|
ldai ;check if floping
|
|
cpi 8 ;8=flop
|
|
jrc SHFT5 ;if i<8 to shft5
|
|
mvi A,8 ;this routine sets
|
|
SHFT4: rrcr B ;e = b flop
|
|
ralr E ;does not affect b
|
|
dcr a
|
|
jrnz SHFT4
|
|
jmpr SHFT5
|
|
|
|
;this routine loops forever if there is an
|
|
;error in the alu or interrcept logic
|
|
;if no error it turns on the led and
|
|
;tone for 1/4 second then turns them off
|
|
;and goes to inttst
|
|
|
|
ALUTST: mvi E,0
|
|
lxi x,ALUSIM ;ix = alusim
|
|
lxi h,6000H ;hl = 6000
|
|
lxi b,0101H ;bc = 0101
|
|
ALU2: mov a,e
|
|
out 4BH ;e to magic reg
|
|
mov a,b
|
|
sta 4000H ;4000h = b
|
|
mov m,c ;6000h = c
|
|
mov a,c
|
|
pcix ;simulate the alu
|
|
ALURET: xra m ;xor simulation with [hl]
|
|
jrnz . ;loop if not equal
|
|
mov m,a ;(6000h) = 0
|
|
mov a,b
|
|
ana c
|
|
jrz ALU1
|
|
mvi A,80H
|
|
ALU1: mov d,a ;simulated intercept in bit 7 of d
|
|
in 4EH
|
|
xra d
|
|
ral
|
|
jrc . ;loop if intercept error
|
|
rlcr B ;rotate b and try again
|
|
jrnc ALU2
|
|
rlcr C ;rotate c and try again
|
|
jrnc ALU2
|
|
inx x
|
|
inx x
|
|
inx x
|
|
mvi A,10H ;update alu function
|
|
add E
|
|
mov e,a
|
|
jrnc ALU2
|
|
lxi x,INTTST
|
|
jmp D0 ;delay then to inttst
|
|
;
|
|
ALUSIM: NOP ;0,a
|
|
jmpr ALURET
|
|
ALUOR: ora b ;1,a or b
|
|
jmpr ALURET
|
|
cma ;2, (a + not(b)) , not(not(a) and +b)
|
|
jmpr ALUANC
|
|
xra a ;3, 1
|
|
jmpr ALUCMP
|
|
ALUAN: ana b ;4, a and b
|
|
jmpr ALURET
|
|
mov a,b ;5, b
|
|
jmpr ALURET
|
|
xra b ;6,not(a eor b)
|
|
jmpr ALUCMP
|
|
cma ;7, not(a) or b
|
|
jmpr ALUOR
|
|
cma ;8, (a and not(b)), not(not(a) or b)
|
|
jmpr ALUORC
|
|
xra b ;9, a eor b
|
|
jmpr ALURET
|
|
mov a,b ;10, not(b)
|
|
jmpr ALUCMP
|
|
ALUANC: ana b ;11, not(a and b)
|
|
jmpr ALUCMP
|
|
xra a ;12, 0
|
|
jmpr ALURET
|
|
cma ;13, not(a) and b
|
|
jmpr ALUAN
|
|
ALUORC: ora b ;14, not(a or b)
|
|
jmpr ALUCMP
|
|
ALUCMP: cma ;15, not(a)
|
|
jmpr ALURET
|
|
|
|
;this routine loops forever if interupts or
|
|
;nmi does not work properly. if they are
|
|
;ok it turns the led and tone on for 1/4 second
|
|
;then turns them off and goes to gamst
|
|
|
|
INTTST == .
|
|
IM2 ;mode 2
|
|
mvi A,01 ;table start
|
|
stai ;point to 7fch
|
|
lxi x,MAIN
|
|
mvi A,0FFH
|
|
out 4FH ;enable interupt
|
|
mov b,a
|
|
INTADD: lxi sp,SCREEN-1 ;give a stack pointer position
|
|
in 4EH ;clear int
|
|
rar
|
|
ralr B
|
|
mov a,b
|
|
xri 55H
|
|
jrz NMITST
|
|
ei
|
|
BADINT: jmpr .
|
|
|
|
NMITST: out 4FH ;disable interupts
|
|
mvi B,0FFH
|
|
NMIADD: lxi sp,SCREEN-1 ;give a stack pointer position
|
|
in 4DH ;disable nmi
|
|
in 4EH ;read center/bottom screen
|
|
rar
|
|
ralr B
|
|
mov a,b
|
|
xri 020H
|
|
jz D0 ;to delay if done
|
|
in 4CH ;enable nmi
|
|
jmpr .
|
|
|
|
.end
|