start new structure

master
ademant 2019-06-05 05:47:41 +02:00
parent 696effd4b6
commit 786e8dabda
3 changed files with 14 additions and 125 deletions

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@ -1,105 +1,15 @@
#!/usr/bin/env python
import numpy as np
import os, serial,time,socket,sys,json,smbus2,bme280,logging,requests
import os, serial,time,socket,sys,json,smbus2,bme280,logging,requests,getopt
# import the server implementation
from pymodbus.client.sync import ModbusSerialClient as ModbusClient
# import ADC
from Adafruit_ADS1x15 import ADS1115
import vedirect
import upload_osm
# import vedirect from https://github.com/karioja/vedirect
# description of channels:https://beta.ivc.no/wiki/index.php/Victron_VE_Direct_DIY_Cable
class vedirect:
def __init__(self, serialport, timeout):
self.serialport = serialport
self.ser = serial.Serial(serialport, 19200, timeout=timeout)
self.header1 = '\r'
self.header2 = '\n'
self.hexmarker = ':'
self.delimiter = '\t'
self.key = ''
self.value = ''
self.bytes_sum = 0;
self.state = self.WAIT_HEADER
self.dict = {}
(HEX, WAIT_HEADER, IN_KEY, IN_VALUE, IN_CHECKSUM) = range(5)
def input(self, byte):
if byte == self.hexmarker and self.state != self.IN_CHECKSUM:
self.state = self.HEX
if self.state == self.WAIT_HEADER:
self.bytes_sum += ord(byte)
if byte == self.header1:
self.state = self.WAIT_HEADER
elif byte == self.header2:
self.state = self.IN_KEY
return None
elif self.state == self.IN_KEY:
self.bytes_sum += ord(byte)
if byte == self.delimiter:
if (self.key == 'Checksum'):
self.state = self.IN_CHECKSUM
else:
self.state = self.IN_VALUE
else:
self.key += byte
return None
elif self.state == self.IN_VALUE:
self.bytes_sum += ord(byte)
if byte == self.header1:
self.state = self.WAIT_HEADER
self.dict[self.key] = self.value;
self.key = '';
self.value = '';
else:
self.value += byte
return None
elif self.state == self.IN_CHECKSUM:
self.bytes_sum += ord(byte)
self.key = ''
self.value = ''
self.state = self.WAIT_HEADER
if (self.bytes_sum % 256 == 0):
self.bytes_sum = 0
return self.dict
else:
print 'Malformed packet'
self.bytes_sum = 0
elif self.state == self.HEX:
self.bytes_sum = 0
if byte == self.header2:
self.state = self.WAIT_HEADER
else:
raise AssertionError()
def read_data(self):
while True:
byte = self.ser.read(1)
packet = self.input(byte)
def read_data_single(self):
while True:
byte = self.ser.read(1)
packet = self.input(byte)
if (packet != None):
return packet
def read_data_callback(self, callbackFunction):
while True:
byte = self.ser.read(1)
if byte:
packet = self.input(byte)
if (packet != None):
callbackFunction(packet)
else:
break
def print_data_callback(data):
print data
# end import vedirect
# def upload from forum.sensebox.de
def upload_osm(sensor_id,value):
url="https://ingress.opensensemap.org/boxes/%s/%s" % (sensebox_id,sensor_id)
r = requests.post(url,json={'value': value})
if r.status_code != requests.codes.ok:
print("Error %d: %s" % (r.status_code,r.text))
# end upload osm
configfile="config.json"
a = 2

7
upload_osm.py Normal file
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@ -0,0 +1,7 @@
# def upload from forum.sensebox.de
def upload_osm(sensor_id,value):
url="https://ingress.opensensemap.org/boxes/%s/%s" % (sensebox_id,sensor_id)
r = requests.post(url,json={'value': value})
if r.status_code != requests.codes.ok:
print("Error %d: %s" % (r.status_code,r.text))
# end upload osm

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@ -1,11 +1,6 @@
#!/usr/bin/python
# -*- coding: utf-8 -*-
# origin: https://github.com/karioja/vedirect
import os, serial, argparse
# import vedirect from https://github.com/karioja/vedirect
# description of channels:https://beta.ivc.no/wiki/index.php/Victron_VE_Direct_DIY_Cable
class vedirect:
def __init__(self, serialport, timeout):
self.serialport = serialport
self.ser = serial.Serial(serialport, 19200, timeout=timeout)
@ -18,22 +13,16 @@ class vedirect:
self.bytes_sum = 0;
self.state = self.WAIT_HEADER
self.dict = {}
(HEX, WAIT_HEADER, IN_KEY, IN_VALUE, IN_CHECKSUM) = range(5)
def input(self, byte):
if byte == self.hexmarker and self.state != self.IN_CHECKSUM:
self.state = self.HEX
if self.state == self.WAIT_HEADER:
self.bytes_sum += ord(byte)
if byte == self.header1:
self.state = self.WAIT_HEADER
elif byte == self.header2:
self.state = self.IN_KEY
return None
elif self.state == self.IN_KEY:
self.bytes_sum += ord(byte)
@ -72,20 +61,16 @@ class vedirect:
self.state = self.WAIT_HEADER
else:
raise AssertionError()
def read_data(self):
while True:
byte = self.ser.read(1)
packet = self.input(byte)
def read_data_single(self):
while True:
byte = self.ser.read(1)
packet = self.input(byte)
if (packet != None):
return packet
def read_data_callback(self, callbackFunction):
while True:
byte = self.ser.read(1)
@ -95,19 +80,6 @@ class vedirect:
callbackFunction(packet)
else:
break
def print_data_callback(data):
print data
if __name__ == '__main__':
parser = argparse.ArgumentParser(description='Process VE.Direct protocol')
parser.add_argument('--port', help='Serial port')
parser.add_argument('--timeout', help='Serial port read timeout', type=int, default='60')
args = parser.parse_args()
ve = vedirect(args.port, args.timeout)
ve.read_data_callback(print_data_callback)
# print(ve.read_data_single())
#test=ve.read_data_single()
#print(test['V'])
# end import vedirect