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83 Commits (master)

Author SHA1 Message Date
Mike Pall 1cdff194cf Add missing check for LJ_KEYINDEX in ITERN recording. 
Reported by dragonorloong. Analyzed by vfprintf. #827
 2022-04-02 21:27:43 +02:00
Mike Pall 7306ba78d6 Merge branch 'master' into v2.1 2022-01-15 19:42:30 +01:00
Mike Pall c4dfb625ba Bump copyright date. 2022-01-15 19:30:54 +01:00
Mike Pall 4a70bd71ac MIPS64: Fix soft-float IR_TOSTR. 2021-10-02 17:48:19 +02:00
Mike Pall 10c9d9a214 Merge branch 'master' into v2.1 2021-10-02 17:23:51 +02:00
Mike Pall d3294fa63b MIPS: Fix register allocation in assembly of HREF. 
Reported by Jakub Piotr Cłapa.
 2021-10-02 16:52:57 +02:00
Mike Pall bb0f241015 Compile table traversals: next(), pairs(), BC_ISNEXT/BC_ITERN. 
Sponsored by OpenResty Inc.
 2021-09-19 17:49:25 +02:00
Mike Pall 986bb406ad Use IR_HIOP for generalized two-register returns. 
Sponsored by OpenResty Inc.
 2021-09-19 17:47:11 +02:00
Mike Pall 9211f0b03b Refactor IR_VLOAD to take an offset. 2021-09-19 17:18:16 +02:00
Mike Pall f2d333c1ac MIPS: Fix trace linking. 2021-09-19 16:09:48 +02:00
Mike Pall 02bcbea8b0 String buffers, part 3c: Add IRBUFHDR_WRITE mode. 
Sponsored by fmad.io.
 2021-07-19 16:46:27 +02:00
Mike Pall 6df650fe3f String buffers, part 3a: Add IR_TMPREF for passing TValues to helpers. 
Sponsored by fmad.io.
 2021-07-19 16:23:12 +02:00
Mike Pall 71db0cf043 Add IRCONV_NONE for pass-through INT to I64/U64 type change. 2021-07-19 16:11:39 +02:00
Mike Pall dbb7863016 MIPS: Fix handling of long-range spare jumps. 2021-03-23 00:26:08 +01:00
Mike Pall 1e66d0f9e6 Merge branch 'master' into v2.1 2021-01-02 21:56:07 +01:00
Mike Pall f47c864b01 Bump copyright date. 2021-01-02 21:49:41 +01:00
Mike Pall 2e55a42c07 Merge branch 'master' into v2.1 2020-09-27 17:20:37 +02:00
Mike Pall e8ec6fe996 Prevent patching of the GC exit check branch. 
Reported by Arseny Vakhrushev.
 2020-09-27 16:44:13 +02:00
Mike Pall ff34b48ddd Redesign and harden string interning. 
Up to 40% faster on hash-intensive benchmarks.
With some ideas from Sokolov Yura.
 2020-06-23 03:06:45 +02:00
Mike Pall 8ae5170cdc Improve assertions. 2020-06-15 02:52:00 +02:00
Mike Pall b2307c8ad8 Remove pow() splitting and cleanup backends. 2020-05-23 21:33:01 +02:00
Mike Pall 5655be4546 Cleanup math function compilation and fix inconsistencies. 2020-05-22 04:53:35 +02:00
Mike Pall 03208c8162 Fix math.min()/math.max() inconsistencies. 2020-05-22 03:10:30 +02:00
Mike Pall 87b111f0fe Merge branch 'master' into v2.1 2020-01-20 23:34:21 +01:00
Mike Pall 38a5ed4b43 Bump copyright date. 2020-01-20 23:26:51 +01:00
Mike Pall 94d0b53004 MIPS: Add MIPS64 R6 port. 
Contributed by Hua Zhang, YunQiang Su from Wave Computing,
and Radovan Birdic from RT-RK.
Sponsored by Wave Computing.
 2020-01-20 22:15:45 +01:00
Mike Pall 99cdfbf6a1 MIPS64: Fix register allocation in assembly of HREF. 
Contributed by James Cowgill.
 2017-11-08 12:54:03 +01:00
Mike Pall a057a07ab7 MIPS64: Add soft-float support to JIT compiler backend. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
 2017-06-07 23:56:54 +02:00
Mike Pall 0e4a551809 Merge branch 'master' into v2.1 2017-06-07 19:39:41 +02:00
Mike Pall c7c3c4da43 MIPS: Fix handling of spare long-range jump slots. 
Contributed by Djordje Kovacevic and Stefan Pejic.
 2017-06-07 19:36:46 +02:00
Mike Pall 79fe5782f8 Merge branch 'master' into v2.1 2017-06-07 19:17:47 +02:00
Mike Pall 7381b62035 MIPS: Use precise search for exit jump patching. 
Contributed by Djordje Kovacevic and Stefan Pejic.
 2017-06-07 19:16:22 +02:00
Mike Pall a25c0b99b8 MIPS64, part 2: Add MIPS64 hard-float JIT compiler backend. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
 2017-02-20 03:43:10 +01:00
Mike Pall d0759e41a1 Merge branch 'master' into v2.1 2017-02-20 02:39:57 +01:00
Mike Pall ee33a1f9b3 MIPS: Fix emitted code for U32 to float conversion. 2017-02-20 02:35:00 +01:00
Mike Pall 71ff7ef8a7 Merge branch 'master' into v2.1 2017-01-17 12:41:05 +01:00
Mike Pall b93a1dd0c8 Bump copyright date to 2017. 2017-01-17 12:35:03 +01:00
Mike Pall e577db52c5 Increase range of GG_State loads via IR_FLOAD with REF_NIL. 
Require 32 bit alignment and store offset/4 instead.
Otherwise this can overflow the 10 bit limit for the FOLD op2 key.
 2016-11-19 19:53:46 +01:00
Mike Pall d9986fbadb MIPS64, part 1: Add MIPS64 support to interpreter. 
Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
Sponsored by Cisco Systems, Inc.
 2016-05-28 05:10:55 +02:00
Mike Pall 786dbb2ebd Add IR_FLOAD with REF_NIL for field loads from GG_State. 
Contributed by Peter Cawley.
 2016-05-21 01:00:49 +02:00
Mike Pall cfa188f134 Move common 32/64 bit in-memory FP constants to jit_State. 
Prerequisite for immovable IR.
Contributed by Peter Cawley.
 2016-05-21 00:02:45 +02:00
Mike Pall 475a6ae33f Merge branch 'master' into v2.1 2016-05-20 20:26:39 +02:00
Mike Pall 37e1e70313 Add guard for obscure aliasing between open upvalues and SSA slots. 
Thanks to Peter Cawley.
 2016-05-20 20:24:06 +02:00
Mike Pall 64c6da6b21 MIPS soft-float: Fix code generation for HREF. 2016-03-10 17:08:55 +01:00
Mike Pall f4231949b5 Merge branch 'master' into v2.1 2016-03-03 12:11:37 +01:00
Mike Pall db1b399af1 Bump copyright date to 2016. 2016-03-03 12:02:22 +01:00
Mike Pall a443889677 Don't allocate unused 2nd result register in JIT compiler backend. 2016-02-10 18:51:02 +01:00
Mike Pall f547a1425e MIPS: Add soft-float support to JIT compiler backend. 2016-02-10 18:49:22 +01:00
Mike Pall 0a5045c34e Merge branch 'master' into v2.1 2015-01-06 00:12:45 +01:00
Mike Pall 86913b9bbf Bump copyright date to 2015. 2015-01-05 23:59:31 +01:00