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PPC/e500: Drop support for this architecture.

master
Mike Pall 2015-01-04 23:01:16 +01:00
parent 968725c4d5
commit dfe84fd8c5
14 changed files with 16 additions and 3800 deletions
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2
doc/ext_jit.html
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@ -153,7 +153,7 @@ Contains the target OS name:
<h3 id="jit_arch"><tt>jit.arch</tt></h3>
<p>
Contains the target architecture name:
"x86", "x64", "arm", "ppc", "ppcspe", or "mips".
"x86", "x64", "arm", "ppc", or "mips".
</p>
<h2 id="jit_opt"><tt>jit.opt.*</tt> &mdash; JIT compiler optimization control</h2>

9
doc/install.html
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@ -141,13 +141,6 @@ operating systems, CPUs and compilers:
<td class="compatos">XEDK (<a href="#xbox360">Xbox 360</a>)</td>
</tr>
<tr class="odd">
<td class="compatcpu"><a href="#cross2">PPC/e500v2</a></td>
<td class="compatos">GCC 4.3+</td>
<td class="compatos">GCC 4.3+</td>
<td class="compatos compatno">&nbsp;</td>
<td class="compatos compatno">&nbsp;</td>
</tr>
<tr class="even">
<td class="compatcpu"><a href="#cross2">MIPS</a></td>
<td class="compatos">GCC 4.3+</td>
<td class="compatos">GCC 4.3+</td>
@ -387,8 +380,6 @@ make HOST_CC="gcc -m32" CROSS=arm-linux-gnueabihf-
# PPC
make HOST_CC="gcc -m32" CROSS=powerpc-linux-gnu-
# PPC/e500v2 (fast interpreter only)
make HOST_CC="gcc -m32" CROSS=powerpc-e500v2-linux-gnuspe-
# MIPS big-endian
make HOST_CC="gcc -m32" CROSS=mips-linux-

2
doc/luajit.html
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@ -172,7 +172,7 @@ LuaJIT is Copyright &copy; 2005-2014 Mike Pall, released under the
<tr><td>GCC</td><td>CLANG<br>LLVM</td><td>MSVC</td></tr>
</table>
<table class="feature cpu">
<tr><td>x86</td><td>x64</td><td>ARM</td><td>PPC</td><td>e500</td><td>MIPS</td></tr>
<tr><td>x86</td><td>x64</td><td>ARM</td><td>PPC</td><td>MIPS</td></tr>
</table>
<table class="feature fcompat">
<tr><td>Lua&nbsp;5.1<br>API+ABI</td><td>+&nbsp;JIT</td><td>+&nbsp;BitOp</td><td>+&nbsp;FFI</td><td>Drop-in<br>DLL/.so</td></tr>

5
src/Makefile
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@ -50,7 +50,6 @@ CCOPT_x64=
CCOPT_arm=
CCOPT_arm64=
CCOPT_ppc=
CCOPT_ppcspe=
CCOPT_mips=
#
CCDEBUG=
@ -224,9 +223,6 @@ else
ifneq (,$(findstring LJ_TARGET_PPC ,$(TARGET_TESTARCH)))
TARGET_LJARCH= ppc
else
ifneq (,$(findstring LJ_TARGET_PPCSPE ,$(TARGET_TESTARCH)))
TARGET_LJARCH= ppcspe
else
ifneq (,$(findstring LJ_TARGET_MIPS ,$(TARGET_TESTARCH)))
ifneq (,$(findstring MIPSEL ,$(TARGET_TESTARCH)))
TARGET_ARCH= -D__MIPSEL__=1
@ -240,7 +236,6 @@ endif
endif
endif
endif
endif
ifneq (,$(findstring LJ_TARGET_PS3 1,$(TARGET_TESTARCH)))
TARGET_SYS= PS3

4
src/host/buildvm.c
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@ -63,8 +63,6 @@ static int collect_reloc(BuildCtx *ctx, uint8_t *addr, int idx, int type);
#include "../dynasm/dasm_arm64.h"
#elif LJ_TARGET_PPC
#include "../dynasm/dasm_ppc.h"
#elif LJ_TARGET_PPCSPE
#include "../dynasm/dasm_ppc.h"
#elif LJ_TARGET_MIPS
#include "../dynasm/dasm_mips.h"
#else
@ -115,7 +113,7 @@ static const char *sym_decorate(BuildCtx *ctx,
name[0] = '@';
else
*p = '\0';
#elif (LJ_TARGET_PPC || LJ_TARGET_PPCSPE) && !LJ_TARGET_CONSOLE
#elif LJ_TARGET_PPC && !LJ_TARGET_CONSOLE
/* Keep @plt. */
#else
*p = '\0';

7
src/host/buildvm_asm.c
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@ -130,7 +130,7 @@ static void emit_asm_wordreloc(BuildCtx *ctx, uint8_t *p, int n,
ins, sym);
exit(1);
}
#elif LJ_TARGET_PPC || LJ_TARGET_PPCSPE
#elif LJ_TARGET_PPC
#if LJ_TARGET_PS3
#define TOCPREFIX "."
#else
@ -313,10 +313,7 @@ void emit_asm(BuildCtx *ctx)
#if !(LJ_TARGET_PS3 || LJ_TARGET_PSVITA)
fprintf(ctx->fp, "\t.section .note.GNU-stack,\"\"," ELFASM_PX "progbits\n");
#endif
#if LJ_TARGET_PPCSPE
/* Soft-float ABI + SPE. */
fprintf(ctx->fp, "\t.gnu_attribute 4, 2\n\t.gnu_attribute 8, 3\n");
#elif LJ_TARGET_PPC && !LJ_TARGET_PS3
#if LJ_TARGET_PPC && !LJ_TARGET_PS3
/* Hard-float ABI. */
fprintf(ctx->fp, "\t.gnu_attribute 4, 1\n");
#endif

6
src/jit/bcsave.lua
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@ -63,7 +63,7 @@ local map_type = {
}
local map_arch = {
x86 = true, x64 = true, arm = true, ppc = true, ppcspe = true,
x86 = true, x64 = true, arm = true, ppc = true,
mips = true, mipsel = true,
}
@ -202,7 +202,7 @@ typedef struct {
local is64, isbe = false, false
if ctx.arch == "x64" then
is64 = true
elseif ctx.arch == "ppc" or ctx.arch == "ppcspe" or ctx.arch == "mips" then
elseif ctx.arch == "ppc" or ctx.arch == "mips" then
isbe = true
end
@ -237,7 +237,7 @@ typedef struct {
hdr.eendian = isbe and 2 or 1
hdr.eversion = 1
hdr.type = f16(1)
hdr.machine = f16(({ x86=3, x64=62, arm=40, ppc=20, ppcspe=20, mips=8, mipsel=8 })[ctx.arch])
hdr.machine = f16(({ x86=3, x64=62, arm=40, ppc=20, mips=8, mipsel=8 })[ctx.arch])
if ctx.arch == "mips" or ctx.arch == "mipsel" then
hdr.flags = 0x50001006
end

2
src/lib_jit.c
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@ -706,8 +706,6 @@ static uint32_t jit_cpudetect(lua_State *L)
flags |= JIT_F_ROUND;
#endif
#endif
#elif LJ_TARGET_PPCSPE
/* Nothing to do. */
#elif LJ_TARGET_MIPS
#if LJ_HASJIT
/* Compile-time MIPS CPU detection. */

37
src/lj_arch.h
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@ -22,11 +22,9 @@
#define LUAJIT_ARCH_ARM64 4
#define LUAJIT_ARCH_arm64 4
#define LUAJIT_ARCH_PPC 5
#define LUAJIT_ARCH_ppc 6
#define LUAJIT_ARCH_PPCSPE 6
#define LUAJIT_ARCH_ppcspe 6
#define LUAJIT_ARCH_MIPS 7
#define LUAJIT_ARCH_mips 7
#define LUAJIT_ARCH_ppc 5
#define LUAJIT_ARCH_MIPS 6
#define LUAJIT_ARCH_mips 6
/* Target OS. */
#define LUAJIT_OS_OTHER 0
@ -48,11 +46,7 @@
#elif defined(__aarch64__)
#define LUAJIT_TARGET LUAJIT_ARCH_ARM64
#elif defined(__ppc__) || defined(__ppc) || defined(__PPC__) || defined(__PPC) || defined(__powerpc__) || defined(__powerpc) || defined(__POWERPC__) || defined(__POWERPC) || defined(_M_PPC)
#ifdef __NO_FPRS__
#define LUAJIT_TARGET LUAJIT_ARCH_PPCSPE
#else
#define LUAJIT_TARGET LUAJIT_ARCH_PPC
#endif
#elif defined(__mips__) || defined(__mips) || defined(__MIPS__) || defined(__MIPS)
#define LUAJIT_TARGET LUAJIT_ARCH_MIPS
#else
@ -260,26 +254,6 @@
#define LJ_ARCH_XENON 1
#endif
#elif LUAJIT_TARGET == LUAJIT_ARCH_PPCSPE
#error "The PPC/e500 port is broken and will be abandoned with LuaJIT 2.1"
#define LJ_ARCH_NAME "ppcspe"
#define LJ_ARCH_BITS 32
#define LJ_ARCH_ENDIAN LUAJIT_BE
#ifndef LJ_ABI_SOFTFP
#define LJ_ABI_SOFTFP 1
#endif
#define LJ_ABI_EABI 1
#define LJ_TARGET_PPCSPE 1
#define LJ_TARGET_EHRETREG 3
#define LJ_TARGET_JUMPRANGE 25 /* +-2^25 = +-32MB */
#define LJ_TARGET_MASKSHIFT 0
#define LJ_TARGET_MASKROT 1
#define LJ_TARGET_UNIFYROT 1 /* Want only IR_BROL. */
#define LJ_ARCH_NUMMODE LJ_NUMMODE_SINGLE
#define LJ_ARCH_NOFFI 1 /* NYI: comparisons, calls. */
#define LJ_ARCH_NOJIT 1
#elif LUAJIT_TARGET == LUAJIT_ARCH_MIPS
#if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL)
@ -356,7 +330,7 @@
#if defined(_ILP32)
#error "No support for ILP32 model on ARM64"
#endif
#elif LJ_TARGET_PPC || LJ_TARGET_PPCSPE
#elif LJ_TARGET_PPC
#if defined(_SOFT_FLOAT) || defined(_SOFT_DOUBLE)
#error "No support for PowerPC CPUs without double-precision FPU"
#endif
@ -366,6 +340,9 @@
#if defined(_LP64)
#error "No support for PowerPC 64 bit mode"
#endif
#ifdef __NO_FPRS__
#error "No support for PPC/e500 anymore (use LuaJIT 2.0)"
#endif
#elif LJ_TARGET_MIPS
#if defined(__mips_soft_float)
#error "No support for MIPS CPUs without FPU"

36
src/lj_ccall.c
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@ -338,42 +338,6 @@
if (ctype_isfp(ctr->info) && ctr->size == sizeof(float)) \
ctr = ctype_get(cts, CTID_DOUBLE); /* FPRs always hold doubles. */
#elif LJ_TARGET_PPCSPE
/* -- PPC/SPE calling conventions ----------------------------------------- */
#define CCALL_HANDLE_STRUCTRET \
cc->retref = 1; /* Return all structs by reference. */ \
cc->gpr[ngpr++] = (GPRArg)dp;
#define CCALL_HANDLE_COMPLEXRET \
/* Complex values are returned in 2 or 4 GPRs. */ \
cc->retref = 0;
#define CCALL_HANDLE_COMPLEXRET2 \
memcpy(dp, sp, ctr->size); /* Copy complex from GPRs. */
#define CCALL_HANDLE_STRUCTARG \
rp = cdataptr(lj_cdata_new(cts, did, sz)); \
sz = CTSIZE_PTR; /* Pass all structs by reference. */
#define CCALL_HANDLE_COMPLEXARG \
/* Pass complex by value in 2 or 4 GPRs. */
/* PPC/SPE has a softfp ABI. */
#define CCALL_HANDLE_REGARG \
if (n > 1) { /* Doesn't fit in a single GPR? */ \
lua_assert(n == 2 || n == 4); /* int64_t, double or complex (float). */ \
if (n == 2) \
ngpr = (ngpr + 1u) & ~1u; /* Only align 64 bit value to regpair. */ \
else if (ngpr + n > maxgpr) \
ngpr = maxgpr; /* Prevent reordering. */ \
} \
if (ngpr + n <= maxgpr) { \
dp = &cc->gpr[ngpr]; \
ngpr += n; \
goto done; \
}
#elif LJ_TARGET_MIPS
/* -- MIPS calling conventions -------------------------------------------- */

10
src/lj_ccall.h
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@ -80,16 +80,6 @@ typedef union FPRArg {
typedef intptr_t GPRArg;
typedef double FPRArg;
#elif LJ_TARGET_PPCSPE
#define CCALL_NARG_GPR 8
#define CCALL_NARG_FPR 0
#define CCALL_NRET_GPR 4 /* For softfp complex double. */
#define CCALL_NRET_FPR 0
#define CCALL_SPS_FREE 0 /* NYI */
typedef intptr_t GPRArg;
#elif LJ_TARGET_MIPS
#define CCALL_NARG_GPR 4

2
src/lj_ctype.h
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@ -263,7 +263,7 @@ typedef struct CTState {
/* -- Predefined types ---------------------------------------------------- */
/* Target-dependent types. */
#if LJ_TARGET_PPC || LJ_TARGET_PPCSPE
#if LJ_TARGET_PPC
#define CTTYDEFP(_) \
_(LINT32, 4, CT_NUM, CTF_LONG|CTALIGN(2))
#else

9
src/lj_frame.h
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@ -197,15 +197,6 @@ enum { LJ_CONT_TAILCALL, LJ_CONT_FFI_CALLBACK }; /* Special continuations. */
#define CFRAME_SIZE 272
#define CFRAME_SHIFT_MULTRES 3
#endif
#elif LJ_TARGET_PPCSPE
#define CFRAME_OFS_ERRF 28
#define CFRAME_OFS_NRES 24
#define CFRAME_OFS_PREV 20
#define CFRAME_OFS_L 16
#define CFRAME_OFS_PC 12
#define CFRAME_OFS_MULTRES 8
#define CFRAME_SIZE 184
#define CFRAME_SHIFT_MULTRES 3
#elif LJ_TARGET_MIPS
#define CFRAME_OFS_ERRF 124
#define CFRAME_OFS_NRES 120

3685
src/vm_ppcspe.dasc
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