Properly categorize VHDL strings

This commit is contained in:
Colomban Wendling 2018-12-09 11:23:07 +01:00
parent fb64009aae
commit 23607a8bb6

View File

@ -1587,6 +1587,10 @@ gboolean highlighting_is_string_style(gint lexer, gint style)
case SCLEX_VERILOG:
return (style == SCE_V_STRING);
case SCLEX_VHDL:
return (style == SCE_VHDL_STRING ||
style == SCE_VHDL_STRINGEOL);
case SCLEX_CAML:
return (style == SCE_CAML_CHAR ||
style == SCE_CAML_STRING);