53 lines
807 B
C
53 lines
807 B
C
// license:GPL-2.0+
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// copyright-holders:Couriersud
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/*
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* vs_cs.c
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*
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* Voltage and current source test
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*
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*/
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#include "netlist/devices/net_lib.h"
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NETLIST_START(rc)
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/*
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* delay circuit
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*
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*/
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/* Standard stuff */
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SOLVER(Solver, 48000)
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PARAM(Solver.ACCURACY, 1e-6)
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CLOCK(clk, 20000)
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/* Voltage source. Inner resistance will make clock visible */
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RES(R1, 1000)
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VS(VS1, 1)
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NET_C(R1.1, clk)
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NET_C(R1.2, VS1.P)
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NET_C(GND, VS1.N)
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/* Current source. Current flows from "+" to "-", thus for a source we
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* need negative current
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*/
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RES(R2, 1000)
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RES(R3, 1000)
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CS(CS1, -0.001)
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NET_C(CS1.P, R2.1)
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NET_C(R2.2, R3.1)
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NET_C(GND, CS1.N, R3.2)
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CAP(C1, CAP_U(1))
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NET_C(C1.1, R3.1)
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NET_C(C1.2, R3.2)
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LOG(tt, VS1.P)
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LOG(tx, R2.2)
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NETLIST_END()
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