Fixed input lag protection for Ping Pong King, pending promotion to working (nw)
angelosa
parent
03752f33a3
commit
dfc3081a4b
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@ -273,7 +273,6 @@ WRITE_LINE_MEMBER(gladiatr_state_base::flipscreen_w)
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flip_screen_set(state);
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}
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#if 1
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/* !!!!! patch to IRQ timing for 2nd CPU !!!!! */
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WRITE8_MEMBER(gladiatr_state::gladiatr_irq_patch_w)
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@ -464,22 +463,20 @@ READ8_MEMBER(ppking_state::ppking_qx0_r)
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else
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{
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m_mcu[0].rxd = ((ioport("SYSTEM")->read()) & 0x9f);
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}
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//printf("%02x\n",m_mcu[0].rxd);
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}
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break;
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}
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case 2:
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{
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//m_mcu[0].packet_type^=1;
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//if(m_mcu[0].packet_type & 1)
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//{
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// m_mcu[0].rxd = ((ioport("P2")->read()) & 0x9f);
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//}
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//else
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m_mcu[0].packet_type^=1;
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if(m_mcu[0].packet_type & 1)
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{
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// Host wants this from time to time, otherwise huge input lag happens periodically (protection?)
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m_mcu[0].rxd = 0x17;
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}
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else
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{
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m_mcu[0].rxd = ((ioport("P1")->read()) & 0x3f);
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m_mcu[0].rxd |= ((ioport("SYSTEM")->read()) & 0x80);
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@ -491,12 +488,13 @@ READ8_MEMBER(ppking_state::ppking_qx0_r)
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case 3:
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{
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//m_mcu[0].packet_type^=1;
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//if(m_mcu[0].packet_type & 1)
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//{
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// m_mcu[0].rxd = ((ioport("P2")->read()) & 0x9f);
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//}
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//else
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m_mcu[0].packet_type^=1;
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if(m_mcu[0].packet_type & 1)
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{
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// same as above for player 2
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m_mcu[0].rxd = 0x17;
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}
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else
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{
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m_mcu[0].rxd = ((ioport("P2")->read()) & 0x3f);
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m_mcu[0].rxd |= ((ioport("SYSTEM")->read()) & 0x80);
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@ -542,9 +540,9 @@ WRITE8_MEMBER(ppking_state::ppking_qx0_w)
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//m_mcu[0].state = 0;
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break;
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case 2:
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// TODO: DSW2 reads here
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m_mcu[0].rxd = 0;
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//m_mcu[0].rxd = ((ioport("DSW2")->read() & 0x1f) << 2);
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//m_mcu[0].rxd|= mcu_parity_check() == true ? 0 : 1;
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m_mcu[0].rst = 0;
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//m_mcu[0].state = 0;
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break;
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@ -613,8 +611,8 @@ READ8_MEMBER(ppking_state::ppking_qx3_r)
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return machine().rand()&0xf;
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}
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// a mirror of any of above?
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READ8_MEMBER(ppking_state::ppking_qxunk_r)
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// serial communication with another board
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READ8_MEMBER(ppking_state::ppking_qxcomu_r)
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{
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if(offset == 1)
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return 1;
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@ -622,16 +620,14 @@ READ8_MEMBER(ppking_state::ppking_qxunk_r)
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return 0;
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}
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WRITE8_MEMBER(ppking_state::ppking_qxunk_w)
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WRITE8_MEMBER(ppking_state::ppking_qxcomu_w)
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{
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// ...
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}
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MACHINE_RESET_MEMBER(ppking_state, ppking)
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{
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m_data1 = m_data2 = 0;
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m_flag1 = m_flag2 = 1;
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{
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m_nmi_enable = false;
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// yes, it expects to read DSW1 without sending commands first ...
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m_mcu[0].rxd = (ioport("DSW1")->read() & 0x1f) << 2;;
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m_mcu[0].rst = 0;
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@ -661,8 +657,8 @@ static ADDRESS_MAP_START( ppking_cpu1_io, AS_IO, 8, ppking_state )
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AM_RANGE(0xc000, 0xc007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
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// AM_RANGE(0xc004, 0xc004) AM_NOP // WRITE(ppking_irq_patch_w)
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AM_RANGE(0xc09e, 0xc09f) AM_READ(ppking_qx0_r) AM_WRITE(ppking_qx0_w)
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AM_RANGE(0xc0bf, 0xc0bf) AM_NOP
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AM_RANGE(0xc0c0, 0xc0c1) AM_READ(ppking_qxunk_r) AM_WRITE(ppking_qxunk_w)
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AM_RANGE(0xc0bf, 0xc0bf) AM_NOP // watchdog
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AM_RANGE(0xc0c0, 0xc0c1) AM_READ(ppking_qxcomu_r) AM_WRITE(ppking_qxcomu_w)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( ppking_cpu2_io, AS_IO, 8, ppking_state )
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@ -765,9 +761,9 @@ static INPUT_PORTS_START( ppking )
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PORT_DIPNAME( 0x08, 0x08, "VS Mode (link)" ) PORT_DIPLOCATION("SW1:4") // unemulated
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PORT_DIPSETTING( 0x08, DEF_STR( No ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:3")
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PORT_DIPSETTING( 0x10, DEF_STR( Yes ) )
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PORT_DIPSETTING( 0x00, DEF_STR( No ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:3")
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PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
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PORT_DIPSETTING( 0x10, DEF_STR( No ) )
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PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
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// cabinet (upright/cocktail) & coinage, not currently working (see above)
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@ -799,7 +795,7 @@ static INPUT_PORTS_START( ppking )
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PORT_DIPNAME( 0x04, 0x00, "Backup Clear" ) PORT_DIPLOCATION("SW3:3")
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PORT_DIPSETTING( 0x04, DEF_STR( Yes ) )
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PORT_DIPSETTING( 0x00, DEF_STR( No ) )
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PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW3:4" )
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PORT_DIPUNUSED_DIPLOC( 0x08, 0x00, "SW3:4" )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:5")
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PORT_DIPSETTING( 0x10, DEF_STR( Yes ) )
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PORT_DIPSETTING( 0x00, DEF_STR( No ) )
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@ -978,6 +974,7 @@ static MACHINE_CONFIG_START( ppking )
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MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(ppking_state, spritebuffer_w))
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// MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gladiatr_state, spritebank_w))
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// MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(MEMBANK("bank1"))
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// MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(ppking_state, nmi_mask_w))
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// MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) // shadowed by aforementioned hack
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// Q6 used
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MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(ppking_state, flipscreen_w))
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@ -1006,7 +1003,7 @@ static MACHINE_CONFIG_START( ppking )
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MCFG_SOUND_ADD("ymsnd", YM2203, XTAL_12MHz/8) /* verified on pcb */
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MCFG_YM2203_IRQ_HANDLER(WRITELINE(gladiatr_state_base, ym_irq))
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MCFG_AY8910_PORT_A_READ_CB(READ8(ppking_state, ppking_f1_r))
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MCFG_AY8910_PORT_B_READ_CB(READ8(ppking_state, ppking_f1_r))
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MCFG_AY8910_PORT_B_READ_CB(IOPORT("DSW3")) /* port B read */
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MCFG_SOUND_ROUTE(0, "mono", 0.60)
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MCFG_SOUND_ROUTE(1, "mono", 0.60)
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MCFG_SOUND_ROUTE(2, "mono", 0.60)
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@ -1482,9 +1479,6 @@ DRIVER_INIT_MEMBER(ppking_state, ppking)
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rom[0x845] = 0x00;
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rom[0x846] = 0x00;
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rom[0x847] = 0x00;
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save_item(NAME(m_data1));
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save_item(NAME(m_data2));
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}
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@ -160,10 +160,6 @@ public:
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: gladiatr_state_base(mconfig, type, tag)
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, m_nvram(*this, "nvram")
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, m_soundlatch2(*this, "soundlatch2")
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, m_data1(0)
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, m_data2(0)
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, m_flag1(0)
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, m_flag2(0)
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{
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}
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@ -176,12 +172,12 @@ public:
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DECLARE_READ8_MEMBER(ppking_qx3_r);
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DECLARE_READ8_MEMBER(ppking_qx0_r);
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DECLARE_READ8_MEMBER(ppking_qx1_r);
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DECLARE_READ8_MEMBER(ppking_qxunk_r);
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DECLARE_WRITE8_MEMBER(ppking_qxunk_w);
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DECLARE_READ8_MEMBER(ppking_qxcomu_r);
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DECLARE_WRITE8_MEMBER(ppking_qxcomu_w);
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DECLARE_WRITE8_MEMBER(ppking_video_registers_w);
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DECLARE_WRITE8_MEMBER(ppking_adpcm_w);
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DECLARE_WRITE8_MEMBER(cpu2_irq_ack_w);
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DECLARE_DRIVER_INIT(ppking);
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DECLARE_MACHINE_RESET(ppking);
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@ -193,10 +189,7 @@ private:
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required_shared_ptr<uint8_t> m_nvram;
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required_device<generic_latch_8_device> m_soundlatch2;
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u8 m_data1;
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u8 m_data2;
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u8 m_flag1;
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u8 m_flag2;
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bool m_nmi_enable;
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struct
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{
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