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(nw) qtsbc : added devices ; dialog80 : added notes.

master
Robbbert 2017-11-11 03:12:18 +11:00
parent ec2685c66c
commit 8a3d220301
2 changed files with 59 additions and 39 deletions
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4
src/mame/drivers/ampex.cpp
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@ -6,6 +6,10 @@
Ampex Dialogue 80 terminal
Chips: CRT-5037, COM8017, MK3880N (Z80)
Crystals: 4.9152, 23.814
Other: Beeper, 5x 10sw-dips.
************************************************************************************************************************************/
#include "emu.h"

94
src/mame/drivers/qtsbc.cpp
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@ -2,63 +2,62 @@
// copyright-holders:Robbbert
/***************************************************************************
QT Computer Systems SBC +2/4
QT Computer Systems SBC +2/4
11/12/2009 Skeleton driver.
2009-12-11 Skeleton driver.
It expects a rom or similar at E377-up, so currently it crashes.
Currently it crashes. There's a memory move routine at 50A4, and after
a few turns it is told to move E603 bytes which corrupts everything.
Chips: P8251, D8253C, MK3880N-4 (Z80). 3x 6-sw dips. Unmarked crystal.
Doesn't appear to be any ram?
There's a blue jumper marked 4M and 2M. Assumed to be selectable CPU clock.
Also assumed this is what the "2/4" in the name refers to.
****************************************************************************/
#include "emu.h"
#include "cpu/z80/z80.h"
#include "machine/terminal.h"
#include "machine/i8251.h"
#include "machine/pit8253.h"
#include "bus/rs232/rs232.h"
#define TERMINAL_TAG "terminal"
class qtsbc_state : public driver_device
{
public:
qtsbc_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_terminal(*this, TERMINAL_TAG),
m_p_ram(*this, "p_ram")
{
}
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
, m_p_ram(*this, "ram")
{ }
required_device<cpu_device> m_maincpu;
required_device<generic_terminal_device> m_terminal;
DECLARE_READ8_MEMBER( qtsbc_06_r );
DECLARE_READ8_MEMBER( qtsbc_43_r );
void kbd_put(u8 data);
required_shared_ptr<uint8_t> m_p_ram;
uint8_t m_term_data;
private:
virtual void machine_reset() override;
required_device<cpu_device> m_maincpu;
required_shared_ptr<u8> m_p_ram;
};
READ8_MEMBER( qtsbc_state::qtsbc_06_r )
{
uint8_t ret = m_term_data;
m_term_data = 0;
return ret;
}
READ8_MEMBER( qtsbc_state::qtsbc_43_r )
{
return 0;
return 0; // this controls where the new ram program gets built at. 0 = 0xE000.
}
static ADDRESS_MAP_START(qtsbc_mem, AS_PROGRAM, 8, qtsbc_state)
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, qtsbc_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE( 0x0000, 0xffff ) AM_RAM AM_SHARE("p_ram") AM_REGION("maincpu", 0)
AM_RANGE(0x0000, 0xffff) AM_RAM AM_SHARE("ram") AM_REGION("maincpu", 0)
ADDRESS_MAP_END
static ADDRESS_MAP_START( qtsbc_io, AS_IO, 8, qtsbc_state)
static ADDRESS_MAP_START( io_map, AS_IO, 8, qtsbc_state )
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x06, 0x06) AM_READ(qtsbc_06_r) AM_DEVWRITE(TERMINAL_TAG, generic_terminal_device, write)
AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("pit", pit8253_device, read, write)
AM_RANGE(0x06, 0x06) AM_DEVREADWRITE("uart", i8251_device, data_r, data_w)
AM_RANGE(0x07, 0x07) AM_DEVREADWRITE("uart", i8251_device, status_r, control_w)
AM_RANGE(0x43, 0x43) AM_READ(qtsbc_43_r)
ADDRESS_MAP_END
@ -73,29 +72,46 @@ void qtsbc_state::machine_reset()
memcpy(m_p_ram, bios, 0x800);
}
void qtsbc_state::kbd_put(u8 data)
{
m_term_data = data;
}
static DEVICE_INPUT_DEFAULTS_START( terminal )
DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_9600 )
DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_9600 )
DEVICE_INPUT_DEFAULTS( "RS232_STARTBITS", 0xff, RS232_STARTBITS_1 )
DEVICE_INPUT_DEFAULTS( "RS232_DATABITS", 0xff, RS232_DATABITS_7 )
DEVICE_INPUT_DEFAULTS( "RS232_PARITY", 0xff, RS232_PARITY_EVEN )
DEVICE_INPUT_DEFAULTS( "RS232_STOPBITS", 0xff, RS232_STOPBITS_1 )
DEVICE_INPUT_DEFAULTS_END
static MACHINE_CONFIG_START( qtsbc )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu",Z80, XTAL_4MHz) // Mostek MK3880
MCFG_CPU_PROGRAM_MAP(qtsbc_mem)
MCFG_CPU_IO_MAP(qtsbc_io)
MCFG_CPU_PROGRAM_MAP(mem_map)
MCFG_CPU_IO_MAP(io_map)
/* video hardware */
MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
MCFG_GENERIC_TERMINAL_KEYBOARD_CB(PUT(qtsbc_state, kbd_put))
MCFG_DEVICE_ADD("pit", PIT8253, 0) // U9
MCFG_PIT8253_CLK0(XTAL_4MHz / 2) /* Timer 0: baud rate gen for 8251 */
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("uart", i8251_device, write_txc))
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("uart", i8251_device, write_rxc))
MCFG_DEVICE_ADD("uart", I8251, 0) // U8
MCFG_I8251_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd))
MCFG_I8251_DTR_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
MCFG_I8251_RTS_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_rts))
MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "terminal")
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart", i8251_device, write_rxd))
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart", i8251_device, write_dsr))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart", i8251_device, write_cts))
MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", terminal) // must be exactly here
MACHINE_CONFIG_END
/* ROM definition */
ROM_START( qtsbc )
ROM_REGION( 0x10800, "maincpu", ROMREGION_ERASEFF )
ROM_LOAD( "qtsbc.bin", 0x10000, 0x0800, CRC(823fd942) SHA1(64c4f74dd069ae4d43d301f5e279185f32a1efa0))
ROM_LOAD( "qtsbc.u23", 0x10000, 0x0800, CRC(823fd942) SHA1(64c4f74dd069ae4d43d301f5e279185f32a1efa0))
ROM_END
/* Driver */
// YEAR NAME PARENT COMPAT MACHINE INPUT STATE INIT COMPANY FULLNAME FLAGS
COMP( 19??, qtsbc, 0, 0, qtsbc, qtsbc, qtsbc_state, 0, "Computer Systems Inc.", "QT SBC +2/4", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
COMP( 19??, qtsbc, 0, 0, qtsbc, qtsbc, qtsbc_state, 0, "QT Computer Systems Inc.", "SBC + 2/4", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )