(nw) basic guesswork

master
Robbbert 2017-11-04 19:33:47 +11:00
parent d80373e204
commit 6a09da3141
13 changed files with 158 additions and 92 deletions

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@ -9,7 +9,6 @@ Advanced Computer Design computer. CPU is WD9000. Some details at bitsavers.
************************************************************************************************************************************/
#include "emu.h"
//#include "cpu/mcs51/mcs51.h"
class acd_state : public driver_device
{
@ -19,16 +18,16 @@ public:
// , m_maincpu(*this, "maincpu")
{ }
protected:
// required_device<i80c52_device> m_maincpu;
private:
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, acd_state )
//ADDRESS_MAP_END
static INPUT_PORTS_START( acd )
INPUT_PORTS_END
//static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, acd_state )
//ADDRESS_MAP_END
static MACHINE_CONFIG_START( acd )
MACHINE_CONFIG_END

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@ -9,7 +9,6 @@ Motorola AMPS Car Phone.
************************************************************************************************************************************/
#include "emu.h"
//#include "cpu/mcs51/mcs51.h"
class ampscarp_state : public driver_device
{
@ -19,21 +18,21 @@ public:
// , m_maincpu(*this, "maincpu")
{ }
protected:
// required_device<i80c52_device> m_maincpu;
private:
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, ampscarp_state )
//ADDRESS_MAP_END
static INPUT_PORTS_START( ampscarp )
INPUT_PORTS_END
//static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, ampscarp_state )
//ADDRESS_MAP_END
static MACHINE_CONFIG_START( ampscarp )
MACHINE_CONFIG_END
ROM_START( ampscarp )
ROM_REGION( 0x20000, "maincpu", 0 )
ROM_REGION( 0x20000, "maincpu", 0 ) // unknown cpu
ROM_LOAD( "motorola_amps_car_phone_dump.bin", 0x0000, 0x20000, CRC(677ec85e) SHA1(219611b6c4b16461705e2df61d79a0f7ac8f529f) )
ROM_END

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@ -6,43 +6,67 @@
Hazeltine Esprit terminals.
2 zipfiles were found: "Hazeltine_Esprit" and "Hazeltine_EaspritIII".
2 zipfiles were found: "Hazeltine_Esprit" and "Hazeltine_EspritIII".
************************************************************************************************************************************/
#include "emu.h"
//#include "cpu/mcs51/mcs51.h"
#include "cpu/m6502/m6502.h"
class hazeltine_state : public driver_device
{
public:
hazeltine_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
// , m_maincpu(*this, "maincpu")
, m_maincpu(*this, "maincpu")
, m_p_chargen(*this, "chargen")
{ }
protected:
// required_device<i80c52_device> m_maincpu;
private:
required_device<cpu_device> m_maincpu;
required_region_ptr<u8> m_p_chargen;
};
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, hazeltine_state )
ADDRESS_MAP_GLOBAL_MASK (0x7fff)
AM_RANGE(0x0000,0x6fff) AM_RAM
AM_RANGE(0x7000,0x7fff) AM_ROM AM_REGION("roms", 0)
ADDRESS_MAP_END
static ADDRESS_MAP_START( mem3_map, AS_PROGRAM, 8, hazeltine_state )
AM_RANGE(0x0000,0xdfff) AM_RAM
AM_RANGE(0xe000,0xffff) AM_ROM AM_REGION("roms", 0)
ADDRESS_MAP_END
static INPUT_PORTS_START( hazeltine )
INPUT_PORTS_END
//static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, hazeltine_state )
//ADDRESS_MAP_END
static MACHINE_CONFIG_START( hazeltine )
MCFG_CPU_ADD("maincpu", M6502, 1000000) // no idea of clock
MCFG_CPU_PROGRAM_MAP(mem_map)
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( hazeltine3 )
MCFG_CPU_ADD("maincpu", M6502, 1000000) // no idea of clock
MCFG_CPU_PROGRAM_MAP(mem3_map)
MACHINE_CONFIG_END
ROM_START( hazeltine )
ROM_REGION( 0x10000, "maincpu", 0 )
// Esprit
ROM_LOAD( "hazeltine_esprit.u26", 0x0000, 0x0804, CRC(93f45f13) SHA1(1f493b44124c348759469e24fdfa8b7c52fe6fac) )
ROM_REGION( 0x1000, "roms", 0 )
ROM_LOAD( "hazeltine_esprit.u19", 0x0000, 0x1000, CRC(6fdec792) SHA1(a1d1d68c8793e7e15ab5cd17682c299dff3985cb) )
ROM_REGION( 0x1000, "chargen", 0 )
ROM_LOAD( "hazeltine_esprit.u26", 0x0000, 0x0804, CRC(93f45f13) SHA1(1f493b44124c348759469e24fdfa8b7c52fe6fac) )
ROM_END
ROM_START( hazeltine3 )
// Esprit III
ROM_REGION( 0x10000, "roms", 0 )
ROM_LOAD( "hazeltine_espritiii.u5", 0x0000, 0x2000, CRC(fd63dad1) SHA1(b2a3e7db8480b28cab2b2834ad89fb6257f13cba) )
ROM_REGION( 0x1000, "chargen", 0 )
ROM_LOAD( "hazeltine_espritiii.u19", 0x0000, 0x1000, CRC(33e4a8ef) SHA1(e19c84a3c5f94812928ea84bab3ede7970dd5e72) )
ROM_END
COMP( 1981, hazeltine, 0, 0, hazeltine, hazeltine, hazeltine_state, 0, "Hazeltine", "Esprit", MACHINE_IS_SKELETON )
COMP( 1981, hazeltine, 0, 0, hazeltine, hazeltine, hazeltine_state, 0, "Hazeltine", "Esprit", MACHINE_IS_SKELETON )
COMP( 1981, hazeltine3, hazeltine, 0, hazeltine3, hazeltine, hazeltine_state, 0, "Hazeltine", "Esprit III", MACHINE_IS_SKELETON )

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@ -9,7 +9,6 @@ CPU consists of various parts including AM2901 and AM2911.
************************************************************************************************************************************/
#include "emu.h"
//#include "cpu/mcs51/mcs51.h"
class lilith_state : public driver_device
{
@ -19,16 +18,19 @@ public:
// , m_maincpu(*this, "maincpu")
{ }
protected:
// required_device<i80c52_device> m_maincpu;
private:
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, lilith_state )
//ADDRESS_MAP_END
//static ADDRESS_MAP_START( io_map, AS_PROGRAM, 8, lilith_state )
//ADDRESS_MAP_END
static INPUT_PORTS_START( lilith )
INPUT_PORTS_END
//static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, lilith_state )
//ADDRESS_MAP_END
static MACHINE_CONFIG_START( lilith )
MACHINE_CONFIG_END

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@ -14,7 +14,7 @@ Manuals: http://mightyframe.blogspot.com.au/p/manuals.html
************************************************************************************************************************************/
#include "emu.h"
//#include "cpu/mcs51/mcs51.h"
#include "cpu/m68000/m68000.h"
class mightyframe_state : public driver_device
{
@ -24,17 +24,20 @@ public:
// , m_maincpu(*this, "maincpu")
{ }
protected:
// required_device<i80c52_device> m_maincpu;
private:
// required_device<cpu_device> m_maincpu;
};
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 16, mightyframe_state )
AM_RANGE(0x000000, 0x007fff) AM_ROM
ADDRESS_MAP_END
static INPUT_PORTS_START( mightyframe )
INPUT_PORTS_END
//static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, mightyframe_state )
//ADDRESS_MAP_END
static MACHINE_CONFIG_START( mightyframe )
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz) // no idea of clock
MCFG_CPU_PROGRAM_MAP(mem_map)
MACHINE_CONFIG_END
ROM_START( mightyframe )

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@ -12,7 +12,6 @@ ROMS came from PERQemu by Josh Dersch.
************************************************************************************************************************************/
#include "emu.h"
//#include "cpu/mcs51/mcs51.h"
class perq_state : public driver_device
{
@ -22,16 +21,16 @@ public:
// , m_maincpu(*this, "maincpu")
{ }
protected:
// required_device<i80c52_device> m_maincpu;
private:
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, perq_state )
//ADDRESS_MAP_END
static INPUT_PORTS_START( perq )
INPUT_PORTS_END
//static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, perq_state )
//ADDRESS_MAP_END
static MACHINE_CONFIG_START( perq )
MACHINE_CONFIG_END

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@ -9,7 +9,7 @@ Motorola Powerstack II. CPU is a PowerPC 604e @ 300MHz.
************************************************************************************************************************************/
#include "emu.h"
//#include "cpu/mcs51/mcs51.h"
#include "cpu/powerpc/ppc.h"
class powerstack_state : public driver_device
{
@ -19,21 +19,24 @@ public:
// , m_maincpu(*this, "maincpu")
{ }
protected:
// required_device<i80c52_device> m_maincpu;
private:
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 64, powerstack_state )
// AM_RANGE(0xFFF80000, 0xFFFFFFFF) AM_ROM AM_REGION("roms", 0)
//ADDRESS_MAP_END
static INPUT_PORTS_START( powerstack )
INPUT_PORTS_END
//static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, powerstack_state )
//ADDRESS_MAP_END
static MACHINE_CONFIG_START( powerstack )
// MCFG_CPU_ADD("maincpu", PPC604, 300'000'000) // PPC604E @ 300MHz
// MCFG_CPU_PROGRAM_MAP(mem_map)
MACHINE_CONFIG_END
ROM_START( powerstk )
ROM_REGION( 0x80000, "maincpu", 0 )
ROM_REGION( 0x80000, "roms", 0 )
ROM_LOAD( "motorola_powerstack2.bin", 0x0000, 0x80000, CRC(948e8fcd) SHA1(9a8c32b621c98bc33ee525f66747c34d39851685) )
ROM_END

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@ -9,7 +9,6 @@ Solbourne computer workstation. This looks like the Series 5E which uses the Cyp
************************************************************************************************************************************/
#include "emu.h"
//#include "cpu/mcs51/mcs51.h"
class solbourne_state : public driver_device
{
@ -19,16 +18,16 @@ public:
// , m_maincpu(*this, "maincpu")
{ }
protected:
// required_device<i80c52_device> m_maincpu;
private:
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, solbourne_state )
//ADDRESS_MAP_END
static INPUT_PORTS_START( solbourne )
INPUT_PORTS_END
//static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, solbourne_state )
//ADDRESS_MAP_END
static MACHINE_CONFIG_START( solbourne )
MACHINE_CONFIG_END

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@ -11,7 +11,7 @@ There are 25-pin serial and parallel ports, and a FDC connector. There's an undu
************************************************************************************************************************************/
#include "emu.h"
//#include "cpu/mcs51/mcs51.h"
#include "cpu/i86/i86.h"
class ts3000_state : public driver_device
{
@ -21,21 +21,29 @@ public:
// , m_maincpu(*this, "maincpu")
{ }
protected:
// required_device<i80c52_device> m_maincpu;
private:
// required_device<cpu_device> m_maincpu;
};
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, ts3000_state )
AM_RANGE(0x00000,0x0ffff) AM_RAM
AM_RANGE(0xfc000,0xfffff) AM_ROM AM_REGION("roms", 0)
ADDRESS_MAP_END
static ADDRESS_MAP_START( io_map, AS_PROGRAM, 8, ts3000_state )
ADDRESS_MAP_END
static INPUT_PORTS_START( ts3000 )
INPUT_PORTS_END
//static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, ts3000_state )
//ADDRESS_MAP_END
static MACHINE_CONFIG_START( ts3000 )
MCFG_CPU_ADD("maincpu", I8088, XTAL_14_31818MHz/3) // no idea of clock
MCFG_CPU_PROGRAM_MAP(mem_map)
MCFG_CPU_IO_MAP(io_map)
MACHINE_CONFIG_END
ROM_START( ts3000 )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_REGION( 0x4000, "roms", 0 )
ROM_LOAD( "U25 VER 2.03 BIOS D.u25", 0x0000, 0x4000, CRC(abaff64c) SHA1(b2f0e73d2a25a03d5bac558580919bd0400f4fcf) ) // The D at the end is handwritten
ROM_END

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@ -15,7 +15,8 @@ terminal which could decode simple commands into complex graphics.
************************************************************************************************************************************/
#include "emu.h"
//#include "cpu/mcs51/mcs51.h"
#include "cpu/i86/i86.h"
#include "machine/i8251.h"
class vectrix_state : public driver_device
{
@ -25,23 +26,36 @@ public:
// , m_maincpu(*this, "maincpu")
{ }
protected:
// required_device<i80c52_device> m_maincpu;
private:
// required_device<cpu_device> m_maincpu;
};
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, vectrix_state )
AM_RANGE(0x00000,0x07fff) AM_RAM
AM_RANGE(0x0c000,0x0ffff) AM_ROM AM_REGION("roms", 0)
AM_RANGE(0xfc000,0xfffff) AM_ROM AM_REGION("roms", 0)
ADDRESS_MAP_END
static ADDRESS_MAP_START( io_map, AS_PROGRAM, 8, vectrix_state )
AM_RANGE(0x3000, 0x3000) AM_DEVREADWRITE("uart1", i8251_device, data_r, data_w)
AM_RANGE(0x3001, 0x3001) AM_DEVREADWRITE("uart1", i8251_device, status_r, control_w)
ADDRESS_MAP_END
static INPUT_PORTS_START( vectrix )
INPUT_PORTS_END
//static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, vectrix_state )
//ADDRESS_MAP_END
static MACHINE_CONFIG_START( vectrix )
MCFG_CPU_ADD("maincpu", I8088, XTAL_14_31818MHz/3) // no idea of clock
MCFG_CPU_PROGRAM_MAP(mem_map)
MCFG_CPU_IO_MAP(io_map)
MCFG_DEVICE_ADD("uart1", I8251, 0)
MACHINE_CONFIG_END
ROM_START( vectrix )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_REGION( 0x4000, "roms", 0 )
ROM_LOAD( "vectrixl.bin", 0x0000, 0x2000, CRC(10b93e38) SHA1(0b1a23d384bfde4cd27c482f667eedd94f8f2406) )
ROM_LOAD( "vectrixr.bin", 0x0000, 0x2000, CRC(33f9b06b) SHA1(6a1dffe5c2c0254824a8dddb8543f86d9ad8f173) )
ROM_LOAD( "vectrixr.bin", 0x2000, 0x2000, CRC(33f9b06b) SHA1(6a1dffe5c2c0254824a8dddb8543f86d9ad8f173) )
ROM_END
COMP( 1983, vectrix, 0, 0, vectrix, vectrix, vectrix_state, 0, "Vectrix", "VX384 Graphics Processor Terminal", MACHINE_IS_SKELETON )

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@ -9,7 +9,7 @@ Wyse is a well-known maker of terminals. It is presumed this is one of them.
************************************************************************************************************************************/
#include "emu.h"
//#include "cpu/mcs51/mcs51.h"
#include "cpu/mcs51/mcs51.h"
class wyse_state : public driver_device
{
@ -19,26 +19,38 @@ public:
// , m_maincpu(*this, "maincpu")
{ }
protected:
// required_device<i80c52_device> m_maincpu;
private:
// required_device<cpu_device> m_maincpu;
};
static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, wyse_state )
AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0xc000, 0xffff) AM_RAM AM_SHARE("videoram")
ADDRESS_MAP_END
static ADDRESS_MAP_START( io_map, AS_IO, 8, wyse_state )
ADDRESS_MAP_END
static INPUT_PORTS_START( wyse )
INPUT_PORTS_END
//static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, wyse_state )
//ADDRESS_MAP_END
static MACHINE_CONFIG_START( wyse )
MCFG_CPU_ADD("maincpu", I80C32, XTAL_16MHz) // no idea of clock
MCFG_CPU_PROGRAM_MAP(mem_map)
MCFG_CPU_IO_MAP(io_map)
MACHINE_CONFIG_END
ROM_START( wyse )
ROM_REGION( 0x10000, "maincpu", 0 )
// unknown terminal (1984)
ROM_LOAD( "wyse_2201b.bin", 0x000000, 0x001000, CRC(ee318814) SHA1(0ac64b60ff978e607a087e9e6f4d547811c015c5) ) // chargen
ROM_LOAD( "wyse_2301e.bin", 0x000000, 0x002000, CRC(2a62ea25) SHA1(f69c596aab307ef1872df29d353b5a61ff77bb74) ) // program
// WY-160 terminal (1990)
ROM_LOAD( "wyse_251167-06.bin", 0x000000, 0x010000, CRC(36e920df) SHA1(8fb7f51b4f47ef63b21d421227d6fef98001e4e9) ) // program
ROM_LOAD( "wyse_2301e.bin", 0x0000, 0x2000, CRC(2a62ea25) SHA1(f69c596aab307ef1872df29d353b5a61ff77bb74) )
ROM_REGION( 0x1000, "chargen", 0 )
ROM_LOAD( "wyse_2201b.bin", 0x0000, 0x1000, CRC(ee318814) SHA1(0ac64b60ff978e607a087e9e6f4d547811c015c5) )
ROM_END
COMP( 19??, wyse, 0, 0, wyse, wyse, wyse_state, 0, "Wyse", "unknown Wyse terminal", MACHINE_IS_SKELETON )
ROM_START( wyse160 )
ROM_REGION( 0x10000, "maincpu", 0 ) // cpu not identified
ROM_LOAD( "wyse_251167-06.bin", 0x00000, 0x010000, CRC(36e920df) SHA1(8fb7f51b4f47ef63b21d421227d6fef98001e4e9) )
ROM_END
COMP( 1984, wyse, 0, 0, wyse, wyse, wyse_state, 0, "Wyse", "unknown Wyse terminal", MACHINE_IS_SKELETON )
COMP( 1990, wyse160, wyse, 0, wyse, wyse, wyse_state, 0, "Wyse", "WY-160", MACHINE_IS_SKELETON )

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@ -6,15 +6,16 @@
Ziatech ZT-8802 single-board computer. Advert says: V40 CPU @ 8MHz, 1MB DRAM, 512K EPROM, 3 RS-232 PORTS.
Chips: Maxim MAX249CQH, Exar XT16C452CJPS, Ziatech ICPSMCI-16C49A, 2x GAL22V10D, NEC D70208L-10, 2x ACT15245, 2x ACT11245, ACT11240,
PALCE 16V??-15JC, 2x CYM1465LPD-120C.
CPU is NEC D70208L-10 (V40) which is a V20 with 8251,8253,8255 included.
Chips: Maxim MAX249CQH, Exar XT16C452CJPS, Ziatech ICPSMCI-16C49A, 2x GAL22V10D, 2x ACT15245, 2x ACT11245,
ACT11240, PALCE 16V??-15JC, 2x CYM1465LPD-120C (RAM).
Other: A 3.6volt battery, a tiny crystal, a red LED, and about 2 dozen jumpers.
************************************************************************************************************************************/
#include "emu.h"
//#include "cpu/mcs51/mcs51.h"
class zt8802_state : public driver_device
{
@ -24,21 +25,22 @@ public:
// , m_maincpu(*this, "maincpu")
{ }
protected:
// required_device<i80c52_device> m_maincpu;
private:
// required_device<cpu_device> m_maincpu;
};
//static ADDRESS_MAP_START( mem_map, AS_PROGRAM, 8, zt8802_state )
// AM_RANGE(0x80000,0xfffff) AM_ROM AM_REGION("roms", 0)
//ADDRESS_MAP_END
static INPUT_PORTS_START( zt8802 )
INPUT_PORTS_END
//static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, zt8802_state )
//ADDRESS_MAP_END
static MACHINE_CONFIG_START( zt8802 )
MACHINE_CONFIG_END
ROM_START( zt8802 )
ROM_REGION( 0x80000, "maincpu", 0 )
ROM_REGION( 0x80000, "roms", 0 )
ROM_LOAD( "c103207-218 a.rom", 0x00000, 0x80000, CRC(fc1c6e99) SHA1(cfbb2f0c9927bac5abc85c12d2b82f7da46cab03) )
ROM_END

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@ -14556,6 +14556,7 @@ hazl1500 // Hazeltine 1500 (c) 1977
@source:hazeltine.cpp
hazeltine // Hazeltine Esprit
hazeltine3 // Hazeltine Esprit III
@source:hcastle.cpp
akumajou // GX768 (c) 1988 (Japan)
@ -38526,7 +38527,8 @@ wwfsstaru6 // TA-0024 (c) 1989 (US)
wwfsstaru4 // TA-0024 (c) 1989 (US)
@source:wyse.cpp
wyse //
wyse // possibly WY-50 or WY-60
wyse160 // WY-160
@source:wyvernf0.cpp
wyvernf0 // A39 (c) 1985 Taito Corporation (Japan)