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midxunit: ADC INT was here all along (nw)

master
AJR 2017-11-08 19:17:29 -05:00
parent 58b5eab4a8
commit 57ca5a4593
3 changed files with 15 additions and 26 deletions
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7
src/mame/drivers/midxunit.cpp
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@ -110,7 +110,10 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, midxunit_state )
AM_RANGE(0x20000000, 0x20ffffff) AM_RAM
AM_RANGE(0x40800000, 0x4fffffff) AM_WRITE(midxunit_unknown_w)
AM_RANGE(0x60400000, 0x6040001f) AM_READWRITE(midxunit_status_r, midxunit_security_clock_w)
AM_RANGE(0x60c00000, 0x60c0007f) AM_READ(midxunit_io_r)
AM_RANGE(0x60c00000, 0x60c0001f) AM_READ_PORT("IN0")
AM_RANGE(0x60c00020, 0x60c0003f) AM_READ_PORT("IN1")
AM_RANGE(0x60c00040, 0x60c0005f) AM_READ_PORT("IN2")
AM_RANGE(0x60c00060, 0x60c0007f) AM_READ_PORT("DSW")
AM_RANGE(0x60c00080, 0x60c000df) AM_WRITE(midxunit_io_w)
AM_RANGE(0x60c000e0, 0x60c000ff) AM_READWRITE(midxunit_security_r, midxunit_security_w)
AM_RANGE(0x80800000, 0x8080000f) AM_DEVREADWRITE8("adc", adc0848_device, read, write, 0x00ff)
@ -267,7 +270,7 @@ static MACHINE_CONFIG_START( midxunit )
MCFG_MIDWAY_SERIAL_PIC_UPPER(419);
MCFG_ADC0848_ADD("adc")
MCFG_ADC0848_INTR_CB(NOOP) // passed through PLSI1032; what does ADC INT actually map to?
MCFG_ADC0848_INTR_CB(WRITELINE(midxunit_state, adc_int_w)) // ADC INT passed through PLSI1032
MCFG_ADC0848_CH1_CB(IOPORT("AN0"))
MCFG_ADC0848_CH2_CB(IOPORT("AN1"))
MCFG_ADC0848_CH3_CB(IOPORT("AN2"))

3
src/mame/includes/midxunit.h
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@ -20,7 +20,7 @@ public:
DECLARE_WRITE16_MEMBER(midxunit_cmos_w);
DECLARE_WRITE16_MEMBER(midxunit_io_w);
DECLARE_WRITE16_MEMBER(midxunit_unknown_w);
DECLARE_READ16_MEMBER(midxunit_io_r);
DECLARE_WRITE_LINE_MEMBER(adc_int_w);
DECLARE_READ16_MEMBER(midxunit_status_r);
DECLARE_READ16_MEMBER(midxunit_uart_r);
DECLARE_WRITE16_MEMBER(midxunit_uart_w);
@ -45,4 +45,5 @@ private:
uint8_t m_ioshuffle[16];
uint8_t m_uart[8];
uint8_t m_security_bits;
bool m_adc_int;
};

31
src/mame/machine/midxunit.cpp
View File

@ -28,6 +28,7 @@ void midxunit_state::register_state_saving()
save_item(NAME(m_ioshuffle));
save_item(NAME(m_uart));
save_item(NAME(m_security_bits));
save_item(NAME(m_adc_int));
}
@ -102,6 +103,12 @@ WRITE16_MEMBER(midxunit_state::midxunit_unknown_w)
}
WRITE_LINE_MEMBER(midxunit_state::adc_int_w)
{
m_adc_int = (state != CLEAR_LINE);
}
/*************************************
*
@ -109,32 +116,10 @@ WRITE16_MEMBER(midxunit_state::midxunit_unknown_w)
*
*************************************/
READ16_MEMBER(midxunit_state::midxunit_io_r)
{
static const char *const portnames[] = { "IN0", "IN1", "IN2", "DSW" };
offset = (offset / 2) % 8;
switch (offset)
{
case 0:
case 1:
case 2:
case 3:
return ioport(portnames[offset])->read();
default:
logerror("%08X:Unknown I/O read from %d\n", space.device().safe_pc(), offset);
break;
}
return ~0;
}
READ16_MEMBER(midxunit_state::midxunit_status_r)
{
/* low bit indicates whether the ADC is done reading the current input */
return (m_midway_serial_pic->status_r(space,0) << 1) | 1;
return (m_midway_serial_pic->status_r(space,0) << 1) | (m_adc_int ? 1 : 0);
}