SH-2: added read-back for BCR1 register, fixing missing polygons in Daytona USA CE for Saturn [Mednafen, Angelo Salese]

Added stub bus/sci/wdt devices for sh7604, this part will require more work as h8 and sh2 shares same chips, damn
master
Angelo Salese 2016-09-28 12:33:09 +02:00 committed by GitHub
commit 4727ff5e6a
10 changed files with 667 additions and 13 deletions

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@ -646,6 +646,12 @@ if (CPUS["SH2"]~=null) then
MAME_DIR .. "src/devices/cpu/sh2/sh2.cpp",
MAME_DIR .. "src/devices/cpu/sh2/sh2.h",
MAME_DIR .. "src/devices/cpu/sh2/sh2fe.cpp",
MAME_DIR .. "src/devices/cpu/sh2/sh7604_bus.cpp",
MAME_DIR .. "src/devices/cpu/sh2/sh7604_bus.h",
MAME_DIR .. "src/devices/cpu/sh2/sh7604_sci.cpp",
MAME_DIR .. "src/devices/cpu/sh2/sh7604_sci.h",
MAME_DIR .. "src/devices/cpu/sh2/sh7604_wdt.cpp",
MAME_DIR .. "src/devices/cpu/sh2/sh7604_wdt.h",
--MAME_DIR .. "src/devices/cpu/sh2/sh2comn.cpp",
--MAME_DIR .. "src/devices/cpu/sh2/sh2comn.h",
--MAME_DIR .. "src/devices/cpu/sh2/sh2drc.cpp",

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@ -725,7 +725,7 @@ READ32_MEMBER( sh2_device::sh7604_r )
return (m_m[0x38] & 0x7fffffff) | (m_nmi_line_state == ASSERT_LINE ? 0 : 0x80000000);
case 0x78: // BCR1
return m_is_slave ? 0x00008000 : 0;
return (m_is_slave ? 0x00008000 : 0) | (m_m[0x78] & 0x7fff);
case 0x41: // dvdntl mirrors
case 0x47:

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@ -0,0 +1,170 @@
// license:BSD-3-Clause
// copyright-holders:Angelo Salese
/***************************************************************************
SH7604 BUS Controller
Lies at 0xffffffe0-0xffffffff
TODO:
- Host CPU setter (is_slave and clock are needed);
- timer clock emulation;
- fix fatalerrors;
- bus control stuff, someday;
***************************************************************************/
#include "emu.h"
#include "sh7604_bus.h"
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
// device type definition
const device_type SH7604_BUS = &device_creator<sh7604_bus_device>;
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
READ16_MEMBER(sh7604_bus_device::bus_control_1_r)
{
return (m_bcr1 & 0x1ff7) | (m_is_slave == true ? 0x8000 : 0);
}
WRITE16_MEMBER(sh7604_bus_device::bus_control_1_w)
{
COMBINE_DATA(&m_bcr1);
if(m_bcr1 & 0x1000) // ENDIAN
throw emu_fatalerror("%s: enabled little endian for Area 2\n", tag());
if(m_bcr1 & 0x0800) // PSHR
throw emu_fatalerror("%s: enabled partial space share mode\n", tag());
}
READ16_MEMBER(sh7604_bus_device::bus_control_2_r) { return m_bcr2 & 0x00fc; }
WRITE16_MEMBER(sh7604_bus_device::bus_control_2_w)
{
COMBINE_DATA(&m_bcr2);
if(m_bcr2 != 0x00fc)
throw emu_fatalerror("%s: unexpected bus size register set %04x\n", tag(),data);
}
READ16_MEMBER(sh7604_bus_device::wait_control_r) { return m_wcr; }
WRITE16_MEMBER(sh7604_bus_device::wait_control_w) { COMBINE_DATA(&m_wcr); }
READ16_MEMBER(sh7604_bus_device::memory_control_r) { return m_mcr & 0xfefc; }
WRITE16_MEMBER(sh7604_bus_device::memory_control_w) { COMBINE_DATA(&m_mcr); }
READ16_MEMBER(sh7604_bus_device::refresh_timer_status_r)
{
return m_rtcsr & 0x00f8;
}
WRITE16_MEMBER(sh7604_bus_device::refresh_timer_control_w)
{
COMBINE_DATA(&m_rtcsr);
if(m_rtcsr & 0x40)
throw emu_fatalerror("%s: enabled timer irq register with clock setting = %02x\n",tag(),data & 0x38);
}
READ16_MEMBER(sh7604_bus_device::refresh_timer_counter_r)
{
throw emu_fatalerror("%s: reading timer counter!\n",tag());
return 0;
}
WRITE16_MEMBER(sh7604_bus_device::refresh_timer_counter_w)
{
throw emu_fatalerror("%s: writing timer counter %04x\n",tag(),data);
//COMBINE_DATA(&m_rtcnt);
}
READ16_MEMBER(sh7604_bus_device::refresh_timer_constant_r)
{
return m_rtcor & 0xff;
}
WRITE16_MEMBER(sh7604_bus_device::refresh_timer_constant_w)
{
COMBINE_DATA(&m_rtcor);
}
static ADDRESS_MAP_START( bus_regs, AS_0, 16, sh7604_bus_device )
AM_RANGE(0x00, 0x01) AM_READWRITE(bus_control_1_r, bus_control_1_w)
AM_RANGE(0x02, 0x03) AM_READWRITE(bus_control_2_r, bus_control_2_w)
AM_RANGE(0x04, 0x05) AM_READWRITE(wait_control_r, wait_control_w)
AM_RANGE(0x06, 0x07) AM_READWRITE(memory_control_r, memory_control_w)
AM_RANGE(0x08, 0x09) AM_READWRITE(refresh_timer_status_r, refresh_timer_control_w)
AM_RANGE(0x0a, 0x0b) AM_READWRITE(refresh_timer_counter_r, refresh_timer_counter_w)
AM_RANGE(0x0c, 0x0d) AM_READWRITE(refresh_timer_constant_r, refresh_timer_constant_w)
// AM_RANGE(0x0e, 0x0f) unmapped, mirror?
ADDRESS_MAP_END
//-------------------------------------------------
// sh7604_bus_device - constructor
//-------------------------------------------------
sh7604_bus_device::sh7604_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SH7604_BUS, "sh7604_bus_longname", tag, owner, clock, "sh7604_bus", __FILE__),
device_memory_interface(mconfig, *this),
m_space_config("regs", ENDIANNESS_BIG, 16, 4, 0, nullptr, *ADDRESS_MAP_NAME(bus_regs))
{
}
const address_space_config *sh7604_bus_device::memory_space_config(address_spacenum spacenum) const
{
return (spacenum == AS_0) ? &m_space_config : nullptr;
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void sh7604_bus_device::device_start()
{
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void sh7604_bus_device::device_reset()
{
m_bcr1 = 0x03f0;
m_bcr2 = 0x00fc;
m_wcr = 0xaaff;
m_mcr = 0x0000;
m_rtcsr = 0x0000;
m_rtcor = 0x0000;
}
//**************************************************************************
// READ/WRITE HANDLERS
//**************************************************************************
READ32_MEMBER( sh7604_bus_device::read )
{
// 16 bit access only, TODO
return space.read_word(offset) & 0xffff;
}
WRITE32_MEMBER( sh7604_bus_device::write )
{
// TODO: 8 bit access is invalid
// if accessing bits 16-31, one must write ID = 0xa55a
if(ACCESSING_BITS_16_31)
{
// throw fatalerror if something trips it, presumably the write is going to be ignored
if((data & 0xffff0000) != 0xa55a0000)
throw emu_fatalerror("%s: making bus write with ID signature = %04x!\n", tag(),data >> 16);
}
space.write_word(offset,data & 0xffff);
}

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@ -0,0 +1,85 @@
// license:BSD-3-Clause
// copyright-holders:Angelo Salese
/***************************************************************************
SH7604 BUS Controller
***************************************************************************/
#pragma once
#ifndef __SH7604_BUSDEV_H__
#define __SH7604_BUSDEV_H__
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_SH7604_BUS_ADD(_tag,_freq) \
MCFG_DEVICE_ADD(_tag, SH7604_BUS, _freq)
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> sh7604_bus_device
class sh7604_bus_device : public device_t,
public device_memory_interface
{
public:
// construction/destruction
sh7604_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// I/O operations
DECLARE_WRITE32_MEMBER( write );
DECLARE_READ32_MEMBER( read );
DECLARE_READ16_MEMBER( bus_control_1_r );
DECLARE_WRITE16_MEMBER( bus_control_1_w );
DECLARE_READ16_MEMBER( bus_control_2_r );
DECLARE_WRITE16_MEMBER( bus_control_2_w );
DECLARE_READ16_MEMBER( wait_control_r );
DECLARE_WRITE16_MEMBER( wait_control_w );
DECLARE_READ16_MEMBER( memory_control_r );
DECLARE_WRITE16_MEMBER( memory_control_w );
DECLARE_READ16_MEMBER( refresh_timer_status_r );
DECLARE_WRITE16_MEMBER( refresh_timer_control_w );
DECLARE_READ16_MEMBER( refresh_timer_counter_r );
DECLARE_WRITE16_MEMBER( refresh_timer_counter_w );
DECLARE_READ16_MEMBER( refresh_timer_constant_r );
DECLARE_WRITE16_MEMBER( refresh_timer_constant_w );
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
protected:
// device-level overrides
//virtual void device_validity_check(validity_checker &valid) const;
virtual void device_start() override;
virtual void device_reset() override;
private:
bool m_is_slave;
const address_space_config m_space_config;
UINT16 m_bcr1;
UINT16 m_bcr2;
UINT16 m_wcr;
UINT16 m_mcr;
UINT16 m_rtcsr;
UINT16 m_rtcor;
};
// device type definition
extern const device_type SH7604_BUS;
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
#endif

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@ -0,0 +1,163 @@
// license:BSD-3-Clause
// copyright-holders:Angelo Salese
/***************************************************************************
SH7604 SCI Controller
Lies at 0xfffffe00-0xfffffe0f
TODO:
- diserial;
- CPU callbacks for RX and TX;
***************************************************************************/
#include "emu.h"
#include "sh7604_sci.h"
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
// device type definition
const device_type SH7604_SCI = &device_creator<sh7604_sci_device>;
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
READ8_MEMBER(sh7604_sci_device::serial_mode_r)
{
return m_smr;
}
WRITE8_MEMBER(sh7604_sci_device::serial_mode_w)
{
m_smr = data;
logerror("%s: serial mode set:\n",tag());
logerror("\tCommunication Mode: %s mode\n",data & 0x80 ? "clocked synchronous" : "asynchronous");
logerror("\tCharacter Length: %s mode\n",data & 0x40 ? "7-bit" : "8-bit");
logerror("\tParity Enable: %s\n",data & 0x20 ? "yes" : "no");
logerror("\tParity Mode: %s\n",data & 0x10 ? "Odd" : "Even");
logerror("\tStop bits: %s\n",data & 0x08 ? "2" : "1");
logerror("\tMultiprocessor mode: %s\n",data & 0x04 ? "yes" : "no");
logerror("\tClock select: clock/%d\n",4 << ((data & 0x03)*2));
}
READ8_MEMBER(sh7604_sci_device::serial_control_r)
{
return m_scr;
}
WRITE8_MEMBER(sh7604_sci_device::serial_control_w)
{
m_scr = data;
if(data & 0x30)
throw emu_fatalerror("%s: enabled serial control %02x\n", tag(),data);
}
READ8_MEMBER(sh7604_sci_device::serial_status_r)
{
return m_ssr;
}
WRITE8_MEMBER(sh7604_sci_device::serial_ack_w)
{
// TODO: verify this
m_ssr = (m_ssr & 0x06) | (m_ssr & data & 0xf9);
}
READ8_MEMBER(sh7604_sci_device::bitrate_r )
{
return m_brr;
}
WRITE8_MEMBER(sh7604_sci_device::bitrate_w )
{
m_brr = data;
}
READ8_MEMBER(sh7604_sci_device::transmit_data_r)
{
// ...
return 0;
}
WRITE8_MEMBER(sh7604_sci_device::transmit_data_w)
{
// ...
}
READ8_MEMBER(sh7604_sci_device::receive_data_r)
{
// ...
return 0;
}
static ADDRESS_MAP_START( sci_regs, AS_0, 8, sh7604_sci_device )
AM_RANGE(0x00, 0x00) AM_READWRITE(serial_mode_r, serial_mode_w)
AM_RANGE(0x01, 0x01) AM_READWRITE(bitrate_r, bitrate_w)
AM_RANGE(0x02, 0x02) AM_READWRITE(serial_control_r,serial_control_w)
AM_RANGE(0x03, 0x03) AM_READWRITE(transmit_data_r, transmit_data_w)
AM_RANGE(0x04, 0x04) AM_READWRITE(serial_status_r, serial_ack_w)
AM_RANGE(0x05, 0x05) AM_READ(receive_data_r)
ADDRESS_MAP_END
//-------------------------------------------------
// sh7604_sci_device - constructor
//-------------------------------------------------
sh7604_sci_device::sh7604_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SH7604_SCI, "sh7604_sci_longname", tag, owner, clock, "sh7604_sci", __FILE__),
device_memory_interface(mconfig, *this),
m_space_config("regs", ENDIANNESS_BIG, 8, 4, 0, nullptr, *ADDRESS_MAP_NAME(sci_regs))
{
}
const address_space_config *sh7604_sci_device::memory_space_config(address_spacenum spacenum) const
{
return (spacenum == AS_0) ? &m_space_config : nullptr;
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void sh7604_sci_device::device_start()
{
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void sh7604_sci_device::device_reset()
{
m_smr = 0;
m_scr = 0;
m_ssr = STATUS_TDRE|STATUS_TEND; //0x84;
m_brr = 0xff;
}
//**************************************************************************
// READ/WRITE HANDLERS
//**************************************************************************
READ8_MEMBER( sh7604_sci_device::read )
{
return space.read_byte(offset);
}
WRITE8_MEMBER( sh7604_sci_device::write )
{
space.write_byte(offset,data);
}

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@ -0,0 +1,90 @@
// license:BSD-3-Clause
// copyright-holders:Angelo Salese
/***************************************************************************
SH7604 SCI Controller
***************************************************************************/
#pragma once
#ifndef __SH7604_SCIDEV_H__
#define __SH7604_SCIDEV_H__
enum {
STATUS_MPBT = 1 << 0,
STATUS_MPB = 1 << 1,
STATUS_TEND = 1 << 2,
STATUS_PER = 1 << 3,
STATUS_FER = 1 << 4,
STATUS_ORER = 1 << 5,
STATUS_RDRF = 1 << 6,
STATUS_TDRE = 1 << 7
};
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_SH7604_SCI_ADD(_tag,_freq) \
MCFG_DEVICE_ADD(_tag, SH7604_SCI, _freq)
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> sh7604_sci_device
class sh7604_sci_device : public device_t,
public device_memory_interface
{
public:
// construction/destruction
sh7604_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// I/O operations
DECLARE_WRITE8_MEMBER( write );
DECLARE_READ8_MEMBER( read );
DECLARE_READ8_MEMBER( serial_mode_r );
DECLARE_WRITE8_MEMBER( serial_mode_w );
DECLARE_READ8_MEMBER( bitrate_r );
DECLARE_WRITE8_MEMBER( bitrate_w );
DECLARE_READ8_MEMBER( serial_control_r );
DECLARE_WRITE8_MEMBER( serial_control_w );
DECLARE_READ8_MEMBER( transmit_data_r );
DECLARE_WRITE8_MEMBER( transmit_data_w );
DECLARE_READ8_MEMBER( serial_status_r );
DECLARE_WRITE8_MEMBER( serial_ack_w );
DECLARE_READ8_MEMBER( receive_data_r );
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
protected:
// device-level overrides
// virtual void device_validity_check(validity_checker &valid) const;
virtual void device_start() override;
virtual void device_reset() override;
private:
const address_space_config m_space_config;
UINT8 m_smr;
UINT8 m_scr;
UINT8 m_ssr;
UINT8 m_brr;
};
// device type definition
extern const device_type SH7604_SCI;
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
#endif

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@ -0,0 +1,86 @@
// license:BSD-3-Clause
// copyright-holders:Angelo Salese
/***************************************************************************
SH7604 Watchdog Timer Controller
TODO:
- Host CPU setter (clock and callback for irq and reset lines);
- memory map (needs to verify if ID write is ok);
***************************************************************************/
#include "emu.h"
#include "sh7604_wdt.h"
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
// device type definition
const device_type SH7604_WDT = &device_creator<sh7604_wdt_device>;
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
static ADDRESS_MAP_START( wdt_regs, AS_0, 8, sh7604_wdt_device )
// AM_RANGE(0x00, 0x00) timer control/status
// AM_RANGE(0x01, 0x01) timer counter
// AM_RANGE(0x02, 0x02) write only, reset control register
// AM_RANGE(0x03, 0x03) read status register, write reset status register
ADDRESS_MAP_END
//-------------------------------------------------
// sh7604_wdt_device - constructor
//-------------------------------------------------
sh7604_wdt_device::sh7604_wdt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SH7604_WDT, "sh7604_wdt_longname", tag, owner, clock, "sh7604_wdt", __FILE__),
device_memory_interface(mconfig, *this),
m_space_config("regs", ENDIANNESS_BIG, 8, 4, 0, nullptr, *ADDRESS_MAP_NAME(wdt_regs))
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void sh7604_wdt_device::device_start()
{
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void sh7604_wdt_device::device_reset()
{
}
//**************************************************************************
// READ/WRITE HANDLERS
//**************************************************************************
READ8_MEMBER( sh7604_wdt_device::read )
{
return space.read_byte(offset);
}
WRITE16_MEMBER( sh7604_wdt_device::write )
{
UINT8 id_param = data >> 8;
switch(id_param)
{
case 0xa5: space.write_byte(offset*2+0,data & 0xff); break;
case 0x5a: space.write_byte(offset*2+1,data & 0xff); break;
default: throw emu_fatalerror("%s: invalid id param write = %02x\n",tag(),id_param);
}
}

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@ -0,0 +1,62 @@
// license:BSD-3-Clause
// copyright-holders:Angelo Salese
/***************************************************************************
SH7604 Watchdog Timer Controller
***************************************************************************/
#pragma once
#ifndef __SH7604_WDTDEV_H__
#define __SH7604_WDTDEV_H__
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_SH7604_WDT_ADD(_tag,_freq) \
MCFG_DEVICE_ADD(_tag, SH7604_WDT, _freq)
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> sh7604_wdt_device
class sh7604_wdt_device : public device_t,
public device_memory_interface
{
public:
// construction/destruction
sh7604_wdt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// I/O operations
DECLARE_WRITE16_MEMBER( write );
DECLARE_READ8_MEMBER( read );
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
protected:
// device-level overrides
// virtual void device_validity_check(validity_checker &valid) const;
virtual void device_start() override;
virtual void device_reset() override;
private:
const address_space_config m_space_config;
};
// device type definition
extern const device_type SH7604_WDT;
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
#endif

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@ -7,7 +7,7 @@ Template for skeleton device
***************************************************************************/
#include "emu.h"
#include "machine/xxx.h"
#include "xxx.h"
@ -33,14 +33,6 @@ xxx_device::xxx_device(const machine_config &mconfig, const char *tag, device_t
}
//-------------------------------------------------
// device_validity_check - perform validity checks
// on this device
//-------------------------------------------------
void xxx_device::device_validity_check(validity_checker &valid) const
{
}
//-------------------------------------------------

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@ -38,9 +38,9 @@ public:
protected:
// device-level overrides
virtual void device_validity_check(validity_checker &valid) const;
virtual void device_start();
virtual void device_reset();
// virtual void device_validity_check(validity_checker &valid) const;
virtual void device_start() override;
virtual void device_reset() override;
};