352 lines
11 KiB
C++
352 lines
11 KiB
C++
/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
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* vim: set ts=8 sts=4 et sw=4 tw=99:
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* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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#include "jit/mips64/Assembler-mips64.h"
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#include "mozilla/DebugOnly.h"
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using mozilla::DebugOnly;
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using namespace js;
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using namespace js::jit;
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ABIArgGenerator::ABIArgGenerator()
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: usedArgSlots_(0),
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firstArgFloat(false),
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current_()
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{}
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ABIArg
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ABIArgGenerator::next(MIRType type)
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{
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switch (type) {
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case MIRType::Int32:
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case MIRType::Int64:
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case MIRType::Pointer: {
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Register destReg;
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if (GetIntArgReg(usedArgSlots_, &destReg))
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current_ = ABIArg(destReg);
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else
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current_ = ABIArg(GetArgStackDisp(usedArgSlots_));
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usedArgSlots_++;
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break;
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}
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case MIRType::Float32:
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case MIRType::Double: {
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FloatRegister destFReg;
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FloatRegister::ContentType contentType;
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if (!usedArgSlots_)
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firstArgFloat = true;
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contentType = (type == MIRType::Double) ?
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FloatRegisters::Double : FloatRegisters::Single;
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if (GetFloatArgReg(usedArgSlots_, &destFReg))
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current_ = ABIArg(FloatRegister(destFReg.id(), contentType));
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else
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current_ = ABIArg(GetArgStackDisp(usedArgSlots_));
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usedArgSlots_++;
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break;
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}
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default:
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MOZ_CRASH("Unexpected argument type");
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}
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return current_;
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}
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uint32_t
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js::jit::RT(FloatRegister r)
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{
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MOZ_ASSERT(r.id() < FloatRegisters::TotalPhys);
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return r.id() << RTShift;
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}
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uint32_t
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js::jit::RD(FloatRegister r)
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{
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MOZ_ASSERT(r.id() < FloatRegisters::TotalPhys);
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return r.id() << RDShift;
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}
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uint32_t
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js::jit::RZ(FloatRegister r)
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{
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MOZ_ASSERT(r.id() < FloatRegisters::TotalPhys);
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return r.id() << RZShift;
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}
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uint32_t
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js::jit::SA(FloatRegister r)
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{
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MOZ_ASSERT(r.id() < FloatRegisters::TotalPhys);
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return r.id() << SAShift;
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}
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// Used to patch jumps created by MacroAssemblerMIPS64Compat::jumpWithPatch.
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void
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jit::PatchJump(CodeLocationJump& jump_, CodeLocationLabel label, ReprotectCode reprotect)
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{
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Instruction* inst;
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inst = AssemblerMIPSShared::GetInstructionImmediateFromJump((Instruction*)jump_.raw());
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// Six instructions used in load 64-bit imm.
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MaybeAutoWritableJitCode awjc(inst, 6 * sizeof(uint32_t), reprotect);
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Assembler::UpdateLoad64Value(inst, (uint64_t)label.raw());
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AutoFlushICache::flush(uintptr_t(inst), 6 * sizeof(uint32_t));
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}
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// For more infromation about backedges look at comment in
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// MacroAssemblerMIPS64Compat::backedgeJump()
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void
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jit::PatchBackedge(CodeLocationJump& jump, CodeLocationLabel label,
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JitRuntime::BackedgeTarget target)
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{
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uintptr_t sourceAddr = (uintptr_t)jump.raw();
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uintptr_t targetAddr = (uintptr_t)label.raw();
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InstImm* branch = (InstImm*)jump.raw();
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MOZ_ASSERT(branch->extractOpcode() == (uint32_t(op_beq) >> OpcodeShift));
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if (BOffImm16::IsInRange(targetAddr - sourceAddr)) {
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branch->setBOffImm16(BOffImm16(targetAddr - sourceAddr));
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} else {
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if (target == JitRuntime::BackedgeLoopHeader) {
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Instruction* inst = &branch[1];
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Assembler::UpdateLoad64Value(inst, targetAddr);
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// Jump to first ori. The lui will be executed in delay slot.
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branch->setBOffImm16(BOffImm16(2 * sizeof(uint32_t)));
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} else {
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Instruction* inst = &branch[6];
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Assembler::UpdateLoad64Value(inst, targetAddr);
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// Jump to first ori of interrupt loop.
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branch->setBOffImm16(BOffImm16(6 * sizeof(uint32_t)));
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}
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}
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}
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uintptr_t
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Assembler::GetPointer(uint8_t* instPtr)
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{
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Instruction* inst = (Instruction*)instPtr;
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return Assembler::ExtractLoad64Value(inst);
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}
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static JitCode *
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CodeFromJump(Instruction* jump)
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{
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uint8_t* target = (uint8_t*)Assembler::ExtractLoad64Value(jump);
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return JitCode::FromExecutable(target);
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}
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void
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Assembler::TraceJumpRelocations(JSTracer* trc, JitCode* code, CompactBufferReader& reader)
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{
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while (reader.more()) {
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JitCode* child = CodeFromJump((Instruction*)(code->raw() + reader.readUnsigned()));
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TraceManuallyBarrieredEdge(trc, &child, "rel32");
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}
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}
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static void
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TraceOneDataRelocation(JSTracer* trc, Instruction* inst)
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{
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void* ptr = (void*)Assembler::ExtractLoad64Value(inst);
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void* prior = ptr;
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// All pointers on MIPS64 will have the top bits cleared. If those bits
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// are not cleared, this must be a Value.
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uintptr_t word = reinterpret_cast<uintptr_t>(ptr);
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if (word >> JSVAL_TAG_SHIFT) {
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Value v = Value::fromRawBits(word);
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TraceManuallyBarrieredEdge(trc, &v, "ion-masm-value");
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ptr = (void*)v.bitsAsPunboxPointer();
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} else {
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// No barrier needed since these are constants.
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TraceManuallyBarrieredGenericPointerEdge(trc, reinterpret_cast<gc::Cell**>(&ptr),
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"ion-masm-ptr");
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}
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if (ptr != prior) {
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Assembler::UpdateLoad64Value(inst, uint64_t(ptr));
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AutoFlushICache::flush(uintptr_t(inst), 6 * sizeof(uint32_t));
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}
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}
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static void
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TraceDataRelocations(JSTracer* trc, uint8_t* buffer, CompactBufferReader& reader)
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{
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while (reader.more()) {
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size_t offset = reader.readUnsigned();
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Instruction* inst = (Instruction*)(buffer + offset);
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TraceOneDataRelocation(trc, inst);
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}
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}
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static void
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TraceDataRelocations(JSTracer* trc, MIPSBuffer* buffer, CompactBufferReader& reader)
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{
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while (reader.more()) {
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BufferOffset bo (reader.readUnsigned());
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MIPSBuffer::AssemblerBufferInstIterator iter(bo, buffer);
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TraceOneDataRelocation(trc, iter.cur());
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}
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}
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void
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Assembler::TraceDataRelocations(JSTracer* trc, JitCode* code, CompactBufferReader& reader)
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{
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::TraceDataRelocations(trc, code->raw(), reader);
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}
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void
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Assembler::trace(JSTracer* trc)
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{
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for (size_t i = 0; i < jumps_.length(); i++) {
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RelativePatch& rp = jumps_[i];
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if (rp.kind == Relocation::JITCODE) {
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JitCode* code = JitCode::FromExecutable((uint8_t*)rp.target);
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TraceManuallyBarrieredEdge(trc, &code, "masmrel32");
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MOZ_ASSERT(code == JitCode::FromExecutable((uint8_t*)rp.target));
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}
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}
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if (dataRelocations_.length()) {
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CompactBufferReader reader(dataRelocations_);
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::TraceDataRelocations(trc, &m_buffer, reader);
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}
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}
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void
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Assembler::Bind(uint8_t* rawCode, CodeOffset* label, const void* address)
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{
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if (label->bound()) {
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intptr_t offset = label->offset();
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Instruction* inst = (Instruction*) (rawCode + offset);
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Assembler::UpdateLoad64Value(inst, (uint64_t)address);
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}
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}
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uint64_t
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Assembler::ExtractLoad64Value(Instruction* inst0)
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{
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InstImm* i0 = (InstImm*) inst0;
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InstImm* i1 = (InstImm*) i0->next();
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InstReg* i2 = (InstReg*) i1->next();
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InstImm* i3 = (InstImm*) i2->next();
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InstImm* i5 = (InstImm*) i3->next()->next();
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MOZ_ASSERT(i0->extractOpcode() == ((uint32_t)op_lui >> OpcodeShift));
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MOZ_ASSERT(i1->extractOpcode() == ((uint32_t)op_ori >> OpcodeShift));
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MOZ_ASSERT(i3->extractOpcode() == ((uint32_t)op_ori >> OpcodeShift));
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if ((i2->extractOpcode() == ((uint32_t)op_special >> OpcodeShift)) &&
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(i2->extractFunctionField() == ff_dsrl32))
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{
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uint64_t value = (uint64_t(i0->extractImm16Value()) << 32) |
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(uint64_t(i1->extractImm16Value()) << 16) |
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uint64_t(i3->extractImm16Value());
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return uint64_t((int64_t(value) <<16) >> 16);
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}
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MOZ_ASSERT(i5->extractOpcode() == ((uint32_t)op_ori >> OpcodeShift));
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uint64_t value = (uint64_t(i0->extractImm16Value()) << 48) |
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(uint64_t(i1->extractImm16Value()) << 32) |
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(uint64_t(i3->extractImm16Value()) << 16) |
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uint64_t(i5->extractImm16Value());
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return value;
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}
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void
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Assembler::UpdateLoad64Value(Instruction* inst0, uint64_t value)
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{
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InstImm* i0 = (InstImm*) inst0;
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InstImm* i1 = (InstImm*) i0->next();
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InstReg* i2 = (InstReg*) i1->next();
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InstImm* i3 = (InstImm*) i2->next();
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InstImm* i5 = (InstImm*) i3->next()->next();
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MOZ_ASSERT(i0->extractOpcode() == ((uint32_t)op_lui >> OpcodeShift));
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MOZ_ASSERT(i1->extractOpcode() == ((uint32_t)op_ori >> OpcodeShift));
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MOZ_ASSERT(i3->extractOpcode() == ((uint32_t)op_ori >> OpcodeShift));
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if ((i2->extractOpcode() == ((uint32_t)op_special >> OpcodeShift)) &&
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(i2->extractFunctionField() == ff_dsrl32))
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{
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i0->setImm16(Imm16::Lower(Imm32(value >> 32)));
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i1->setImm16(Imm16::Upper(Imm32(value)));
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i3->setImm16(Imm16::Lower(Imm32(value)));
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return;
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}
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MOZ_ASSERT(i5->extractOpcode() == ((uint32_t)op_ori >> OpcodeShift));
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i0->setImm16(Imm16::Upper(Imm32(value >> 32)));
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i1->setImm16(Imm16::Lower(Imm32(value >> 32)));
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i3->setImm16(Imm16::Upper(Imm32(value)));
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i5->setImm16(Imm16::Lower(Imm32(value)));
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}
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void
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Assembler::PatchDataWithValueCheck(CodeLocationLabel label, ImmPtr newValue,
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ImmPtr expectedValue)
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{
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PatchDataWithValueCheck(label, PatchedImmPtr(newValue.value),
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PatchedImmPtr(expectedValue.value));
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}
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void
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Assembler::PatchDataWithValueCheck(CodeLocationLabel label, PatchedImmPtr newValue,
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PatchedImmPtr expectedValue)
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{
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Instruction* inst = (Instruction*) label.raw();
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// Extract old Value
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DebugOnly<uint64_t> value = Assembler::ExtractLoad64Value(inst);
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MOZ_ASSERT(value == uint64_t(expectedValue.value));
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// Replace with new value
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Assembler::UpdateLoad64Value(inst, uint64_t(newValue.value));
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AutoFlushICache::flush(uintptr_t(inst), 6 * sizeof(uint32_t));
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}
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void
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Assembler::PatchInstructionImmediate(uint8_t* code, PatchedImmPtr imm)
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{
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Assembler::UpdateLoad64Value((Instruction*)code, (uint64_t)imm.value);
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}
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uint64_t
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Assembler::ExtractInstructionImmediate(uint8_t* code)
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{
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InstImm* inst = (InstImm*)code;
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return Assembler::ExtractLoad64Value(inst);
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}
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void
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Assembler::ToggleCall(CodeLocationLabel inst_, bool enabled)
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{
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Instruction* inst = (Instruction*)inst_.raw();
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InstImm* i0 = (InstImm*) inst;
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InstImm* i1 = (InstImm*) i0->next();
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InstImm* i3 = (InstImm*) i1->next()->next();
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Instruction* i4 = (Instruction*) i3->next();
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MOZ_ASSERT(i0->extractOpcode() == ((uint32_t)op_lui >> OpcodeShift));
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MOZ_ASSERT(i1->extractOpcode() == ((uint32_t)op_ori >> OpcodeShift));
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MOZ_ASSERT(i3->extractOpcode() == ((uint32_t)op_ori >> OpcodeShift));
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if (enabled) {
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MOZ_ASSERT(i4->extractOpcode() != ((uint32_t)op_lui >> OpcodeShift));
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InstReg jalr = InstReg(op_special, ScratchRegister, zero, ra, ff_jalr);
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*i4 = jalr;
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} else {
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InstNOP nop;
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*i4 = nop;
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}
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AutoFlushICache::flush(uintptr_t(i4), sizeof(uint32_t));
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}
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