Ori Bernstein 5b8b5884f4 5l: fix shifts by zero ... on arm32, we can do one of 4 shifts by a constant: reg<<(0..31) reg>>(1..32) ((u32int)reg)>>(1..32) reg ROT (0..31) There's no way to encode a 0 bit right shift, so when encoding reg>>0, flip it to the equivalent nop reg<<0, which can be encoded.		2021-01-23 20:36:09 -08:00
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asm.c	5l: fix shifts by zero	2021-01-23 20:36:09 -08:00
compat.c	cc, ?[acl]: fix gethunk() and move common memory allocator code to cc/compat	2020-04-11 05:03:49 +02:00
l.h	cc, ?[acl]: fix gethunk() and move common memory allocator code to cc/compat	2020-04-11 05:03:49 +02:00
list.c	[257]l: cleanup fmt routines, replace sprint()	2020-04-19 23:47:23 +02:00
mkfile	cc, ?[acl]: fix gethunk() and move common memory allocator code to cc/compat	2020-04-11 05:03:49 +02:00
noop.c	add arm vfp support to compiler and linker (from sources)	2013-01-26 18:03:45 +01:00
obj.c	cc: dont export gethunk(), hunk, nhunk and thunk	2020-05-12 23:18:48 +02:00
optab.c	5a, 5l: add LDREX/STREX/CLREX instructions	2014-08-07 20:22:00 +02:00
pass.c	Import sources from 2011-03-30 iso image - lib	2011-03-30 19:35:09 +03:00
sched.c	5l: ROR instruction	2016-07-08 04:16:37 +02:00
span.c	5l: ROR instruction	2016-07-08 04:16:37 +02:00