474 lines
9.8 KiB
C
474 lines
9.8 KiB
C
#include "u.h"
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#include "../port/lib.h"
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#include "mem.h"
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#include "dat.h"
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#include "fns.h"
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#include "io.h"
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#include "../port/netif.h"
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#include "../port/etherif.h"
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#define Rbsz ROUNDUP(sizeof(Etherpkt)+16, 64)
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enum {
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Linkdelay = 500,
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RXRING = 512,
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TXRING = 512
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};
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enum {
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PERMODRST_EMAC1 = 1<<1,
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SYSMGR_EMAC_CTRL = 0x60/4,
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MAC_CONFIG = 0x0/4,
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MAC_FRAME_FILTER = 0x4/4,
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GMII_ADDRESS = 0x10/4,
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GMII_DATA = 0x14/4,
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INTERRUPT_STATUS = 0x38/4,
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INTERRUPT_MASK = 0x3C/4,
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MAC_ADDRESS = 0x40/4,
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HASH_TABLE = 0x500/4,
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DMA_BUS_MODE = 0x1000/4,
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DMA_BUS_MODE_SWR = 1<<0,
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DMA_TX_POLL = 0x1004/4,
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DMA_RX_POLL = 0x1008/4,
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DMA_STATUS = 0x1014/4,
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DMA_OPERATION_MODE = 0x1018/4,
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DMA_INTERRUPT_ENABLE = 0x101C/4,
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DMA_AXI_STATUS = 0x102C/4,
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RXRING_ADDRESS = 0x100C/4,
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TXRING_ADDRESS = 0x1010/4,
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};
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enum {
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MDCTRL,
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MDSTATUS,
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MDID1,
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MDID2,
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MDAUTOADV,
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MDAUTOPART,
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MDAUTOEX,
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MDAUTONEXT,
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MDAUTOLINK,
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MDGCTRL,
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MDGSTATUS,
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MDPHYCTRL = 0x1f,
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/* MDCTRL */
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MDRESET = 1<<15,
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AUTONEG = 1<<12,
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FULLDUP = 1<<8,
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/* MDSTATUS */
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LINK = 1<<2,
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/* MDGSTATUS */
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RECVOK = 3<<12,
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};
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typedef struct Ctlr Ctlr;
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struct Ctlr {
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ulong *r;
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ulong *rxr, *txr;
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Block **rxs, **txs;
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int rxprodi, rxconsi, txi;
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int attach;
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Lock txlock;
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uchar (*mc)[6];
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int nmc;
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};
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static void
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mdwrite(Ctlr *c, int r, u16int v)
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{
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while((c->r[GMII_ADDRESS] & 1<<0) != 0)
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tsleep(&up->sleep, return0, nil, 1);
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c->r[GMII_DATA] = v;
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c->r[GMII_ADDRESS] = 1<<11 | (r&31)<<6 | 1<<1 | 1<<0;
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while((c->r[GMII_ADDRESS] & 1<<0) != 0)
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tsleep(&up->sleep, return0, nil, 1);
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}
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static u16int
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mdread(Ctlr *c, int r)
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{
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while((c->r[GMII_ADDRESS] & 1<<0) != 0)
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tsleep(&up->sleep, return0, nil, 1);
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c->r[GMII_ADDRESS] = 1<<11 | (r&31)<<6 | 1<<0;
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while((c->r[GMII_ADDRESS] & 1<<0) != 0)
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tsleep(&up->sleep, return0, nil, 1);
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return c->r[GMII_DATA];
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}
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static void
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ethproc(void *ved)
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{
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Ether *edev;
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Ctlr *c;
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char *sp, *dpl;
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u16int v;
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edev = ved;
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c = edev->ctlr;
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mdwrite(c, MDCTRL, AUTONEG);
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for(;;){
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if((mdread(c, MDSTATUS) & LINK) == 0){
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edev->link = 0;
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print("eth: no link\n");
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while((mdread(c, MDSTATUS) & LINK) == 0)
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tsleep(&up->sleep, return0, nil, Linkdelay);
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}
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v = mdread(c, MDPHYCTRL);
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if((v & 0x40) != 0){
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sp = "1000BASE-T";
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while((mdread(c, MDGSTATUS) & RECVOK) != RECVOK)
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;
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edev->mbps = 1000;
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c->r[MAC_CONFIG] &= ~(1<<15);
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}else if((v & 0x20) != 0){
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sp = "100BASE-TX";
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edev->mbps = 100;
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c->r[MAC_CONFIG] = c->r[MAC_CONFIG] | (1<<15|1<<14);
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}else if((v & 0x10) != 0){
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sp = "10BASE-T";
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edev->mbps = 10;
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c->r[MAC_CONFIG] = c->r[MAC_CONFIG] & ~(1<<14) | 1<<15;
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}else
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sp = "???";
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if((v & 0x08) != 0){
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dpl = "full";
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c->r[MAC_CONFIG] |= 1<<11;
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}else{
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dpl = "half";
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c->r[MAC_CONFIG] &= ~(1<<11);
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}
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edev->link = 1;
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print("eth: %s %s duplex link\n", sp, dpl);
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c->r[MAC_CONFIG] |= 1<<3 | 1<<2;
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while((mdread(c, MDSTATUS) & LINK) != 0)
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tsleep(&up->sleep, return0, nil, Linkdelay);
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}
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}
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static int
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replenish(Ctlr *c)
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{
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Block *bp;
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int i;
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ulong *r;
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while(c->rxprodi != c->rxconsi){
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i = c->rxprodi;
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bp = iallocb(Rbsz);
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if(bp == nil){
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print("eth: out of memory for receive buffers\n");
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return -1;
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}
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c->rxs[i] = bp;
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r = &c->rxr[4 * i];
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r[0] = 0;
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cleandse(bp->base, bp->lim);
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r[1] = Rbsz;
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if(i == RXRING - 1) r[1] |= 1<<15;
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r[2] = PADDR(bp->rp);
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r[3] = 0;
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r[0] |= 1<<31;
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c->rxprodi = (c->rxprodi + 1) & (RXRING - 1);
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}
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c->r[DMA_RX_POLL] = 0xBA5EBA11;
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return 0;
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}
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static void
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ethrx(Ether *edev)
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{
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Ctlr *c;
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ulong *r;
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Block *bp;
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c = edev->ctlr;
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for(;;){
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r = &c->rxr[4 * c->rxconsi];
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if((r[0] >> 31) != 0)
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break;
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if((r[0] & (3<<8)) != (3<<8))
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iprint("eth: lilu dallas multidescriptor\n");
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bp = c->rxs[c->rxconsi];
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bp->wp = bp->rp + (r[0] >> 16 & 0x3fff);
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invaldse(bp->rp, bp->wp);
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etheriq(edev, bp);
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c->rxconsi = (c->rxconsi + 1) & (RXRING - 1);
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replenish(c);
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}
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}
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static void
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ethtx(Ether *edev)
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{
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Ctlr *c;
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ulong *r;
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Block *bp;
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c = edev->ctlr;
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ilock(&c->txlock);
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for(;;){
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r = &c->txr[4 * c->txi];
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if((r[0] >> 31) != 0){
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print("eth: transmit buffer full\n");
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break;
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}
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bp = qget(edev->oq);
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if(bp == nil)
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break;
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if(c->txs[c->txi] != nil)
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freeb(c->txs[c->txi]);
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c->txs[c->txi] = bp;
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cleandse(bp->rp, bp->wp);
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r[0] = 1<<30 | 1<<29 | 1<<28;
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if(c->txi == TXRING - 1)
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r[0] |= 1<<21;
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r[1] = BLEN(bp);
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r[2] = PADDR(bp->rp);
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r[3] = 0;
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r[0] |= 1<<31;
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coherence();
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c->r[DMA_TX_POLL] = 0xBA5EBA11;
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c->txi = (c->txi + 1) & (TXRING - 1);
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}
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iunlock(&c->txlock);
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}
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static void
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ethirq(Ureg *, void *arg)
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{
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Ether *edev;
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Ctlr *c;
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ulong fl;
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edev = arg;
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c = edev->ctlr;
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fl = c->r[DMA_STATUS];
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c->r[DMA_STATUS] = fl;
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if((fl & 1<<1) != 0)
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iprint("eth: transmit stop\n");
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if((fl & (1<<0|1<<2)) != 0)
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ethtx(edev);
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if((fl & 1<<4) != 0)
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iprint("eth: receive overflow\n");
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if((fl & (1<<6|1<<7)) != 0)
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ethrx(edev);
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if((fl & 1<<8) != 0)
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iprint("eth: receive stop\n");
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}
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static int
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ethinit(Ether *edev)
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{
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Ctlr *c;
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c = edev->ctlr;
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resetmgr[PERMODRST] |= PERMODRST_EMAC1;
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/* assume bootloader set up clock */
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sysmgr[SYSMGR_EMAC_CTRL] = 1<<2 | 1; /* RGMII */
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sysmgr[FPGA_MODULE] = sysmgr[FPGA_MODULE] & ~(1<<2 | 1<<3);
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microdelay(1);
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resetmgr[PERMODRST] &= ~PERMODRST_EMAC1;
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/* reset DMA */
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c->r[DMA_BUS_MODE] |= DMA_BUS_MODE_SWR;
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do microdelay(1);
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while((c->r[DMA_BUS_MODE] & DMA_BUS_MODE_SWR) != 0);
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/* wait for AXI transactions to finish */
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while((c->r[DMA_AXI_STATUS] & 3) != 0)
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microdelay(1);
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/* set up bus mode (32 beat bursts) */
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c->r[DMA_BUS_MODE] |= 32 << 8;
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c->r[MAC_ADDRESS] = 1<<31 | edev->ea[5] << 8 | edev->ea[4];
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c->r[MAC_ADDRESS+1] = edev->ea[3] << 24 | edev->ea[2] << 16 | edev->ea[1] << 8 | edev->ea[0];
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c->r[MAC_FRAME_FILTER] = 0;
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c->rxr = ucalloc(16 * RXRING);
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c->txr = ucalloc(16 * TXRING);
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c->rxs = xspanalloc(4 * RXRING, 4, 0);
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c->txs = xspanalloc(4 * TXRING, 4, 0);
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memset(c->rxr, 0, 16 * RXRING);
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memset(c->txr, 0, 16 * TXRING);
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c->rxconsi = 1;
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replenish(c);
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c->rxconsi = 0;
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replenish(c);
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c->r[RXRING_ADDRESS] = PADDR(c->rxr);
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c->r[TXRING_ADDRESS] = PADDR(c->txr);
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c->r[DMA_STATUS] = -1;
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c->r[INTERRUPT_MASK] = -1;
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c->r[DMA_INTERRUPT_ENABLE] = 1<<16 | 1<<15 | 1<<8 | 1<<6 | 1<<2 | 1<<1 | 1<<0;
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c->r[DMA_OPERATION_MODE] = 1<<1 | 1<<13;
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return 0;
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}
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static void
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ethattach(Ether *edev)
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{
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Ctlr *c;
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c = edev->ctlr;
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if(c->attach)
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return;
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c->attach = 1;
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kproc("ethproc", ethproc, edev);
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}
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static void
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ethprom(void *arg, int on)
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{
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Ether *edev;
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Ctlr *c;
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edev = arg;
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c = edev->ctlr;
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if(on)
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c->r[MAC_FRAME_FILTER] |= 0x80000001;
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else
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c->r[MAC_FRAME_FILTER] &= ~0x80000001;
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}
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static void
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sethash(uchar *ea, ulong *hash)
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{
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ulong crc;
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int i;
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uchar n;
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crc = ethercrc(ea, 6);
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n = 0;
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for(i = 0; i < 8; i++){
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n = n << 1 | crc & 1;
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crc >>= 1;
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}
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n ^= 0xff;
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hash[n>>5] |= (1<<(n & 31));
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}
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static void
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ethmcast(void *arg, uchar *ea, int on)
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{
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enum { MCSlots = 31 };
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Ether *edev;
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Ctlr *c;
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int i, p;
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ulong hash[8];
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edev = arg;
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c = edev->ctlr;
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if(on){
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c->mc = realloc(c->mc, (c->nmc + 1) * 6);
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memmove(c->mc[c->nmc++], ea, 6);
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}else{
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for(i = 0; i < c->nmc; i++)
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if(memcmp(c->mc[i], ea, 6) == 0)
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break;
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if(i == c->nmc)
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return;
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memmove(c->mc[i], c->mc[i+1], (c->nmc - i - 1) * 6);
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}
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p = c->r[MAC_FRAME_FILTER];
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/* set promiscuous in order to not lose packets while updating */
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c->r[MAC_FRAME_FILTER] = p | 0x80000001;
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if(c->nmc <= MCSlots){
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for(i = 0; i < c->nmc; i++){
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c->r[MAC_ADDRESS + 2 * (i + 1)] = 1<<31 | c->mc[i][5] << 8 | c->mc[i][4];
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c->r[MAC_ADDRESS + 2 * (i + 1) + 1] = c->mc[i][3] << 24 | c->mc[i][2] << 16 | c->mc[i][1] << 8 | c->mc[i][0];
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}
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for(i = 2 * i; i < 2*MCSlots; i++)
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c->r[MAC_ADDRESS + 2 + i] = 0;
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c->r[MAC_FRAME_FILTER] = p & ~(1<<2);
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}else{
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memset(hash, 0, sizeof(hash));
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for(i = 0; i < c->nmc; i++)
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sethash(c->mc[i], hash);
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for(i = 0; i < 8; i++)
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c->r[HASH_TABLE + i] = hash[i];
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c->r[MAC_FRAME_FILTER] = p | 1<<2;
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}
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}
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static long
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ethifstat(Ether *edev, void *a, long n, ulong offset)
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{
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static char *names[] = {
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"txoctetcount_gb", "txframecount_gb", "txbroadcastframes_g", "txmulticastframes_g",
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"tx64octets_gb", "tx65to127octets_gb", "tx128to255octets_gb", "tx256to511octets_gb",
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"tx512to1023octets_gb", "tx1024tomaxoctets_gb", "txunicastframes_gb", "txmulticastframes_gb",
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"txbroadcastframes_gb", "txunderflowerror", "txsinglecol_g", "txmulticol_g",
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"txdeferred", "txlatecol", "txexesscol", "txcarriererr",
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"txoctetcnt", "txframecount_g", "txexcessdef", "txpauseframes",
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"txvlanframes_g", "txoversize_g", "rxframecount_gb", "rxoctetcount_gb",
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"rxoctetcount_g", "rxbroadcastframes_g", "rxmulticastframes_g", "rxcrcerror",
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"rxalignmenterror", "rxrunterror", "rxjabbererror", "rxundersize_g",
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"rxoversize_g", "rx64octets_gb", "rx65to127octets_gb", "rx128to255octets_gb",
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"rx256to511octets_gb", "rx512to1023octets_gb", "rx1024tomaxoctets_gb", "rxunicastframes_g",
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"rxlengtherror", "rxoutofrangetype", "rxpauseframes", "rxfifooverflow",
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"rxvlanframes_gb", "rxwatchdogerror", "rxrcverror", "rxctrlframes_g",
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};
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int i;
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char *buf, *p, *e;
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Ctlr *c;
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p = buf = smalloc(READSTR);
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e = p + READSTR;
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c = edev->ctlr;
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for(i = 0; i < nelem(names); i++)
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p = seprint(p, e, "%s: %lud\n", names[i], c->r[0x114/4 + i]);
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n = readstr(offset, a, n, buf);
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free(buf);
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return n;
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}
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static int
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etherpnp(Ether *edev)
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{
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static Ctlr ct;
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static uchar mac[] = {0x0e, 0xa7, 0xde, 0xad, 0xca, 0xfe};
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if(ct.r != nil)
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return -1;
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memmove(edev->ea, mac, 6);
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edev->ctlr = &ct;
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edev->port = EMAC1_BASE;
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ct.r = (ulong *) edev->port;
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edev->irq = EMAC1IRQ;
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edev->ctlr = &ct;
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edev->attach = ethattach;
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edev->transmit = ethtx;
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edev->arg = edev;
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edev->mbps = 1000;
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edev->promiscuous = ethprom;
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edev->multicast = ethmcast;
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edev->ifstat = ethifstat;
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if(ethinit(edev) < 0){
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edev->ctlr = nil;
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return -1;
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}
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intrenable(edev->irq, ethirq, edev, LEVEL, edev->name);
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return 0;
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}
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void
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ethercycvlink(void)
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{
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addethercard("eth", etherpnp);
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}
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