merge
commit
ff0dc1668f
|
@ -760,10 +760,10 @@ and
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.BR off .
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The first two specify differing levels of power saving;
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the third turns the monitor off completely.
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.SS \fL*vesashadow=\fP
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This enables the shadow framebuffer or softscreen of the VESA
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video driver. This is usefull on devices where access to
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the physical framebuffer is slow.
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.SS \fL*novesashadow=\fP
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This disables the shadow framebuffer or softscreen of the VESA
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video driver. This can improve performance on some graphics
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cards.
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.SS NVRAM
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.SS \fLnvram=\fIfile\fP
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.SS \fLnvrlen=\fIlength\fP
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@ -21,6 +21,8 @@
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#define PsrDfiq 0x00000040 /* disable FIQ interrupts */
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#define PsrDirq 0x00000080 /* disable IRQ interrupts */
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#define PsrOK 0xF80F0000 /* user processes may touch these */
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#define PsrV 0x10000000 /* overflow */
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#define PsrC 0x20000000 /* carry/borrow/extend */
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#define PsrZ 0x40000000 /* zero */
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@ -65,7 +65,7 @@ perfticks(void)
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}
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void
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clocktick(Ureg* ureg)
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clocktick(Ureg* ureg, void *)
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{
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timerintr(ureg, 0);
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}
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@ -74,7 +74,7 @@ void
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localclockinit(void)
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{
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local[2] = 0xFF06;
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intenable(29, clocktick);
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intenable(29, clocktick, nil);
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timerset(0);
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}
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@ -8,6 +8,7 @@ typedef struct PMMU PMMU;
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typedef struct Confmem Confmem;
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typedef struct Conf Conf;
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typedef struct Proc Proc;
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typedef struct ISAConf ISAConf;
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typedef uvlong Tval;
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typedef void KMap;
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#define VA(k) ((uintptr)(k))
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@ -142,3 +143,9 @@ extern uintptr kseg0;
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#define AOUT_MAGIC (E_MAGIC)
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#define NCOLOR 1
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struct ISAConf
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{
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char *type;
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ulong port, irq;
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};
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@ -33,7 +33,9 @@ void touser(Ureg*);
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void links(void);
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void globalclockinit(void);
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void localclockinit(void);
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void intenable(int, void(*)(Ureg*));
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void setled(int, int);
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void intenable(int, void(*)(Ureg*, void *), void *);
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void uartinit(void);
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void irqroute(int, void(*)(Ureg*));
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void irqroute(int, void(*)(Ureg*, void *), void *);
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void gpioinit(void);
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void setgpio(int, int);
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void gpiomode(int, int);
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@ -51,7 +51,7 @@ uartloop:
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EWAVE('n')
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MRC CpSC, 0, R1, C(CpCONTROL), C(0), CpMainctl
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ORR $(CpCmmu|CpChv|CpCsw), R1
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ORR $(CpCmmu|CpChv|CpCsw|CpCicache), R1
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MCR CpSC, 0, R1, C(CpCONTROL), C(0), CpMainctl
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EWAVE(' ')
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@ -147,12 +147,15 @@ userinit(void)
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void
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main()
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{
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extern int ehcidebug;
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wave('f');
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memset(edata, 0, end - edata);
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wave('r');
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machinit();
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wave('o');
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mmuinit();
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gpioinit();
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wave('m');
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trapinit();
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uartinit();
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@ -166,8 +169,9 @@ main()
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swapinit();
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initseg();
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quotefmtinstall();
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chandevreset();
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ehcidebug = 1;
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links();
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chandevreset();
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userinit();
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schedinit();
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}
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@ -37,6 +37,7 @@
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#define MAXSYSARG 7
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#define MAXMACH 2
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#define BI2BY 8
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#define BY2WD 4
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#define BY2V 8
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#define BY2PG 4096
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@ -19,6 +19,7 @@ PORT=\
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dev.$O\
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edf.$O\
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fault.$O\
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gpio.$O\
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mul64fract.$O\
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rebootcmd.$O\
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page.$O\
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@ -9,7 +9,6 @@
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char iopages[NIOPAGES / 8];
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Lock iopagelock;
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uchar *periph;
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ulong *ledgpio;
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static int
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isfree(int i)
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@ -95,19 +94,10 @@ vunmap(void *virt, ulong length)
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flushtlb();
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}
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void
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setled(int n, int s)
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{
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ulong *r;
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r = &ledgpio[0x190/4];
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r[s != 0] = (1 << (7 + n));
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}
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void
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markidle(int n)
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{
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setled(m->machno, !n);
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setgpio(7 + m->machno, !n);
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}
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void
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@ -126,7 +116,6 @@ mmuinit(void)
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l2 += L2SIZ;
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}
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uart = vmap((ulong) uart, BY2PG);
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ledgpio = vmap(0x4A310000, BY2PG);
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periph = vmap(0x48240000, 2 * BY2PG);
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memset(l1, 0, sizeof(ulong) * (IZERO / MiB));
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l1[4095] = PRIVL2 | Coarse;
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@ -137,9 +126,6 @@ mmuinit(void)
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pl2[241] = FIRSTMACH | L2AP(Krw) | Small | Cached | Buffered;
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flushtlb();
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m = (Mach *) MACHADDR;
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ledgpio[0x134/4] &= ~((1<<8)|(1<<7));
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setled(0, 1);
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setled(1, 1);
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}
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void
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@ -22,35 +22,34 @@ dev
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# flash
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# ether netif
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# ip arp chandial ip ipv6 ipaux iproute netlog nullmedium pktmedium ptclbsum inferno
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ip arp chandial ip ipv6 ipaux iproute netlog nullmedium pktmedium ptclbsum inferno
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# draw screen
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# dss
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# mouse
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uart
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# usb
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usb
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link
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# archoma
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# ethermedium
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ethermedium
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# flashigep
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# loopbackmedium
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# netdevmedium
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netdevmedium
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## avoid tickling errata 3.1.1.183
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## usbohci
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# usbehci usbehciomap
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# usbohci
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usbehci usbehciomap
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ip
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# tcp
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# udp
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# ipifc
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# icmp
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# icmp6
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# ipmux
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# gre
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# esp
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tcp
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udp
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ipifc
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icmp
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icmp6
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ipmux
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gre
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esp
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misc
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# rdb
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@ -12,7 +12,8 @@
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extern uchar *periph;
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ulong *intc, *intd;
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void (*irqhandler[MAXMACH][256])(Ureg*);
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void (*irqhandler[MAXMACH][256])(Ureg *, void *);
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void *irqaux[MAXMACH][256];
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static char *trapname[] = {
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"reset", /* wtf */
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@ -20,7 +21,6 @@ static char *trapname[] = {
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"supervisor call",
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"prefetch abort",
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"data abort",
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"unknown trap",
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"IRQ",
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"FIQ",
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};
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@ -52,24 +52,28 @@ trapinit(void)
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}
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void
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intenable(int i, void (*fn)(Ureg *))
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intenable(int i, void (*fn)(Ureg *, void *), void *aux)
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{
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intd[0x40 + (i / 32)] = 1 << (i % 32);
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irqhandler[m->machno][i] = fn;
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irqaux[m->machno][i] = aux;
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}
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void
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irqroute(int i, void (*fn)(Ureg *))
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irqroute(int i, void (*fn)(Ureg *, void *), void *aux)
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{
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ulong x, y, z;
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intenable(32 + i, fn);
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if(irqhandler[m->machno][i] != nil){
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print("irqroute: irq already used: i=%d pc=%#p newfn=%#p oldfn=%#p\n", i, getcallerpc(&i), fn, irqhandler[m->machno][i]);
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return;
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}
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intenable(32 + i, fn, aux);
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x = intd[0x208 + i/4];
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y = 0xFF << ((i%4) * 8);
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z = 1 << (m->machno + (i%4) * 8);
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x = (x & ~y) | z;
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intd[0x208 + i/4] = x;
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// intd[0x200/4 + (i+32)/32] = 1 << (i % 32);
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}
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void
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@ -128,6 +132,133 @@ updatetos(void)
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tos->pid = up->pid;
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}
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int
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notify(Ureg *ureg)
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{
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int l;
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ulong s, sp;
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Note *n;
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if(up->procctl)
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procctl(up);
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if(up->nnote == 0)
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return 0;
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s = spllo();
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qlock(&up->debug);
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up->notepending = 0;
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n = &up->note[0];
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if(strncmp(n->msg, "sys:", 4) == 0){
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l = strlen(n->msg);
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if(l > ERRMAX-15)
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l = ERRMAX-15;
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sprint(n->msg + l, " pc=0x%.8lux", ureg->pc);
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}
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if(n->flag != NUser && (up->notified || up->notify == 0)){
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if(n->flag == NDebug)
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pprint("suicide: %s\n", n->msg);
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qunlock(&up->debug);
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pexit(n->msg, n->flag != NDebug);
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}
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if(up->notified){
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qunlock(&up->debug);
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splhi();
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return 0;
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}
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if(!up->notify){
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qunlock(&up->debug);
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pexit(n->msg, n->flag != NDebug);
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}
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sp = ureg->sp;
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sp -= 256 + sizeof(Ureg);
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if(!okaddr((ulong)up->notify, 1, 0)
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|| !okaddr(sp - ERRMAX - 4 * BY2WD, sizeof(Ureg) + ERRMAX + 4 * BY2WD, 1)){
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qunlock(&up->debug);
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pprint("suicide: bad address in notify\n");
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pexit("Suicide", 0);
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}
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memmove((void *) sp, ureg, sizeof(Ureg));
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((void**)sp)[-1] = up->ureg;
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up->ureg = (void *) sp;
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sp -= BY2WD + ERRMAX;
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memmove((void *) sp, up->note[0].msg, ERRMAX);
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sp -= 3 * BY2WD;
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((ulong*)sp)[2] = sp + 3 * BY2WD;
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((Ureg**)sp)[1] = up->ureg;
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((ulong*)sp)[0] = 0;
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memset(ureg, 0, sizeof *ureg);
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ureg->psr = PsrMusr;
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ureg->sp = sp;
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ureg->pc = (ulong) up->notify;
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up->notified = 1;
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up->nnote--;
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memmove(&up->lastnote, &up->note[0], sizeof(Note));
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memmove(&up->note[0], &up->note[1], up->nnote * sizeof(Note));
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qunlock(&up->debug);
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splx(s);
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return 1;
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}
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void
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noted(Ureg *ureg, ulong arg0)
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{
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Ureg *nureg;
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ulong oureg, sp;
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qlock(&up->debug);
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if(arg0 != NRSTR && !up->notified){
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qunlock(&up->debug);
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pprint("call to noted() when not notified\n");
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pexit("Suicide", 0);
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}
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up->notified = 0;
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nureg = up->ureg;
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oureg = (ulong) nureg;
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if(!okaddr((ulong) oureg - BY2WD, BY2WD + sizeof(Ureg), 0)){
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qunlock(&up->debug);
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pprint("bad ureg in noted or call to noted when not notified\n");
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pexit("Suicide", 0);
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}
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nureg->psr = nureg->psr & PsrOK | ureg->psr & ~PsrOK;
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memmove(ureg, nureg, sizeof(Ureg));
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if(!okaddr(nureg->pc, 1, 0) && !okaddr(nureg->sp, BY2WD, 0)
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&& (arg0 == NCONT || arg0 == NRSTR || arg0 == NSAVE)){
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qunlock(&up->debug);
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pprint("suicide: trap in noted\n");
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pexit("Suicide", 0);
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}
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switch(arg0){
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case NCONT:
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case NRSTR:
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up->ureg = (Ureg *) (*(ulong *)(oureg - BY2WD));
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qunlock(&up->debug);
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break;
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case NSAVE:
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qunlock(&up->debug);
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sp = oureg - 4 * BY2WD - ERRMAX;
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splhi();
|
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ureg->sp = sp;
|
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((ulong *) sp)[1] = oureg;
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((ulong *) sp)[0] = 0;
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break;
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default:
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pprint("unknown noted arg 0x%lux\n", arg0);
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up->lastnote.flag = NDebug;
|
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/* fallthrough */
|
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|
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case NDFLT:
|
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qunlock(&up->debug);
|
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if(up->lastnote.flag == NDebug)
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pprint("suicide: %s\n", up->lastnote.msg);
|
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pexit(up->lastnote.msg, up->lastnote.flag != NDebug);
|
||||
}
|
||||
}
|
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|
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void
|
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trap(Ureg *ureg)
|
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{
|
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|
@ -149,10 +280,13 @@ trap(Ureg *ureg)
|
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x = intc[3];
|
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intn = x & 0x3FF;
|
||||
if(irqhandler[m->machno][intn] != nil)
|
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irqhandler[m->machno][intn](ureg);
|
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irqhandler[m->machno][intn](ureg, irqaux[m->machno][intn]);
|
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else
|
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print("unexpected interrupt %d\n", intn);
|
||||
intc[4] = x;
|
||||
if(intn != 29)
|
||||
preempted();
|
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splhi();
|
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if(up && up->delaysched && (intn == 29)){
|
||||
sched();
|
||||
splhi();
|
||||
|
@ -170,6 +304,8 @@ trap(Ureg *ureg)
|
|||
}
|
||||
}
|
||||
if(user){
|
||||
if(up->procctl || up->nnote)
|
||||
notify(ureg);
|
||||
updatetos();
|
||||
up->dbgreg = nil;
|
||||
}
|
||||
|
@ -193,7 +329,6 @@ syscall(Ureg *ureg)
|
|||
}
|
||||
scall = ureg->r0;
|
||||
up->scallnr = scall;
|
||||
// print("%s\n", sysctab[scall]);
|
||||
spllo();
|
||||
|
||||
sp = ureg->sp;
|
||||
|
@ -224,8 +359,16 @@ syscall(Ureg *ureg)
|
|||
procctl(up);
|
||||
splx(s);
|
||||
}
|
||||
|
||||
up->insyscall = 0;
|
||||
up->psstate = nil;
|
||||
|
||||
if(scall == NOTED)
|
||||
noted(ureg, *(ulong *)(sp + BY2WD));
|
||||
if(scall != RFORK && (up->procctl || up->nnote)){
|
||||
splhi();
|
||||
notify(ureg);
|
||||
}
|
||||
splhi();
|
||||
if(up->delaysched){
|
||||
sched();
|
||||
|
|
|
@ -24,20 +24,23 @@ omappnp(void)
|
|||
static void
|
||||
omapkick(Uart *u)
|
||||
{
|
||||
int x;
|
||||
|
||||
x = splhi();
|
||||
while((uart[17] & 1) == 0){
|
||||
if(u->op >= u->oe)
|
||||
if(uartstageoutput(u) == 0)
|
||||
break;
|
||||
uart[0] = *u->op++;
|
||||
}
|
||||
if(u->op < u->oe || qlen(u->oq))
|
||||
uart[1] |= (1<<1);
|
||||
else
|
||||
if(uartstageoutput(u) == 0){
|
||||
uart[1] &= ~(1<<1);
|
||||
break;
|
||||
}
|
||||
uart[0] = *u->op++;
|
||||
uart[1] |= (1<<1);
|
||||
}
|
||||
splx(x);
|
||||
}
|
||||
|
||||
void
|
||||
omapinterrupt(Ureg *)
|
||||
omapinterrupt(Ureg *, void *)
|
||||
{
|
||||
ulong st;
|
||||
|
||||
|
@ -45,6 +48,12 @@ omapinterrupt(Ureg *)
|
|||
if((st & 1) != 0)
|
||||
return;
|
||||
switch((st >> 1) & 0x1F){
|
||||
case 0:
|
||||
case 16:
|
||||
puart.cts = (uart[6] & (1<<4)) != 0;
|
||||
puart.dsr = (uart[6] & (1<<5)) != 0;
|
||||
puart.dcd = (uart[6] & (1<<7)) != 0;
|
||||
break;
|
||||
case 1:
|
||||
uartkick(&puart);
|
||||
break;
|
||||
|
@ -54,23 +63,164 @@ omapinterrupt(Ureg *)
|
|||
uartrecv(&puart, uart[0]);
|
||||
break;
|
||||
default:
|
||||
print("unknown UART interrupt %d\n", (st>>1) & 0x1F);
|
||||
print("unknown UART interrupt %uld\n", (st>>1) & 0x1F);
|
||||
uartkick(&puart);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
omapenable(Uart *, int ie)
|
||||
omapenable(Uart *u, int ie)
|
||||
{
|
||||
while(uart[5] & (1<<6))
|
||||
;
|
||||
if(ie){
|
||||
irqroute(74, omapinterrupt);
|
||||
irqroute(74, omapinterrupt, u);
|
||||
uart[1] = (1<<0);
|
||||
// uart[0x10] |= (1<<3);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
omapdisable(Uart *)
|
||||
{
|
||||
uart[1] = 0;
|
||||
}
|
||||
|
||||
static void
|
||||
omapdobreak(Uart *, int ms)
|
||||
{
|
||||
if(ms <= 0)
|
||||
ms = 200;
|
||||
|
||||
uart[3] |= (1<<6);
|
||||
tsleep(&up->sleep, return0, 0, ms);
|
||||
uart[3] &= ~(1<<6);
|
||||
}
|
||||
|
||||
static int
|
||||
omapbaud(Uart *u, int baud)
|
||||
{
|
||||
int val;
|
||||
|
||||
if(baud <= 0)
|
||||
return -1;
|
||||
|
||||
val = (48000000 / 16) / baud;
|
||||
uart[3] |= (1<<7);
|
||||
uart[0] = val & 0xFF;
|
||||
uart[1] = (val >> 8) & 0xFF;
|
||||
uart[3] &= ~(1<<7);
|
||||
u->baud = baud;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
omapbits(Uart *u, int bits)
|
||||
{
|
||||
if(bits < 5 || bits > 8)
|
||||
return -1;
|
||||
|
||||
uart[3] = (uart[3] & ~3) | (bits - 5);
|
||||
u->bits = bits;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
omapstop(Uart *u, int stop)
|
||||
{
|
||||
if(stop < 1 || stop > 2)
|
||||
return -1;
|
||||
|
||||
uart[3] &= ~4;
|
||||
if(stop == 2)
|
||||
uart[3] |= 4;
|
||||
u->stop = stop;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
omapparity(Uart *u, int parity)
|
||||
{
|
||||
uart[3] &= ~0x38;
|
||||
switch(parity){
|
||||
case 'n':
|
||||
break;
|
||||
case 'o':
|
||||
uart[3] |= (1<<3);
|
||||
case 'e':
|
||||
uart[3] |= (1<<3) | (1<<4);
|
||||
break;
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
u->parity = parity;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
omapmodemctl(Uart *u, int on)
|
||||
{
|
||||
if(on){
|
||||
u->modem = 1;
|
||||
u->cts = (uart[6] & (1<<4)) != 0;
|
||||
uart[1] |= (1<<6);
|
||||
}else{
|
||||
u->modem = 0;
|
||||
u->cts = 1;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
omaprts(Uart *, int i)
|
||||
{
|
||||
uart[4] = (uart[4] & ~2) | (i << 1);
|
||||
}
|
||||
|
||||
static void
|
||||
omapdtr(Uart *, int i)
|
||||
{
|
||||
uart[4] = (uart[4] & ~1) | i;
|
||||
}
|
||||
|
||||
static long
|
||||
omapstatus(Uart* u, void* buf, long n, long offset)
|
||||
{
|
||||
char *p;
|
||||
ulong msr;
|
||||
|
||||
msr = uart[6];
|
||||
p = malloc(READSTR);
|
||||
snprint(p, READSTR,
|
||||
"b%d c%d d%d e%d l%d m%d p%c r%d s%d\n"
|
||||
"dev(%d) type(%d) framing(%d) overruns(%d) "
|
||||
"berr(%d) serr(%d)%s%s%s%s\n",
|
||||
|
||||
u->baud,
|
||||
u->hup_dcd,
|
||||
u->dsr,
|
||||
u->hup_dsr,
|
||||
u->bits,
|
||||
u->modem,
|
||||
u->parity,
|
||||
(uart[3] & 2) != 0,
|
||||
u->stop,
|
||||
|
||||
u->dev,
|
||||
u->type,
|
||||
u->ferr,
|
||||
u->oerr,
|
||||
u->berr,
|
||||
u->serr,
|
||||
(msr & (1<<4)) ? " cts": "",
|
||||
(msr & (1<<5)) ? " dsr": "",
|
||||
(msr & (1<<7)) ? " dcd": "",
|
||||
(msr & (1<<6)) ? " ri": ""
|
||||
);
|
||||
n = readstr(offset, buf, n, p);
|
||||
free(p);
|
||||
|
||||
return n;
|
||||
}
|
||||
|
||||
static int
|
||||
omapgetc(Uart *)
|
||||
{
|
||||
|
@ -87,19 +237,22 @@ omapputc(Uart *, int c)
|
|||
uart[0] = c;
|
||||
}
|
||||
|
||||
static void
|
||||
omaprts(Uart *, int)
|
||||
{
|
||||
}
|
||||
|
||||
PhysUart omapphysuart = {
|
||||
.name = "omap4430 uart",
|
||||
.pnp = omappnp,
|
||||
.getc = omapgetc,
|
||||
.putc = omapputc,
|
||||
.enable = omapenable,
|
||||
.disable = omapdisable,
|
||||
.kick = omapkick,
|
||||
.rts = omaprts,
|
||||
.parity = omapparity,
|
||||
.baud = omapbaud,
|
||||
.bits = omapbits,
|
||||
.stop = omapstop,
|
||||
.modemctl = omapmodemctl,
|
||||
.dtr = omapdtr,
|
||||
.status = omapstatus,
|
||||
};
|
||||
|
||||
void
|
||||
|
|
|
@ -425,7 +425,7 @@ bcminterrupt(Ureg*, void *arg)
|
|||
iunlock(&ctlr->imlock);
|
||||
}
|
||||
|
||||
static void
|
||||
static int
|
||||
bcminit(Ether *edev)
|
||||
{
|
||||
ulong i, j;
|
||||
|
@ -436,7 +436,12 @@ bcminit(Ether *edev)
|
|||
/* initialization procedure according to the datasheet */
|
||||
csr32(ctlr, MiscHostCtl) |= MaskPCIInt | ClearIntA;
|
||||
csr32(ctlr, SwArbitration) |= SwArbitSet1;
|
||||
while((csr32(ctlr, SwArbitration) & SwArbitWon1) == 0);
|
||||
for(i = 0; i < 10000 && (csr32(ctlr, SwArbitration) & SwArbitWon1) == 0; i++)
|
||||
microdelay(100);
|
||||
if(i == 10000){
|
||||
iprint("bcm: arbiter failed to respond\n");
|
||||
return -1;
|
||||
}
|
||||
csr32(ctlr, MemArbiterMode) |= Enable;
|
||||
csr32(ctlr, MiscHostCtl) |= IndirectAccessEnable | EnablePCIStateRegister | EnableClockControlRegister;
|
||||
csr32(ctlr, MemoryWindow) = 0;
|
||||
|
@ -452,7 +457,12 @@ bcminit(Ether *edev)
|
|||
csr32(ctlr, ModeControl) |= ByteWordSwap;
|
||||
csr32(ctlr, MACMode) = (csr32(ctlr, MACMode) & MACPortMask) | MACPortGMII;
|
||||
microdelay(40000);
|
||||
while(mem32(ctlr, 0xB50) != 0xB49A89AB);
|
||||
for(i = 0; i < 100000 && mem32(ctlr, 0xB50) != 0xB49A89AB; i++)
|
||||
microdelay(100);
|
||||
if(i == 100000){
|
||||
iprint("bcm: chip failed to reset\n");
|
||||
return -1;
|
||||
}
|
||||
csr32(ctlr, TLPControl) |= (1<<25) | (1<<29);
|
||||
memset(ctlr->status, 0, 20);
|
||||
csr32(ctlr, DMARWControl) = (csr32(ctlr, DMARWControl) & DMAWatermarkMask) | DMAWatermarkValue;
|
||||
|
@ -462,10 +472,20 @@ bcminit(Ether *edev)
|
|||
csr32(ctlr, MBUFHighWatermark) = 0x60;
|
||||
csr32(ctlr, LowWatermarkMaximum) = (csr32(ctlr, LowWatermarkMaximum) & LowWatermarkMaxMask) | LowWatermarkMaxValue;
|
||||
csr32(ctlr, BufferManMode) |= Enable | Attn;
|
||||
while((csr32(ctlr, BufferManMode) & Enable) == 0);
|
||||
for(i = 0; i < 100 && (csr32(ctlr, BufferManMode) & Enable) == 0; i++)
|
||||
microdelay(100);
|
||||
if(i == 100){
|
||||
iprint("bcm: buffer manager failed to start\n");
|
||||
return -1;
|
||||
}
|
||||
csr32(ctlr, FTQReset) = -1;
|
||||
csr32(ctlr, FTQReset) = 0;
|
||||
while(csr32(ctlr, FTQReset));
|
||||
for(i = 0; i < 1000 && csr32(ctlr, FTQReset) != 0; i++)
|
||||
microdelay(100);
|
||||
if(i == 1000){
|
||||
iprint("bcm: ftq failed to reset\n");
|
||||
return -1;
|
||||
}
|
||||
csr32(ctlr, ReceiveBDHostAddr) = 0;
|
||||
csr32(ctlr, ReceiveBDHostAddr + 4) = PADDR(ctlr->recvprod);
|
||||
csr32(ctlr, ReceiveBDFlags) = RecvProdRingLen << 16;
|
||||
|
@ -503,7 +523,12 @@ bcminit(Ether *edev)
|
|||
csr32(ctlr, SendInitiatorMask) = 0xFFFFFF;
|
||||
csr32(ctlr, SendInitiatorConfiguration) |= SendStats;
|
||||
csr32(ctlr, HostCoalescingMode) = 0;
|
||||
while(csr32(ctlr, HostCoalescingMode) != 0);
|
||||
for(i = 0; i < 200 && csr32(ctlr, HostCoalescingMode) != 0; i++)
|
||||
microdelay(100);
|
||||
if(i == 200){
|
||||
iprint("bcm: host coalescing engine failed to stop\n");
|
||||
return -1;
|
||||
}
|
||||
csr32(ctlr, HostCoalescingRecvTicks) = 150;
|
||||
csr32(ctlr, HostCoalescingSendTicks) = 150;
|
||||
csr32(ctlr, RecvMaxCoalescedFrames) = 10;
|
||||
|
@ -539,7 +564,12 @@ bcminit(Ether *edev)
|
|||
csr32(ctlr, MIMode) = 0xC0000;
|
||||
microdelay(40);
|
||||
miiw(ctlr, PhyControl, 1<<15);
|
||||
while(miir(ctlr, PhyControl) & (1<<15));
|
||||
for(i = 0; i < 1000 && miir(ctlr, PhyControl) & (1<<15); i++)
|
||||
microdelay(100);
|
||||
if(i == 1000){
|
||||
iprint("bcm: PHY failed to reset\n");
|
||||
return -1;
|
||||
}
|
||||
miiw(ctlr, PhyAuxControl, 2);
|
||||
miir(ctlr, PhyIntStatus);
|
||||
miir(ctlr, PhyIntStatus);
|
||||
|
@ -554,6 +584,7 @@ bcminit(Ether *edev)
|
|||
csr32(ctlr, ReceiveRulesConfiguration) = 1 << 3;
|
||||
csr32(ctlr, MSIMode) |= Enable;
|
||||
csr32(ctlr, MiscHostCtl) &= ~(MaskPCIInt | ClearIntA);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
|
@ -637,6 +668,7 @@ bcmpnp(Ether* edev)
|
|||
{
|
||||
Ctlr *ctlr;
|
||||
|
||||
again:
|
||||
if(bcmhead == nil)
|
||||
bcmpci();
|
||||
|
||||
|
@ -664,7 +696,10 @@ bcmpnp(Ether* edev)
|
|||
edev->arg = edev;
|
||||
edev->mbps = 1000;
|
||||
|
||||
bcminit(edev);
|
||||
if(bcminit(edev) < 0){
|
||||
edev->ctlr = nil;
|
||||
goto again;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -162,10 +162,10 @@ vesalinear(VGAscr *scr, int, int)
|
|||
vgalinearaddr(scr, paddr, size);
|
||||
if(scr->apsize)
|
||||
addvgaseg("vesascreen", scr->paddr, scr->apsize);
|
||||
if(getconf("*vesashadow")){
|
||||
if(getconf("*novesashadow"))
|
||||
return;
|
||||
hardscreen = scr->vaddr;
|
||||
scr->paddr = scr->apsize = 0;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
|
@ -77,6 +77,11 @@ asmb(void)
|
|||
curtext = P;
|
||||
switch(HEADTYPE) {
|
||||
case 0:
|
||||
if(debug['P']){
|
||||
OFFSET = rnd(textsize, INITRND);
|
||||
seek(cout, OFFSET, 0);
|
||||
break;
|
||||
}
|
||||
case 1:
|
||||
case 2:
|
||||
case 5:
|
||||
|
|
Loading…
Reference in New Issue