ether82563: sync with erik (fixed 82579 eeprom checksum error, adds i350 support)
cinap_lenrek
parent
69470de37d
commit
cf4c3e7c5c
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@ -1,5 +1,5 @@
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/*
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* Intel 8256[367], 8257[1-9], 8258[03]
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* Intel 8256[367], 8257[1-9], 8258[03], i350
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* Gigabit Ethernet PCI-Express Controllers
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* Coraid EtherDrive® hba
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*/
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@ -34,6 +34,7 @@ enum {
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Fcah = 0x002C, /* Flow Control Address High */
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Fct = 0x0030, /* Flow Control Type */
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Kumctrlsta = 0x0034, /* Kumeran Control and Status Register */
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Connsw = 0x0034, /* copper / fiber switch control; 82575/82576 */
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Vet = 0x0038, /* VLAN EtherType */
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Fcttv = 0x0170, /* Flow Control Transmit Timer Value */
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Txcw = 0x0178, /* Transmit Configuration Word */
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@ -124,6 +125,12 @@ enum { /* Status */
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GIOme = 1<<19, /* GIO Master Enable Status */
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};
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enum { /* Eec */
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Nvpres = 1<<8,
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Autord = 1<<9,
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Sec1val = 1<<22,
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};
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enum { /* Eerd */
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EEstart = 1<<0, /* Start Read */
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EEdone = 1<<1, /* Read done */
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@ -131,8 +138,15 @@ enum { /* Eerd */
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enum { /* Ctrlext */
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Eerst = 1<<13, /* EEPROM Reset */
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Linkmode = 3<<23, /* linkmode */
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Serdes = 3<<23, /* " serdes */
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Linkmode = 3<<22, /* linkmode */
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Internalphy = 0<<22, /* " internal phy (copper) */
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Sgmii = 2<<22, /* " sgmii */
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Serdes = 3<<22, /* " serdes */
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};
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enum {
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/* Connsw */
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Enrgirq = 1<<2, /* interrupt on power detect (enrgsrc) */
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};
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enum { /* EEPROM content offsets */
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@ -226,6 +240,7 @@ enum { /* Icr, Ics, Ims, Imc */
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Mdac = 0x00000200, /* MDIO Access Completed */
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Rxcfgset = 0x00000400, /* Receiving /C/ ordered sets */
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Ack = 0x00020000, /* Receive ACK frame */
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Omed = 1<<20, /* media change; pcs interface */
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};
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enum { /* Txcw */
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@ -308,12 +323,12 @@ enum { /* Rxcsum */
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};
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typedef struct Rd { /* Receive Descriptor */
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uint addr[2];
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ushort length;
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ushort checksum;
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u32int addr[2];
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u16int length;
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u16int checksum;
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uchar status;
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uchar errors;
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ushort special;
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u16int special;
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} Rd;
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enum { /* Rd status */
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@ -337,9 +352,9 @@ enum { /* Rd errors */
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};
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typedef struct { /* Transmit Descriptor */
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uint addr[2]; /* Data */
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uint control;
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uint status;
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u32int addr[2]; /* Data */
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u32int control;
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u32int status;
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} Td;
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enum { /* Tdesc control */
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@ -369,9 +384,10 @@ enum { /* Tdesc status */
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};
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typedef struct {
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ushort *reg;
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ulong *reg32;
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int sz;
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u16int *reg;
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u32int *reg32;
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uint base;
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uint lim;
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} Flash;
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enum {
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@ -425,6 +441,7 @@ enum {
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i82579,
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i82580,
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i82583,
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i350,
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Nctlrtype,
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};
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@ -433,7 +450,8 @@ enum {
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Fert = 1<<1,
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F75 = 1<<2,
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Fpba = 1<<3,
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Fflashea = 1<<4,
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Fflashea= 1<<4,
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F79phy = 1<<5,
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};
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typedef struct Ctlrtype Ctlrtype;
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@ -459,9 +477,10 @@ static Ctlrtype cttab[Nctlrtype] = {
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i82577m, 1514, Fload|Fert, "i82577",
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i82578, 4096, Fload|Fert, "i82578",
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i82578m, 1514, Fload|Fert, "i82578",
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i82579, 9018, Fload|Fert, "i82579",
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i82580, 9728, F75, "i82580",
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i82579, 9018, Fload|Fert|F79phy, "i82579",
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i82580, 9728, F75|F79phy, "i82580",
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i82583, 1514, 0, "i82583",
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i350, 9728, F75|F79phy, "i350",
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};
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typedef void (*Freefn)(Block*);
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@ -474,7 +493,7 @@ struct Ctlr {
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int active;
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int type;
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int pool;
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ushort eeprom[0x40];
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u16int eeprom[0x40];
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QLock alock; /* attach */
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void *alloc; /* receive/transmit descriptors */
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@ -482,7 +501,7 @@ struct Ctlr {
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int ntd;
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uint rbsz;
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int *nic;
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u32int *nic;
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Lock imlock;
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int im; /* interrupt mask */
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@ -490,7 +509,7 @@ struct Ctlr {
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int lim;
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QLock slock;
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uint statistics[Nstatistics];
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u32int statistics[Nstatistics];
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uint lsleep;
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uint lintr;
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uint rsleep;
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@ -504,7 +523,7 @@ struct Ctlr {
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uint phyerrata;
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uchar ra[Eaddrlen]; /* receive address */
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ulong mta[128]; /* multicast table array */
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u32int mta[128]; /* multicast table array */
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Rendez rrendez;
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int rim;
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@ -527,7 +546,7 @@ struct Ctlr {
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int fcrtl;
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int fcrth;
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uint pba; /* packet buffer allocation */
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u32int pba; /* packet buffer allocation */
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};
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typedef struct Rbpool Rbpool;
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@ -918,8 +937,9 @@ i82563im(Ctlr *ctlr, int im)
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static void
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i82563txinit(Ctlr *ctlr)
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{
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uint i, r;
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u32int r;
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Block *b;
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int i;
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if(cttab[ctlr->type].flag & F75)
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csr32w(ctlr, Tctl, 0x0F<<CtSHIFT | Psp);
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@ -1305,20 +1325,23 @@ phyl79proc(void *v)
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for(;;){
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phy = phyread(c, phyno, Phystat);
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if(phy == ~0)
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if(phy == ~0){
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phy = 0;
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i = 3;
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goto next;
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}
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i = (phy>>8) & 3;
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a = phy & Ans;
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if(a){
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r = phyread(c, phyno, Phyctl);
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phywrite(c, phyno, Phyctl, r | Ran | Ean);
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}
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e->link = (phy & Link) != 0;
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next:
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e->link = i != 3 && (phy & Link) != 0;
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if(e->link == 0)
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i = 3;
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c->speeds[i]++;
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e->mbps = speedtab[i];
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next:
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c->lim = 0;
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i82563im(c, Lsc);
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c->lsleep++;
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@ -1340,8 +1363,11 @@ phylproc(void *v)
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phywrite(c, 1, Phyier, phy | Lscie | Ancie | Spdie | Panie);
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for(;;){
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phy = phyread(c, 1, Physsr);
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if(phy == ~0)
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if(phy == ~0){
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phy = 0;
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i = 3;
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goto next;
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}
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i = (phy>>14) & 3;
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switch(c->type){
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default:
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@ -1363,6 +1389,7 @@ phylproc(void *v)
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}
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if(a)
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phywrite(c, 1, Phyctl, phyread(c, 1, Phyctl) | Ran | Ean);
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next:
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e->link = (phy & Rtlink) != 0;
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if(e->link == 0)
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i = 3;
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@ -1370,7 +1397,6 @@ phylproc(void *v)
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e->mbps = speedtab[i];
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if(c->type == i82563)
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phyerrata(e, c);
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next:
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c->lim = 0;
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i82563im(c, Lsc);
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c->lsleep++;
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@ -1388,6 +1414,8 @@ pcslproc(void *v)
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e = v;
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c = e->ctlr;
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if(c->type == i82575 || c->type == i82576)
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csr32w(c, Connsw, Enrgirq);
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for(;;){
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phy = csr32r(c, Pcsstat);
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e->link = phy & Linkok;
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@ -1399,7 +1427,7 @@ pcslproc(void *v)
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c->speeds[i]++;
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e->mbps = speedtab[i];
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c->lim = 0;
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i82563im(c, Lsc);
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i82563im(c, Lsc | Omed);
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c->lsleep++;
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sleep(&c->lrendez, i82563lim, c);
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}
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@ -1488,11 +1516,11 @@ i82563attach(Ether *edev)
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}
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snprint(name, sizeof name, "#l%dl", edev->ctlrno);
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if((csr32r(ctlr, Ctrlext) & Linkmode) == Serdes)
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kproc(name, pcslproc, edev); /* phy based serdes */
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else if(csr32r(ctlr, Status) & Tbimode)
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if(csr32r(ctlr, Status) & Tbimode)
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kproc(name, serdeslproc, edev); /* mac based serdes */
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else if(ctlr->type == i82579 || ctlr->type == i82580)
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else if((csr32r(ctlr, Ctrlext) & Linkmode) == Serdes)
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kproc(name, pcslproc, edev); /* phy based serdes */
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else if(cttab[ctlr->type].flag & F79phy)
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kproc(name, phyl79proc, edev);
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else
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kproc(name, phylproc, edev);
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@ -1522,9 +1550,9 @@ i82563interrupt(Ureg*, void *arg)
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im = ctlr->im;
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while(icr = csr32r(ctlr, Icr) & ctlr->im){
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if(icr & Lsc){
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im &= ~Lsc;
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ctlr->lim = icr & Lsc;
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if(icr & (Lsc | Omed)){
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im &= ~(Lsc | Omed);
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ctlr->lim = icr & (Lsc | Omed);
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wakeup(&ctlr->lrendez);
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ctlr->lintr++;
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}
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@ -1619,7 +1647,7 @@ i82563shutdown(Ether *edev)
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i82563detach(edev->ctlr);
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}
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static ushort
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static int
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eeread(Ctlr *ctlr, int adr)
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{
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csr32w(ctlr, Eerd, EEstart | adr << 2);
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@ -1631,7 +1659,7 @@ eeread(Ctlr *ctlr, int adr)
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static int
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eeload(Ctlr *ctlr)
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{
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ushort sum;
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u16int sum;
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int data, adr;
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sum = 0;
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@ -1646,7 +1674,8 @@ eeload(Ctlr *ctlr)
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static int
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fcycle(Ctlr *, Flash *f)
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{
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ushort s, i;
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u16int s;
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int i;
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s = f->reg[Fsts];
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if((s&Fvalid) == 0)
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@ -1664,7 +1693,7 @@ fcycle(Ctlr *, Flash *f)
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static int
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fread(Ctlr *c, Flash *f, int ladr)
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{
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ushort s;
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u16int s;
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delay(1);
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if(fcycle(c, f) == -1)
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@ -1686,23 +1715,21 @@ fread(Ctlr *c, Flash *f, int ladr)
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static int
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fload(Ctlr *c)
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{
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ulong data, io, r, adr;
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ushort sum;
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int data, r, adr;
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u16int sum;
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void *va;
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Flash f;
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io = c->pcidev->mem[1].bar & ~0x0f;
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f.reg = vmap(io, c->pcidev->mem[1].size);
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if(f.reg == nil)
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va = vmap(c->pcidev->mem[1].bar & ~0x0f, c->pcidev->mem[1].size);
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if(va == nil)
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return -1;
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f.reg32 = (ulong*)f.reg;
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f.sz = f.reg32[Bfpr];
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if(csr32r(c, Eec) & 1<<22){
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if(c->type == i82579)
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f.sz += 16; /* sector size: 64k */
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else
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f.sz += 1; /* sector size: 4k */
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}
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r = (f.sz & 0x1fff) << 12;
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f.reg = va;
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f.reg32 = va;
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f.base = f.reg32[Bfpr] & 0x1fff;
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f.lim = f.reg32[Bfpr]>>16 & 0x1fff;
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if(csr32r(c, Eec) & Sec1val)
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f.base += f.lim+1 - f.base >> 1;
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r = f.base << 12;
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sum = 0;
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for(adr = 0; adr < 0x40; adr++) {
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data = fread(c, &f, r + adr*2);
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@ -1711,7 +1738,7 @@ fload(Ctlr *c)
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c->eeprom[adr] = data;
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sum += data;
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}
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vunmap(f.reg, c->pcidev->mem[1].size);
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vunmap(va, c->pcidev->mem[1].size);
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return sum;
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}
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@ -1830,7 +1857,7 @@ i82563ctl(Ether *edev, void *buf, long n)
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csr32w(ctlr, Radv, v);
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break;
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case CMpause:
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csr32w(ctlr, Ctrl, csr32r(ctlr, Ctrl) ^ (1<<27 | 1<<28));
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csr32w(ctlr, Ctrl, csr32r(ctlr, Ctrl) ^ (Rfce | Tfce));
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break;
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case CMan:
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csr32w(ctlr, Ctrl, csr32r(ctlr, Ctrl) | Lrst | Phyrst);
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@ -1848,8 +1875,8 @@ didtype(int d)
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switch(d){
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case 0x1096:
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case 0x10ba: /* “gilgal” */
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// case 0x1098: /* serdes; not seen */
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// case 0x10bb: /* serdes */
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case 0x1098: /* serdes; not seen */
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case 0x10bb: /* serdes */
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return i82563;
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case 0x1049: /* mm */
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case 0x104a: /* dm */
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@ -1895,6 +1922,7 @@ didtype(int d)
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case 0x10c9: /* copper */
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case 0x10e6: /* fiber */
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case 0x10e7: /* serdes; “kawela” */
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case 0x150d: /* backplane */
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return i82576;
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case 0x10ea: /* lc “calpella”; aka pch lan */
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return i82577;
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@ -1903,7 +1931,7 @@ didtype(int d)
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case 0x10ef: /* dc “piketon” */
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return i82578;
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case 0x1502: /* lm */
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case 0x1503: /* v */
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case 0x1503: /* v “lewisville” */
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return i82579;
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case 0x10f0: /* dm “king's creek” */
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return i82578m;
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@ -1915,6 +1943,12 @@ didtype(int d)
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return i82580;
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case 0x1506: /* v */
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return i82583;
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case 0x151f: /* “powerville” eeprom-less */
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case 0x1521: /* copper */
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case 0x1522: /* fiber */
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case 0x1523: /* serdes */
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case 0x1524: /* sgmii */
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return i350;
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}
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return -1;
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}
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@ -2125,6 +2159,12 @@ i82583pnp(Ether *e)
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return pnp(e, i82583);
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}
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static int
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i350pnp(Ether *e)
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{
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return pnp(e, i350);
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}
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void
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ether82563link(void)
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{
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@ -2148,5 +2188,6 @@ ether82563link(void)
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addethercard("i82579", i82579pnp);
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addethercard("i82580", i82580pnp);
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addethercard("i82583", i82583pnp);
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addethercard("i350", i350pnp);
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addethercard("igbepcie", anypnp);
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}
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Loading…
Reference in New Issue