48c7e6c48b
Previously it was a tagged union which was one of: * baseline * a specific CPU * a set of features Now, it's possible to have a CPU but also modify the CPU's feature set on top of that. This is closer to what LLVM does. This is more correct because Zig's notion of CPUs (and LLVM's) is not exact CPU models. For example "skylake" is not one very specific model; there are several different pieces of hardware that match "skylake" that have different feature sets enabled.
123 lines
3.3 KiB
Zig
123 lines
3.3 KiB
Zig
const std = @import("../std.zig");
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const Cpu = std.Target.Cpu;
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pub const Feature = enum {
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@"64bit",
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a,
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c,
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d,
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e,
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f,
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m,
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relax,
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};
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pub usingnamespace Cpu.Feature.feature_set_fns(Feature);
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pub const all_features = blk: {
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const len = @typeInfo(Feature).Enum.fields.len;
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std.debug.assert(len <= Cpu.Feature.Set.needed_bit_count);
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var result: [len]Cpu.Feature = undefined;
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result[@enumToInt(Feature.@"64bit")] = .{
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.llvm_name = "64bit",
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.description = "Implements RV64",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.a)] = .{
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.llvm_name = "a",
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.description = "'A' (Atomic Instructions)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.c)] = .{
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.llvm_name = "c",
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.description = "'C' (Compressed Instructions)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.d)] = .{
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.llvm_name = "d",
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.description = "'D' (Double-Precision Floating-Point)",
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.dependencies = featureSet(&[_]Feature{
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.f,
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}),
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};
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result[@enumToInt(Feature.e)] = .{
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.llvm_name = "e",
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.description = "Implements RV32E (provides 16 rather than 32 GPRs)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.f)] = .{
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.llvm_name = "f",
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.description = "'F' (Single-Precision Floating-Point)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.m)] = .{
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.llvm_name = "m",
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.description = "'M' (Integer Multiplication and Division)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.relax)] = .{
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.llvm_name = "relax",
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.description = "Enable Linker relaxation.",
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.dependencies = featureSet(&[_]Feature{}),
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};
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const ti = @typeInfo(Feature);
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for (result) |*elem, i| {
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elem.index = i;
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elem.name = ti.Enum.fields[i].name;
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}
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break :blk result;
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};
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pub const cpu = struct {
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pub const baseline_rv32 = Cpu{
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.name = "baseline_rv32",
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.llvm_name = "generic-rv32",
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.features = featureSet(&[_]Feature{
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.a,
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.c,
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.d,
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.f,
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.m,
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.relax,
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}),
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};
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pub const baseline_rv64 = Cpu{
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.name = "baseline_rv64",
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.llvm_name = "generic-rv64",
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.features = featureSet(&[_]Feature{
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.@"64bit",
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.a,
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.c,
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.d,
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.f,
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.m,
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.relax,
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}),
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};
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pub const generic_rv32 = Cpu{
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.name = "generic_rv32",
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.llvm_name = "generic-rv32",
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.features = featureSet(&[_]Feature{}),
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};
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pub const generic_rv64 = Cpu{
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.name = "generic_rv64",
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.llvm_name = "generic-rv64",
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.features = featureSet(&[_]Feature{
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.@"64bit",
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}),
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};
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};
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/// All riscv CPUs, sorted alphabetically by name.
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/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
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/// compiler has inefficient memory and CPU usage, affecting build times.
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pub const all_cpus = &[_]*const Cpu{
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&cpu.baseline_rv32,
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&cpu.baseline_rv64,
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&cpu.generic_rv32,
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&cpu.generic_rv64,
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};
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