552 lines
16 KiB
Zig
552 lines
16 KiB
Zig
const std = @import("../std.zig");
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const CpuFeature = std.Target.Cpu.Feature;
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const CpuModel = std.Target.Cpu.Model;
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pub const Feature = enum {
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abs2008,
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cnmips,
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cnmipsp,
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crc,
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dsp,
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dspr2,
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dspr3,
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eva,
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fp64,
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fpxx,
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ginv,
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gp64,
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long_calls,
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micromips,
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mips1,
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mips16,
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mips2,
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mips3,
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mips32,
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mips32r2,
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mips32r3,
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mips32r5,
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mips32r6,
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mips3_32,
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mips3_32r2,
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mips4,
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mips4_32,
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mips4_32r2,
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mips5,
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mips5_32r2,
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mips64,
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mips64r2,
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mips64r3,
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mips64r5,
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mips64r6,
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msa,
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mt,
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nan2008,
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noabicalls,
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nomadd4,
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nooddspreg,
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p5600,
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ptr64,
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single_float,
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soft_float,
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sym32,
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use_indirect_jump_hazard,
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use_tcc_in_div,
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vfpu,
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virt,
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xgot,
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};
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pub usingnamespace CpuFeature.feature_set_fns(Feature);
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pub const all_features = blk: {
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const len = @typeInfo(Feature).Enum.fields.len;
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std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
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var result: [len]CpuFeature = undefined;
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result[@enumToInt(Feature.abs2008)] = .{
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.llvm_name = "abs2008",
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.description = "Disable IEEE 754-2008 abs.fmt mode",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.cnmips)] = .{
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.llvm_name = "cnmips",
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.description = "Octeon cnMIPS Support",
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.dependencies = featureSet(&[_]Feature{
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.mips64r2,
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}),
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};
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result[@enumToInt(Feature.cnmipsp)] = .{
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.llvm_name = "cnmipsp",
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.description = "Octeon+ cnMIPS Support",
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.dependencies = featureSet(&[_]Feature{
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.cnmips,
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}),
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};
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result[@enumToInt(Feature.crc)] = .{
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.llvm_name = "crc",
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.description = "Mips R6 CRC ASE",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.dsp)] = .{
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.llvm_name = "dsp",
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.description = "Mips DSP ASE",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.dspr2)] = .{
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.llvm_name = "dspr2",
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.description = "Mips DSP-R2 ASE",
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.dependencies = featureSet(&[_]Feature{
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.dsp,
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}),
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};
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result[@enumToInt(Feature.dspr3)] = .{
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.llvm_name = "dspr3",
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.description = "Mips DSP-R3 ASE",
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.dependencies = featureSet(&[_]Feature{
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.dsp,
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.dspr2,
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}),
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};
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result[@enumToInt(Feature.eva)] = .{
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.llvm_name = "eva",
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.description = "Mips EVA ASE",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.fp64)] = .{
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.llvm_name = "fp64",
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.description = "Support 64-bit FP registers",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.fpxx)] = .{
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.llvm_name = "fpxx",
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.description = "Support for FPXX",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.ginv)] = .{
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.llvm_name = "ginv",
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.description = "Mips Global Invalidate ASE",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.gp64)] = .{
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.llvm_name = "gp64",
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.description = "General Purpose Registers are 64-bit wide",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.long_calls)] = .{
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.llvm_name = "long-calls",
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.description = "Disable use of the jal instruction",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.micromips)] = .{
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.llvm_name = "micromips",
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.description = "microMips mode",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.mips1)] = .{
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.llvm_name = "mips1",
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.description = "Mips I ISA Support [highly experimental]",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.mips16)] = .{
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.llvm_name = "mips16",
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.description = "Mips16 mode",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.mips2)] = .{
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.llvm_name = "mips2",
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.description = "Mips II ISA Support [highly experimental]",
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.dependencies = featureSet(&[_]Feature{
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.mips1,
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}),
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};
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result[@enumToInt(Feature.mips3)] = .{
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.llvm_name = "mips3",
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.description = "MIPS III ISA Support [highly experimental]",
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.dependencies = featureSet(&[_]Feature{
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.fp64,
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.gp64,
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.mips2,
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.mips3_32,
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.mips3_32r2,
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}),
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};
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result[@enumToInt(Feature.mips32)] = .{
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.llvm_name = "mips32",
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.description = "Mips32 ISA Support",
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.dependencies = featureSet(&[_]Feature{
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.mips2,
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.mips3_32,
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.mips4_32,
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}),
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};
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result[@enumToInt(Feature.mips32r2)] = .{
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.llvm_name = "mips32r2",
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.description = "Mips32r2 ISA Support",
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.dependencies = featureSet(&[_]Feature{
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.mips32,
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.mips3_32r2,
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.mips4_32r2,
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.mips5_32r2,
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}),
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};
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result[@enumToInt(Feature.mips32r3)] = .{
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.llvm_name = "mips32r3",
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.description = "Mips32r3 ISA Support",
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.dependencies = featureSet(&[_]Feature{
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.mips32r2,
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}),
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};
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result[@enumToInt(Feature.mips32r5)] = .{
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.llvm_name = "mips32r5",
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.description = "Mips32r5 ISA Support",
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.dependencies = featureSet(&[_]Feature{
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.mips32r3,
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}),
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};
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result[@enumToInt(Feature.mips32r6)] = .{
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.llvm_name = "mips32r6",
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.description = "Mips32r6 ISA Support [experimental]",
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.dependencies = featureSet(&[_]Feature{
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.abs2008,
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.fp64,
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.mips32r5,
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.nan2008,
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}),
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};
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result[@enumToInt(Feature.mips3_32)] = .{
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.llvm_name = "mips3_32",
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.description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.mips3_32r2)] = .{
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.llvm_name = "mips3_32r2",
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.description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.mips4)] = .{
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.llvm_name = "mips4",
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.description = "MIPS IV ISA Support",
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.dependencies = featureSet(&[_]Feature{
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.mips3,
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.mips4_32,
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.mips4_32r2,
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}),
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};
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result[@enumToInt(Feature.mips4_32)] = .{
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.llvm_name = "mips4_32",
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.description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.mips4_32r2)] = .{
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.llvm_name = "mips4_32r2",
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.description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.mips5)] = .{
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.llvm_name = "mips5",
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.description = "MIPS V ISA Support [highly experimental]",
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.dependencies = featureSet(&[_]Feature{
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.mips4,
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.mips5_32r2,
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}),
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};
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result[@enumToInt(Feature.mips5_32r2)] = .{
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.llvm_name = "mips5_32r2",
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.description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.mips64)] = .{
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.llvm_name = "mips64",
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.description = "Mips64 ISA Support",
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.dependencies = featureSet(&[_]Feature{
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.mips32,
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.mips5,
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}),
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};
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result[@enumToInt(Feature.mips64r2)] = .{
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.llvm_name = "mips64r2",
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.description = "Mips64r2 ISA Support",
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.dependencies = featureSet(&[_]Feature{
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.mips32r2,
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.mips64,
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}),
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};
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result[@enumToInt(Feature.mips64r3)] = .{
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.llvm_name = "mips64r3",
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.description = "Mips64r3 ISA Support",
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.dependencies = featureSet(&[_]Feature{
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.mips32r3,
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.mips64r2,
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}),
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};
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result[@enumToInt(Feature.mips64r5)] = .{
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.llvm_name = "mips64r5",
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.description = "Mips64r5 ISA Support",
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.dependencies = featureSet(&[_]Feature{
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.mips32r5,
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.mips64r3,
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}),
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};
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result[@enumToInt(Feature.mips64r6)] = .{
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.llvm_name = "mips64r6",
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.description = "Mips64r6 ISA Support [experimental]",
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.dependencies = featureSet(&[_]Feature{
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.abs2008,
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.mips32r6,
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.mips64r5,
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.nan2008,
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}),
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};
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result[@enumToInt(Feature.msa)] = .{
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.llvm_name = "msa",
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.description = "Mips MSA ASE",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.mt)] = .{
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.llvm_name = "mt",
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.description = "Mips MT ASE",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.nan2008)] = .{
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.llvm_name = "nan2008",
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.description = "IEEE 754-2008 NaN encoding",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.noabicalls)] = .{
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.llvm_name = "noabicalls",
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.description = "Disable SVR4-style position-independent code",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.nomadd4)] = .{
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.llvm_name = "nomadd4",
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.description = "Disable 4-operand madd.fmt and related instructions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.nooddspreg)] = .{
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.llvm_name = "nooddspreg",
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.description = "Disable odd numbered single-precision registers",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.p5600)] = .{
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.llvm_name = "p5600",
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.description = "The P5600 Processor",
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.dependencies = featureSet(&[_]Feature{
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.mips32r5,
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}),
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};
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result[@enumToInt(Feature.ptr64)] = .{
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.llvm_name = "ptr64",
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.description = "Pointers are 64-bit wide",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.single_float)] = .{
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.llvm_name = "single-float",
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.description = "Only supports single precision float",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.soft_float)] = .{
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.llvm_name = "soft-float",
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.description = "Does not support floating point instructions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.sym32)] = .{
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.llvm_name = "sym32",
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.description = "Symbols are 32 bit on Mips64",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.use_indirect_jump_hazard)] = .{
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.llvm_name = "use-indirect-jump-hazard",
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.description = "Use indirect jump guards to prevent certain speculation based attacks",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.use_tcc_in_div)] = .{
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.llvm_name = "use-tcc-in-div",
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.description = "Force the assembler to use trapping",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.vfpu)] = .{
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.llvm_name = "vfpu",
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.description = "Enable vector FPU instructions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.virt)] = .{
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.llvm_name = "virt",
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.description = "Mips Virtualization ASE",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.xgot)] = .{
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.llvm_name = "xgot",
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.description = "Assume 32-bit GOT",
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.dependencies = featureSet(&[_]Feature{}),
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};
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const ti = @typeInfo(Feature);
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for (result) |*elem, i| {
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elem.index = i;
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elem.name = ti.Enum.fields[i].name;
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}
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break :blk result;
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};
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pub const cpu = struct {
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pub const generic = CpuModel{
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.name = "generic",
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.llvm_name = "generic",
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.features = featureSet(&[_]Feature{
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.mips32,
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}),
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};
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pub const mips1 = CpuModel{
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.name = "mips1",
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.llvm_name = "mips1",
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.features = featureSet(&[_]Feature{
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.mips1,
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}),
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};
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pub const mips2 = CpuModel{
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.name = "mips2",
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.llvm_name = "mips2",
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.features = featureSet(&[_]Feature{
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.mips2,
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}),
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};
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pub const mips3 = CpuModel{
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.name = "mips3",
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.llvm_name = "mips3",
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.features = featureSet(&[_]Feature{
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.mips3,
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}),
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};
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pub const mips32 = CpuModel{
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.name = "mips32",
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.llvm_name = "mips32",
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.features = featureSet(&[_]Feature{
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.mips32,
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}),
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};
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pub const mips32r2 = CpuModel{
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.name = "mips32r2",
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.llvm_name = "mips32r2",
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.features = featureSet(&[_]Feature{
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.mips32r2,
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}),
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};
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pub const mips32r3 = CpuModel{
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.name = "mips32r3",
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.llvm_name = "mips32r3",
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.features = featureSet(&[_]Feature{
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.mips32r3,
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}),
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};
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pub const mips32r5 = CpuModel{
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.name = "mips32r5",
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.llvm_name = "mips32r5",
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.features = featureSet(&[_]Feature{
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.mips32r5,
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}),
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};
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pub const mips32r6 = CpuModel{
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.name = "mips32r6",
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.llvm_name = "mips32r6",
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.features = featureSet(&[_]Feature{
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.mips32r6,
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}),
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};
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pub const mips4 = CpuModel{
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.name = "mips4",
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.llvm_name = "mips4",
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.features = featureSet(&[_]Feature{
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.mips4,
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}),
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};
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pub const mips5 = CpuModel{
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.name = "mips5",
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.llvm_name = "mips5",
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.features = featureSet(&[_]Feature{
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.mips5,
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}),
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};
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pub const mips64 = CpuModel{
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.name = "mips64",
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.llvm_name = "mips64",
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.features = featureSet(&[_]Feature{
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.mips64,
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}),
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};
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pub const mips64r2 = CpuModel{
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.name = "mips64r2",
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.llvm_name = "mips64r2",
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.features = featureSet(&[_]Feature{
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.mips64r2,
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}),
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};
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pub const mips64r3 = CpuModel{
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.name = "mips64r3",
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.llvm_name = "mips64r3",
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.features = featureSet(&[_]Feature{
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.mips64r3,
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}),
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};
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pub const mips64r5 = CpuModel{
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.name = "mips64r5",
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.llvm_name = "mips64r5",
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.features = featureSet(&[_]Feature{
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.mips64r5,
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}),
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};
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pub const mips64r6 = CpuModel{
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.name = "mips64r6",
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.llvm_name = "mips64r6",
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.features = featureSet(&[_]Feature{
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.mips64r6,
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}),
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};
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pub const octeon = CpuModel{
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.name = "octeon",
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.llvm_name = "octeon",
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.features = featureSet(&[_]Feature{
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.cnmips,
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.mips64r2,
|
|
}),
|
|
};
|
|
pub const @"octeon+" = CpuModel{
|
|
.name = "octeon+",
|
|
.llvm_name = "octeon+",
|
|
.features = featureSet(&[_]Feature{
|
|
.cnmips,
|
|
.cnmipsp,
|
|
.mips64r2,
|
|
}),
|
|
};
|
|
pub const p5600 = CpuModel{
|
|
.name = "p5600",
|
|
.llvm_name = "p5600",
|
|
.features = featureSet(&[_]Feature{
|
|
.p5600,
|
|
}),
|
|
};
|
|
};
|
|
|
|
/// All mips CPUs, sorted alphabetically by name.
|
|
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
|
|
/// compiler has inefficient memory and CPU usage, affecting build times.
|
|
pub const all_cpus = &[_]*const CpuModel{
|
|
&cpu.generic,
|
|
&cpu.mips1,
|
|
&cpu.mips2,
|
|
&cpu.mips3,
|
|
&cpu.mips32,
|
|
&cpu.mips32r2,
|
|
&cpu.mips32r3,
|
|
&cpu.mips32r5,
|
|
&cpu.mips32r6,
|
|
&cpu.mips4,
|
|
&cpu.mips5,
|
|
&cpu.mips64,
|
|
&cpu.mips64r2,
|
|
&cpu.mips64r3,
|
|
&cpu.mips64r5,
|
|
&cpu.mips64r6,
|
|
&cpu.octeon,
|
|
&cpu.@"octeon+",
|
|
&cpu.p5600,
|
|
};
|