2324 lines
64 KiB
Zig
2324 lines
64 KiB
Zig
// SPDX-License-Identifier: MIT
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// Copyright (c) 2015-2020 Zig Contributors
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// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
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// The MIT license requires this copyright notice to be included in all copies
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// and substantial portions of the software.
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const std = @import("../std.zig");
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const CpuFeature = std.Target.Cpu.Feature;
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const CpuModel = std.Target.Cpu.Model;
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pub const Feature = enum {
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@"32bit",
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@"8msecext",
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a76,
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aclass,
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acquire_release,
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aes,
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avoid_movs_shop,
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avoid_partial_cpsr,
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bf16,
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cde,
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cdecp0,
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cdecp1,
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cdecp2,
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cdecp3,
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cdecp4,
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cdecp5,
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cdecp6,
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cdecp7,
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cheap_predicable_cpsr,
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crc,
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crypto,
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d32,
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db,
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dfb,
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disable_postra_scheduler,
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dont_widen_vmovs,
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dotprod,
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dsp,
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execute_only,
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expand_fp_mlx,
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exynos,
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fp16,
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fp16fml,
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fp64,
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fp_armv8,
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fp_armv8d16,
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fp_armv8d16sp,
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fp_armv8sp,
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fpao,
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fpregs,
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fpregs16,
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fpregs64,
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fullfp16,
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fuse_aes,
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fuse_literals,
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has_v4t,
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has_v5t,
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has_v5te,
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has_v6,
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has_v6k,
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has_v6m,
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has_v6t2,
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has_v7,
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has_v7clrex,
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has_v8_1a,
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has_v8_1m_main,
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has_v8_2a,
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has_v8_3a,
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has_v8_4a,
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has_v8_5a,
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has_v8_6a,
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has_v8,
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has_v8m,
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has_v8m_main,
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hwdiv,
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hwdiv_arm,
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i8mm,
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iwmmxt,
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iwmmxt2,
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lob,
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long_calls,
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loop_align,
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m3,
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mclass,
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mp,
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muxed_units,
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mve,
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mve_fp,
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mve1beat,
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mve2beat,
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mve4beat,
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nacl_trap,
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neon,
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neon_fpmovs,
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neonfp,
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no_branch_predictor,
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no_movt,
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no_neg_immediates,
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noarm,
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nonpipelined_vfp,
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perfmon,
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prefer_ishst,
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prefer_vmovsr,
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prof_unpr,
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r4,
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ras,
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rclass,
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read_tp_hard,
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reserve_r9,
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ret_addr_stack,
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sb,
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sha2,
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slow_fp_brcc,
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slow_load_D_subreg,
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slow_odd_reg,
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slow_vdup32,
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slow_vgetlni32,
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slowfpvfmx,
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slowfpvmlx,
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soft_float,
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splat_vfp_neon,
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strict_align,
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swift,
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thumb2,
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thumb_mode,
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trustzone,
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use_misched,
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v2,
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v2a,
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v3,
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v3m,
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v4,
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v4t,
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v5t,
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v5te,
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v5tej,
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v6,
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v6j,
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v6k,
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v6kz,
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v6m,
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v6sm,
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v6t2,
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v7a,
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v7em,
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v7k,
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v7m,
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v7r,
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v7s,
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v7ve,
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v8a,
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v8m,
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v8m_main,
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v8r,
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v8_1a,
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v8_1m_main,
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v8_2a,
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v8_3a,
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v8_4a,
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v8_5a,
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v8_6a,
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vfp2,
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vfp2sp,
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vfp3,
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vfp3d16,
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vfp3d16sp,
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vfp3sp,
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vfp4,
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vfp4d16,
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vfp4d16sp,
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vfp4sp,
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virtualization,
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vldn_align,
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vmlx_forwarding,
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vmlx_hazards,
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wide_stride_vfp,
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xscale,
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zcz,
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};
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pub usingnamespace CpuFeature.feature_set_fns(Feature);
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pub const all_features = blk: {
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@setEvalBranchQuota(10000);
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const len = @typeInfo(Feature).Enum.fields.len;
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std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
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var result: [len]CpuFeature = undefined;
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result[@enumToInt(Feature.@"32bit")] = .{
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.llvm_name = "32bit",
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.description = "Prefer 32-bit Thumb instrs",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.@"8msecext")] = .{
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.llvm_name = "8msecext",
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.description = "Enable support for ARMv8-M Security Extensions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.a76)] = .{
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.llvm_name = "a76",
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.description = "Cortex-A76 ARM processors",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.aclass)] = .{
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.llvm_name = "aclass",
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.description = "Is application profile ('A' series)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.acquire_release)] = .{
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.llvm_name = "acquire-release",
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.description = "Has v8 acquire/release (lda/ldaex etc) instructions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.aes)] = .{
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.llvm_name = "aes",
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.description = "Enable AES support",
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.dependencies = featureSet(&[_]Feature{
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.neon,
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}),
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};
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result[@enumToInt(Feature.avoid_movs_shop)] = .{
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.llvm_name = "avoid-movs-shop",
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.description = "Avoid movs instructions with shifter operand",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.avoid_partial_cpsr)] = .{
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.llvm_name = "avoid-partial-cpsr",
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.description = "Avoid CPSR partial update for OOO execution",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.bf16)] = .{
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.llvm_name = "bf16",
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.description = "Enable support for BFloat16 instructions",
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.dependencies = featureSet(&[_]Feature{
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.neon,
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}),
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};
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result[@enumToInt(Feature.cde)] = .{
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.llvm_name = "cde",
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.description = "Support CDE instructions",
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.dependencies = featureSet(&[_]Feature{
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.v8m_main,
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}),
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};
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result[@enumToInt(Feature.cdecp0)] = .{
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.llvm_name = "cdecp0",
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.description = "Coprocessor 0 ISA is CDEv1",
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.dependencies = featureSet(&[_]Feature{
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.cde,
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}),
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};
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result[@enumToInt(Feature.cdecp1)] = .{
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.llvm_name = "cdecp1",
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.description = "Coprocessor 1 ISA is CDEv1",
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.dependencies = featureSet(&[_]Feature{
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.cde,
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}),
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};
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result[@enumToInt(Feature.cdecp2)] = .{
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.llvm_name = "cdecp2",
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.description = "Coprocessor 2 ISA is CDEv1",
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.dependencies = featureSet(&[_]Feature{
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.cde,
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}),
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};
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result[@enumToInt(Feature.cdecp3)] = .{
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.llvm_name = "cdecp3",
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.description = "Coprocessor 3 ISA is CDEv1",
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.dependencies = featureSet(&[_]Feature{
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.cde,
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}),
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};
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result[@enumToInt(Feature.cdecp4)] = .{
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.llvm_name = "cdecp4",
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.description = "Coprocessor 4 ISA is CDEv1",
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.dependencies = featureSet(&[_]Feature{
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.cde,
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}),
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};
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result[@enumToInt(Feature.cdecp5)] = .{
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.llvm_name = "cdecp5",
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.description = "Coprocessor 5 ISA is CDEv1",
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.dependencies = featureSet(&[_]Feature{
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.cde,
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}),
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};
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result[@enumToInt(Feature.cdecp6)] = .{
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.llvm_name = "cdecp6",
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.description = "Coprocessor 6 ISA is CDEv1",
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.dependencies = featureSet(&[_]Feature{
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.cde,
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}),
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};
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result[@enumToInt(Feature.cdecp7)] = .{
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.llvm_name = "cdecp7",
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.description = "Coprocessor 7 ISA is CDEv1",
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.dependencies = featureSet(&[_]Feature{
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.cde,
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}),
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};
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result[@enumToInt(Feature.cheap_predicable_cpsr)] = .{
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.llvm_name = "cheap-predicable-cpsr",
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.description = "Disable +1 predication cost for instructions updating CPSR",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.crc)] = .{
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.llvm_name = "crc",
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.description = "Enable support for CRC instructions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.crypto)] = .{
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.llvm_name = "crypto",
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.description = "Enable support for Cryptography extensions",
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.dependencies = featureSet(&[_]Feature{
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.aes,
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.neon,
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.sha2,
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}),
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};
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result[@enumToInt(Feature.d32)] = .{
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.llvm_name = "d32",
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.description = "Extend FP to 32 double registers",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.db)] = .{
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.llvm_name = "db",
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.description = "Has data barrier (dmb/dsb) instructions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.dfb)] = .{
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.llvm_name = "dfb",
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.description = "Has full data barrier (dfb) instruction",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.disable_postra_scheduler)] = .{
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.llvm_name = "disable-postra-scheduler",
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.description = "Don't schedule again after register allocation",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.dont_widen_vmovs)] = .{
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.llvm_name = "dont-widen-vmovs",
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.description = "Don't widen VMOVS to VMOVD",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.dotprod)] = .{
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.llvm_name = "dotprod",
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.description = "Enable support for dot product instructions",
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.dependencies = featureSet(&[_]Feature{
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.neon,
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}),
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};
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result[@enumToInt(Feature.dsp)] = .{
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.llvm_name = "dsp",
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.description = "Supports DSP instructions in ARM and/or Thumb2",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.execute_only)] = .{
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.llvm_name = "execute-only",
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.description = "Enable the generation of execute only code.",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.expand_fp_mlx)] = .{
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.llvm_name = "expand-fp-mlx",
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.description = "Expand VFP/NEON MLA/MLS instructions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.exynos)] = .{
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.llvm_name = "exynos",
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.description = "Samsung Exynos processors",
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.dependencies = featureSet(&[_]Feature{
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.crc,
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.crypto,
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.expand_fp_mlx,
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.fuse_aes,
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.fuse_literals,
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.hwdiv,
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.hwdiv_arm,
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.prof_unpr,
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.ret_addr_stack,
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.slow_fp_brcc,
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.slow_vdup32,
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.slow_vgetlni32,
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.slowfpvfmx,
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.slowfpvmlx,
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.splat_vfp_neon,
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.wide_stride_vfp,
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.zcz,
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}),
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};
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result[@enumToInt(Feature.fp16)] = .{
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.llvm_name = "fp16",
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.description = "Enable half-precision floating point",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.fp16fml)] = .{
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.llvm_name = "fp16fml",
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.description = "Enable full half-precision floating point fml instructions",
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.dependencies = featureSet(&[_]Feature{
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.fullfp16,
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}),
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};
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result[@enumToInt(Feature.fp64)] = .{
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.llvm_name = "fp64",
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.description = "Floating point unit supports double precision",
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.dependencies = featureSet(&[_]Feature{
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.fpregs64,
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}),
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};
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result[@enumToInt(Feature.fp_armv8)] = .{
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.llvm_name = "fp-armv8",
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.description = "Enable ARMv8 FP",
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.dependencies = featureSet(&[_]Feature{
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.fp_armv8d16,
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.fp_armv8sp,
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.vfp4,
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}),
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};
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result[@enumToInt(Feature.fp_armv8d16)] = .{
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.llvm_name = "fp-armv8d16",
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.description = "Enable ARMv8 FP with only 16 d-registers",
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.dependencies = featureSet(&[_]Feature{
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.fp_armv8d16sp,
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.fp64,
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.vfp4d16,
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}),
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};
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result[@enumToInt(Feature.fp_armv8d16sp)] = .{
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.llvm_name = "fp-armv8d16sp",
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.description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
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.dependencies = featureSet(&[_]Feature{
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.vfp4d16sp,
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}),
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};
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result[@enumToInt(Feature.fp_armv8sp)] = .{
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.llvm_name = "fp-armv8sp",
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.description = "Enable ARMv8 FP with no double precision",
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.dependencies = featureSet(&[_]Feature{
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.d32,
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.fp_armv8d16sp,
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.vfp4sp,
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}),
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};
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result[@enumToInt(Feature.fpao)] = .{
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.llvm_name = "fpao",
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.description = "Enable fast computation of positive address offsets",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.fpregs)] = .{
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.llvm_name = "fpregs",
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.description = "Enable FP registers",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.fpregs16)] = .{
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.llvm_name = "fpregs16",
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.description = "Enable 16-bit FP registers",
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.dependencies = featureSet(&[_]Feature{
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.fpregs,
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}),
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};
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result[@enumToInt(Feature.fpregs64)] = .{
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.llvm_name = "fpregs64",
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.description = "Enable 64-bit FP registers",
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.dependencies = featureSet(&[_]Feature{
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.fpregs,
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}),
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};
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result[@enumToInt(Feature.fullfp16)] = .{
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.llvm_name = "fullfp16",
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.description = "Enable full half-precision floating point",
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.dependencies = featureSet(&[_]Feature{
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.fp_armv8d16sp,
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.fpregs16,
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}),
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};
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result[@enumToInt(Feature.fuse_aes)] = .{
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.llvm_name = "fuse-aes",
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.description = "CPU fuses AES crypto operations",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.fuse_literals)] = .{
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.llvm_name = "fuse-literals",
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.description = "CPU fuses literal generation operations",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.has_v4t)] = .{
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.llvm_name = "v4t",
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.description = "Support ARM v4T instructions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@enumToInt(Feature.has_v5t)] = .{
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.llvm_name = "v5t",
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.description = "Support ARM v5T instructions",
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.dependencies = featureSet(&[_]Feature{
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.has_v4t,
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}),
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};
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result[@enumToInt(Feature.has_v5te)] = .{
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.llvm_name = "v5te",
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.description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
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.dependencies = featureSet(&[_]Feature{
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.has_v5t,
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}),
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};
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result[@enumToInt(Feature.has_v6)] = .{
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.llvm_name = "v6",
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.description = "Support ARM v6 instructions",
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.dependencies = featureSet(&[_]Feature{
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.has_v5te,
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}),
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};
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result[@enumToInt(Feature.has_v6k)] = .{
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.llvm_name = "v6k",
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.description = "Support ARM v6k instructions",
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.dependencies = featureSet(&[_]Feature{
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.has_v6,
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}),
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};
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result[@enumToInt(Feature.has_v6m)] = .{
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.llvm_name = "v6m",
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.description = "Support ARM v6M instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.has_v6,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.has_v6t2)] = .{
|
|
.llvm_name = "v6t2",
|
|
.description = "Support ARM v6t2 instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.thumb2,
|
|
.has_v6k,
|
|
.has_v8m,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.has_v7)] = .{
|
|
.llvm_name = "v7",
|
|
.description = "Support ARM v7 instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.perfmon,
|
|
.has_v6t2,
|
|
.has_v7clrex,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.has_v7clrex)] = .{
|
|
.llvm_name = "v7clrex",
|
|
.description = "Has v7 clrex instruction",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.has_v8)] = .{
|
|
.llvm_name = "v8",
|
|
.description = "Support ARM v8 instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.acquire_release,
|
|
.has_v7,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.has_v8_1a)] = .{
|
|
.llvm_name = "v8.1a",
|
|
.description = "Support ARM v8.1a instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.has_v8,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.has_v8_1m_main)] = .{
|
|
.llvm_name = "v8.1m.main",
|
|
.description = "Support ARM v8-1M Mainline instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.has_v8m_main,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.has_v8_2a)] = .{
|
|
.llvm_name = "v8.2a",
|
|
.description = "Support ARM v8.2a instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.has_v8_1a,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.has_v8_3a)] = .{
|
|
.llvm_name = "v8.3a",
|
|
.description = "Support ARM v8.3a instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.has_v8_2a,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.has_v8_4a)] = .{
|
|
.llvm_name = "v8.4a",
|
|
.description = "Support ARM v8.4a instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.dotprod,
|
|
.has_v8_3a,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.has_v8_5a)] = .{
|
|
.llvm_name = "v8.5a",
|
|
.description = "Support ARM v8.5a instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.sb,
|
|
.has_v8_4a,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.has_v8_6a)] = .{
|
|
.llvm_name = "v8.6a",
|
|
.description = "Support ARM v8.6a instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.bf16,
|
|
.i8mm,
|
|
.has_v8_5a,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.has_v8m)] = .{
|
|
.llvm_name = "v8m",
|
|
.description = "Support ARM v8M Baseline instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.has_v6m,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.has_v8m_main)] = .{
|
|
.llvm_name = "v8m.main",
|
|
.description = "Support ARM v8M Mainline instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.has_v7,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.hwdiv)] = .{
|
|
.llvm_name = "hwdiv",
|
|
.description = "Enable divide instructions in Thumb",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.hwdiv_arm)] = .{
|
|
.llvm_name = "hwdiv-arm",
|
|
.description = "Enable divide instructions in ARM mode",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.i8mm)] = .{
|
|
.llvm_name = "i8mm",
|
|
.description = "Enable Matrix Multiply Int8 Extension",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.neon,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.iwmmxt)] = .{
|
|
.llvm_name = "iwmmxt",
|
|
.description = "ARMv5te architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.has_v5te,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.iwmmxt2)] = .{
|
|
.llvm_name = "iwmmxt2",
|
|
.description = "ARMv5te architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.has_v5te,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.lob)] = .{
|
|
.llvm_name = "lob",
|
|
.description = "Enable Low Overhead Branch extensions",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.long_calls)] = .{
|
|
.llvm_name = "long-calls",
|
|
.description = "Generate calls via indirect call instructions",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.loop_align)] = .{
|
|
.llvm_name = "loop-align",
|
|
.description = "Prefer 32-bit alignment for loops",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.m3)] = .{
|
|
.llvm_name = "m3",
|
|
.description = "Cortex-M3 ARM processors",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.mclass)] = .{
|
|
.llvm_name = "mclass",
|
|
.description = "Is microcontroller profile ('M' series)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.mp)] = .{
|
|
.llvm_name = "mp",
|
|
.description = "Supports Multiprocessing extension",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.muxed_units)] = .{
|
|
.llvm_name = "muxed-units",
|
|
.description = "Has muxed AGU and NEON/FPU",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.mve)] = .{
|
|
.llvm_name = "mve",
|
|
.description = "Support M-Class Vector Extension with integer ops",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.dsp,
|
|
.fpregs16,
|
|
.fpregs64,
|
|
.has_v8_1m_main,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.mve_fp)] = .{
|
|
.llvm_name = "mve.fp",
|
|
.description = "Support M-Class Vector Extension with integer and floating ops",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.fp_armv8d16sp,
|
|
.fullfp16,
|
|
.mve,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.mve1beat)] = .{
|
|
.llvm_name = "mve1beat",
|
|
.description = "Model MVE instructions as a 1 beat per tick architecture",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.mve2beat)] = .{
|
|
.llvm_name = "mve2beat",
|
|
.description = "Model MVE instructions as a 2 beats per tick architecture",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.mve4beat)] = .{
|
|
.llvm_name = "mve4beat",
|
|
.description = "Model MVE instructions as a 4 beats per tick architecture",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.nacl_trap)] = .{
|
|
.llvm_name = "nacl-trap",
|
|
.description = "NaCl trap",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.neon)] = .{
|
|
.llvm_name = "neon",
|
|
.description = "Enable NEON instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.vfp3,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.neon_fpmovs)] = .{
|
|
.llvm_name = "neon-fpmovs",
|
|
.description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.neonfp)] = .{
|
|
.llvm_name = "neonfp",
|
|
.description = "Use NEON for single precision FP",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.no_branch_predictor)] = .{
|
|
.llvm_name = "no-branch-predictor",
|
|
.description = "Has no branch predictor",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.no_movt)] = .{
|
|
.llvm_name = "no-movt",
|
|
.description = "Don't use movt/movw pairs for 32-bit imms",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.no_neg_immediates)] = .{
|
|
.llvm_name = "no-neg-immediates",
|
|
.description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.noarm)] = .{
|
|
.llvm_name = "noarm",
|
|
.description = "Does not support ARM mode execution",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.nonpipelined_vfp)] = .{
|
|
.llvm_name = "nonpipelined-vfp",
|
|
.description = "VFP instructions are not pipelined",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.perfmon)] = .{
|
|
.llvm_name = "perfmon",
|
|
.description = "Enable support for Performance Monitor extensions",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.prefer_ishst)] = .{
|
|
.llvm_name = "prefer-ishst",
|
|
.description = "Prefer ISHST barriers",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.prefer_vmovsr)] = .{
|
|
.llvm_name = "prefer-vmovsr",
|
|
.description = "Prefer VMOVSR",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.prof_unpr)] = .{
|
|
.llvm_name = "prof-unpr",
|
|
.description = "Is profitable to unpredicate",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.r4)] = .{
|
|
.llvm_name = "r4",
|
|
.description = "Cortex-R4 ARM processors",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.ras)] = .{
|
|
.llvm_name = "ras",
|
|
.description = "Enable Reliability, Availability and Serviceability extensions",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.rclass)] = .{
|
|
.llvm_name = "rclass",
|
|
.description = "Is realtime profile ('R' series)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.read_tp_hard)] = .{
|
|
.llvm_name = "read-tp-hard",
|
|
.description = "Reading thread pointer from register",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.reserve_r9)] = .{
|
|
.llvm_name = "reserve-r9",
|
|
.description = "Reserve R9, making it unavailable as GPR",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.ret_addr_stack)] = .{
|
|
.llvm_name = "ret-addr-stack",
|
|
.description = "Has return address stack",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.sb)] = .{
|
|
.llvm_name = "sb",
|
|
.description = "Enable v8.5a Speculation Barrier",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.sha2)] = .{
|
|
.llvm_name = "sha2",
|
|
.description = "Enable SHA1 and SHA256 support",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.neon,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.slow_fp_brcc)] = .{
|
|
.llvm_name = "slow-fp-brcc",
|
|
.description = "FP compare + branch is slow",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.slow_load_D_subreg)] = .{
|
|
.llvm_name = "slow-load-D-subreg",
|
|
.description = "Loading into D subregs is slow",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.slow_odd_reg)] = .{
|
|
.llvm_name = "slow-odd-reg",
|
|
.description = "VLDM/VSTM starting with an odd register is slow",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.slow_vdup32)] = .{
|
|
.llvm_name = "slow-vdup32",
|
|
.description = "Has slow VDUP32 - prefer VMOV",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.slow_vgetlni32)] = .{
|
|
.llvm_name = "slow-vgetlni32",
|
|
.description = "Has slow VGETLNi32 - prefer VMOV",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.slowfpvfmx)] = .{
|
|
.llvm_name = "slowfpvfmx",
|
|
.description = "Disable VFP / NEON FMA instructions",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.slowfpvmlx)] = .{
|
|
.llvm_name = "slowfpvmlx",
|
|
.description = "Disable VFP / NEON MAC instructions",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.soft_float)] = .{
|
|
.llvm_name = "soft-float",
|
|
.description = "Use software floating point features.",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.splat_vfp_neon)] = .{
|
|
.llvm_name = "splat-vfp-neon",
|
|
.description = "Splat register from VFP to NEON",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.dont_widen_vmovs,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.strict_align)] = .{
|
|
.llvm_name = "strict-align",
|
|
.description = "Disallow all unaligned memory access",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.swift)] = .{
|
|
.llvm_name = "swift",
|
|
.description = "Swift ARM processors",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.thumb2)] = .{
|
|
.llvm_name = "thumb2",
|
|
.description = "Enable Thumb2 instructions",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.thumb_mode)] = .{
|
|
.llvm_name = "thumb-mode",
|
|
.description = "Thumb mode",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.trustzone)] = .{
|
|
.llvm_name = "trustzone",
|
|
.description = "Enable support for TrustZone security extensions",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.use_misched)] = .{
|
|
.llvm_name = "use-misched",
|
|
.description = "Use the MachineScheduler",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.v2)] = .{
|
|
.llvm_name = "armv2",
|
|
.description = "ARMv2 architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.strict_align,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v2a)] = .{
|
|
.llvm_name = "armv2a",
|
|
.description = "ARMv2a architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.strict_align,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v3)] = .{
|
|
.llvm_name = "armv3",
|
|
.description = "ARMv3 architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.strict_align,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v3m)] = .{
|
|
.llvm_name = "armv3m",
|
|
.description = "ARMv3m architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.strict_align,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v4)] = .{
|
|
.llvm_name = "armv4",
|
|
.description = "ARMv4 architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.strict_align,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v4t)] = .{
|
|
.llvm_name = "armv4t",
|
|
.description = "ARMv4t architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.strict_align,
|
|
.has_v4t,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v5t)] = .{
|
|
.llvm_name = "armv5t",
|
|
.description = "ARMv5t architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.strict_align,
|
|
.has_v5t,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v5te)] = .{
|
|
.llvm_name = "armv5te",
|
|
.description = "ARMv5te architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.strict_align,
|
|
.has_v5te,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v5tej)] = .{
|
|
.llvm_name = "armv5tej",
|
|
.description = "ARMv5tej architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.strict_align,
|
|
.has_v5te,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v6)] = .{
|
|
.llvm_name = "armv6",
|
|
.description = "ARMv6 architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.dsp,
|
|
.has_v6,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v6m)] = .{
|
|
.llvm_name = "armv6-m",
|
|
.description = "ARMv6m architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.db,
|
|
.mclass,
|
|
.noarm,
|
|
.strict_align,
|
|
.thumb_mode,
|
|
.has_v6m,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v6j)] = .{
|
|
.llvm_name = "armv6j",
|
|
.description = "ARMv7a architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.v6,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v6k)] = .{
|
|
.llvm_name = "armv6k",
|
|
.description = "ARMv6k architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.has_v6k,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v6kz)] = .{
|
|
.llvm_name = "armv6kz",
|
|
.description = "ARMv6kz architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.trustzone,
|
|
.has_v6k,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v6sm)] = .{
|
|
.llvm_name = "armv6s-m",
|
|
.description = "ARMv6sm architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.db,
|
|
.mclass,
|
|
.noarm,
|
|
.strict_align,
|
|
.thumb_mode,
|
|
.has_v6m,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v6t2)] = .{
|
|
.llvm_name = "armv6t2",
|
|
.description = "ARMv6t2 architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.dsp,
|
|
.has_v6t2,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v7a)] = .{
|
|
.llvm_name = "armv7-a",
|
|
.description = "ARMv7a architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.aclass,
|
|
.db,
|
|
.dsp,
|
|
.neon,
|
|
.has_v7,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v7m)] = .{
|
|
.llvm_name = "armv7-m",
|
|
.description = "ARMv7m architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.db,
|
|
.hwdiv,
|
|
.mclass,
|
|
.noarm,
|
|
.thumb_mode,
|
|
.thumb2,
|
|
.has_v7,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v7r)] = .{
|
|
.llvm_name = "armv7-r",
|
|
.description = "ARMv7r architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.db,
|
|
.dsp,
|
|
.hwdiv,
|
|
.rclass,
|
|
.has_v7,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v7em)] = .{
|
|
.llvm_name = "armv7e-m",
|
|
.description = "ARMv7em architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.db,
|
|
.dsp,
|
|
.hwdiv,
|
|
.mclass,
|
|
.noarm,
|
|
.thumb_mode,
|
|
.thumb2,
|
|
.has_v7,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v7k)] = .{
|
|
.llvm_name = "armv7k",
|
|
.description = "ARMv7a architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.v7a,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v7s)] = .{
|
|
.llvm_name = "armv7s",
|
|
.description = "ARMv7a architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.v7a,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v7ve)] = .{
|
|
.llvm_name = "armv7ve",
|
|
.description = "ARMv7ve architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.aclass,
|
|
.db,
|
|
.dsp,
|
|
.mp,
|
|
.neon,
|
|
.trustzone,
|
|
.has_v7,
|
|
.virtualization,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v8a)] = .{
|
|
.llvm_name = "armv8-a",
|
|
.description = "ARMv8a architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.aclass,
|
|
.crc,
|
|
.crypto,
|
|
.db,
|
|
.dsp,
|
|
.fp_armv8,
|
|
.mp,
|
|
.neon,
|
|
.trustzone,
|
|
.has_v8,
|
|
.virtualization,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v8m)] = .{
|
|
.llvm_name = "armv8-m.base",
|
|
.description = "ARMv8mBaseline architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.@"8msecext",
|
|
.acquire_release,
|
|
.db,
|
|
.hwdiv,
|
|
.mclass,
|
|
.noarm,
|
|
.strict_align,
|
|
.thumb_mode,
|
|
.has_v7clrex,
|
|
.has_v8m,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v8m_main)] = .{
|
|
.llvm_name = "armv8-m.main",
|
|
.description = "ARMv8mMainline architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.@"8msecext",
|
|
.acquire_release,
|
|
.db,
|
|
.hwdiv,
|
|
.mclass,
|
|
.noarm,
|
|
.thumb_mode,
|
|
.has_v8m_main,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v8r)] = .{
|
|
.llvm_name = "armv8-r",
|
|
.description = "ARMv8r architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.crc,
|
|
.db,
|
|
.dfb,
|
|
.dsp,
|
|
.fp_armv8,
|
|
.mp,
|
|
.neon,
|
|
.rclass,
|
|
.has_v8,
|
|
.virtualization,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v8_1a)] = .{
|
|
.llvm_name = "armv8.1-a",
|
|
.description = "ARMv81a architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.aclass,
|
|
.crc,
|
|
.crypto,
|
|
.db,
|
|
.dsp,
|
|
.fp_armv8,
|
|
.mp,
|
|
.neon,
|
|
.trustzone,
|
|
.has_v8_1a,
|
|
.virtualization,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v8_1m_main)] = .{
|
|
.llvm_name = "armv8.1-m.main",
|
|
.description = "ARMv81mMainline architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.@"8msecext",
|
|
.acquire_release,
|
|
.db,
|
|
.hwdiv,
|
|
.lob,
|
|
.mclass,
|
|
.noarm,
|
|
.ras,
|
|
.thumb_mode,
|
|
.has_v8_1m_main,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v8_2a)] = .{
|
|
.llvm_name = "armv8.2-a",
|
|
.description = "ARMv82a architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.aclass,
|
|
.crc,
|
|
.crypto,
|
|
.db,
|
|
.dsp,
|
|
.fp_armv8,
|
|
.mp,
|
|
.neon,
|
|
.ras,
|
|
.trustzone,
|
|
.has_v8_2a,
|
|
.virtualization,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v8_3a)] = .{
|
|
.llvm_name = "armv8.3-a",
|
|
.description = "ARMv83a architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.aclass,
|
|
.crc,
|
|
.crypto,
|
|
.db,
|
|
.dsp,
|
|
.fp_armv8,
|
|
.mp,
|
|
.neon,
|
|
.ras,
|
|
.trustzone,
|
|
.has_v8_3a,
|
|
.virtualization,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v8_4a)] = .{
|
|
.llvm_name = "armv8.4-a",
|
|
.description = "ARMv84a architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.aclass,
|
|
.crc,
|
|
.crypto,
|
|
.db,
|
|
.dotprod,
|
|
.dsp,
|
|
.fp_armv8,
|
|
.mp,
|
|
.neon,
|
|
.ras,
|
|
.trustzone,
|
|
.has_v8_4a,
|
|
.virtualization,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v8_5a)] = .{
|
|
.llvm_name = "armv8.5-a",
|
|
.description = "ARMv85a architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.aclass,
|
|
.crc,
|
|
.crypto,
|
|
.db,
|
|
.dotprod,
|
|
.dsp,
|
|
.fp_armv8,
|
|
.mp,
|
|
.neon,
|
|
.ras,
|
|
.trustzone,
|
|
.has_v8_5a,
|
|
.virtualization,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.v8_6a)] = .{
|
|
.llvm_name = "armv8.6-a",
|
|
.description = "ARMv86a architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.aclass,
|
|
.crc,
|
|
.crypto,
|
|
.db,
|
|
.dotprod,
|
|
.dsp,
|
|
.fp_armv8,
|
|
.mp,
|
|
.neon,
|
|
.ras,
|
|
.trustzone,
|
|
.has_v8_6a,
|
|
.virtualization,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.vfp2)] = .{
|
|
.llvm_name = "vfp2",
|
|
.description = "Enable VFP2 instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.fp64,
|
|
.vfp2sp,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.vfp2sp)] = .{
|
|
.llvm_name = "vfp2sp",
|
|
.description = "Enable VFP2 instructions with no double precision",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.fpregs,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.vfp3)] = .{
|
|
.llvm_name = "vfp3",
|
|
.description = "Enable VFP3 instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.vfp3d16,
|
|
.vfp3sp,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.vfp3d16)] = .{
|
|
.llvm_name = "vfp3d16",
|
|
.description = "Enable VFP3 instructions with only 16 d-registers",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.fp64,
|
|
.vfp2,
|
|
.vfp3d16sp,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.vfp3d16sp)] = .{
|
|
.llvm_name = "vfp3d16sp",
|
|
.description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.vfp2sp,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.vfp3sp)] = .{
|
|
.llvm_name = "vfp3sp",
|
|
.description = "Enable VFP3 instructions with no double precision",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.d32,
|
|
.vfp3d16sp,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.vfp4)] = .{
|
|
.llvm_name = "vfp4",
|
|
.description = "Enable VFP4 instructions",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.fp16,
|
|
.vfp3,
|
|
.vfp4d16,
|
|
.vfp4sp,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.vfp4d16)] = .{
|
|
.llvm_name = "vfp4d16",
|
|
.description = "Enable VFP4 instructions with only 16 d-registers",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.fp16,
|
|
.fp64,
|
|
.vfp3d16,
|
|
.vfp4d16sp,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.vfp4d16sp)] = .{
|
|
.llvm_name = "vfp4d16sp",
|
|
.description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.fp16,
|
|
.vfp3d16sp,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.vfp4sp)] = .{
|
|
.llvm_name = "vfp4sp",
|
|
.description = "Enable VFP4 instructions with no double precision",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.d32,
|
|
.fp16,
|
|
.vfp3sp,
|
|
.vfp4d16sp,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.virtualization)] = .{
|
|
.llvm_name = "virtualization",
|
|
.description = "Supports Virtualization extension",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.vldn_align)] = .{
|
|
.llvm_name = "vldn-align",
|
|
.description = "Check for VLDn unaligned access",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.vmlx_forwarding)] = .{
|
|
.llvm_name = "vmlx-forwarding",
|
|
.description = "Has multiplier accumulator forwarding",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.vmlx_hazards)] = .{
|
|
.llvm_name = "vmlx-hazards",
|
|
.description = "Has VMLx hazards",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.wide_stride_vfp)] = .{
|
|
.llvm_name = "wide-stride-vfp",
|
|
.description = "Use a wide stride when allocating VFP registers",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@enumToInt(Feature.xscale)] = .{
|
|
.llvm_name = "xscale",
|
|
.description = "ARMv5te architecture",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.has_v5te,
|
|
}),
|
|
};
|
|
result[@enumToInt(Feature.zcz)] = .{
|
|
.llvm_name = "zcz",
|
|
.description = "Has zero-cycle zeroing instructions",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
const ti = @typeInfo(Feature);
|
|
for (result) |*elem, i| {
|
|
elem.index = i;
|
|
elem.name = ti.Enum.fields[i].name;
|
|
}
|
|
break :blk result;
|
|
};
|
|
|
|
pub const cpu = struct {
|
|
pub const arm1020e = CpuModel{
|
|
.name = "arm1020e",
|
|
.llvm_name = "arm1020e",
|
|
.features = featureSet(&[_]Feature{
|
|
.v5te,
|
|
}),
|
|
};
|
|
pub const arm1020t = CpuModel{
|
|
.name = "arm1020t",
|
|
.llvm_name = "arm1020t",
|
|
.features = featureSet(&[_]Feature{
|
|
.v5t,
|
|
}),
|
|
};
|
|
pub const arm1022e = CpuModel{
|
|
.name = "arm1022e",
|
|
.llvm_name = "arm1022e",
|
|
.features = featureSet(&[_]Feature{
|
|
.v5te,
|
|
}),
|
|
};
|
|
pub const arm10e = CpuModel{
|
|
.name = "arm10e",
|
|
.llvm_name = "arm10e",
|
|
.features = featureSet(&[_]Feature{
|
|
.v5te,
|
|
}),
|
|
};
|
|
pub const arm10tdmi = CpuModel{
|
|
.name = "arm10tdmi",
|
|
.llvm_name = "arm10tdmi",
|
|
.features = featureSet(&[_]Feature{
|
|
.v5t,
|
|
}),
|
|
};
|
|
pub const arm1136j_s = CpuModel{
|
|
.name = "arm1136j_s",
|
|
.llvm_name = "arm1136j-s",
|
|
.features = featureSet(&[_]Feature{
|
|
.v6,
|
|
}),
|
|
};
|
|
pub const arm1136jf_s = CpuModel{
|
|
.name = "arm1136jf_s",
|
|
.llvm_name = "arm1136jf-s",
|
|
.features = featureSet(&[_]Feature{
|
|
.v6,
|
|
.slowfpvmlx,
|
|
.vfp2,
|
|
}),
|
|
};
|
|
pub const arm1156t2_s = CpuModel{
|
|
.name = "arm1156t2_s",
|
|
.llvm_name = "arm1156t2-s",
|
|
.features = featureSet(&[_]Feature{
|
|
.v6t2,
|
|
}),
|
|
};
|
|
pub const arm1156t2f_s = CpuModel{
|
|
.name = "arm1156t2f_s",
|
|
.llvm_name = "arm1156t2f-s",
|
|
.features = featureSet(&[_]Feature{
|
|
.v6t2,
|
|
.slowfpvmlx,
|
|
.vfp2,
|
|
}),
|
|
};
|
|
pub const arm1176j_s = CpuModel{
|
|
.name = "arm1176j_s",
|
|
.llvm_name = "arm1176j-s",
|
|
.features = featureSet(&[_]Feature{
|
|
.v6kz,
|
|
}),
|
|
};
|
|
pub const arm1176jz_s = CpuModel{
|
|
.name = "arm1176jz_s",
|
|
.llvm_name = "arm1176jz-s",
|
|
.features = featureSet(&[_]Feature{
|
|
.v6kz,
|
|
}),
|
|
};
|
|
pub const arm1176jzf_s = CpuModel{
|
|
.name = "arm1176jzf_s",
|
|
.llvm_name = "arm1176jzf-s",
|
|
.features = featureSet(&[_]Feature{
|
|
.v6kz,
|
|
.slowfpvmlx,
|
|
.vfp2,
|
|
}),
|
|
};
|
|
pub const arm710t = CpuModel{
|
|
.name = "arm710t",
|
|
.llvm_name = "arm710t",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4t,
|
|
}),
|
|
};
|
|
pub const arm720t = CpuModel{
|
|
.name = "arm720t",
|
|
.llvm_name = "arm720t",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4t,
|
|
}),
|
|
};
|
|
pub const arm7tdmi = CpuModel{
|
|
.name = "arm7tdmi",
|
|
.llvm_name = "arm7tdmi",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4t,
|
|
}),
|
|
};
|
|
pub const arm7tdmi_s = CpuModel{
|
|
.name = "arm7tdmi_s",
|
|
.llvm_name = "arm7tdmi-s",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4t,
|
|
}),
|
|
};
|
|
pub const arm8 = CpuModel{
|
|
.name = "arm8",
|
|
.llvm_name = "arm8",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4,
|
|
}),
|
|
};
|
|
pub const arm810 = CpuModel{
|
|
.name = "arm810",
|
|
.llvm_name = "arm810",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4,
|
|
}),
|
|
};
|
|
pub const arm9 = CpuModel{
|
|
.name = "arm9",
|
|
.llvm_name = "arm9",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4t,
|
|
}),
|
|
};
|
|
pub const arm920 = CpuModel{
|
|
.name = "arm920",
|
|
.llvm_name = "arm920",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4t,
|
|
}),
|
|
};
|
|
pub const arm920t = CpuModel{
|
|
.name = "arm920t",
|
|
.llvm_name = "arm920t",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4t,
|
|
}),
|
|
};
|
|
pub const arm922t = CpuModel{
|
|
.name = "arm922t",
|
|
.llvm_name = "arm922t",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4t,
|
|
}),
|
|
};
|
|
pub const arm926ej_s = CpuModel{
|
|
.name = "arm926ej_s",
|
|
.llvm_name = "arm926ej-s",
|
|
.features = featureSet(&[_]Feature{
|
|
.v5te,
|
|
}),
|
|
};
|
|
pub const arm940t = CpuModel{
|
|
.name = "arm940t",
|
|
.llvm_name = "arm940t",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4t,
|
|
}),
|
|
};
|
|
pub const arm946e_s = CpuModel{
|
|
.name = "arm946e_s",
|
|
.llvm_name = "arm946e-s",
|
|
.features = featureSet(&[_]Feature{
|
|
.v5te,
|
|
}),
|
|
};
|
|
pub const arm966e_s = CpuModel{
|
|
.name = "arm966e_s",
|
|
.llvm_name = "arm966e-s",
|
|
.features = featureSet(&[_]Feature{
|
|
.v5te,
|
|
}),
|
|
};
|
|
pub const arm968e_s = CpuModel{
|
|
.name = "arm968e_s",
|
|
.llvm_name = "arm968e-s",
|
|
.features = featureSet(&[_]Feature{
|
|
.v5te,
|
|
}),
|
|
};
|
|
pub const arm9e = CpuModel{
|
|
.name = "arm9e",
|
|
.llvm_name = "arm9e",
|
|
.features = featureSet(&[_]Feature{
|
|
.v5te,
|
|
}),
|
|
};
|
|
pub const arm9tdmi = CpuModel{
|
|
.name = "arm9tdmi",
|
|
.llvm_name = "arm9tdmi",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4t,
|
|
}),
|
|
};
|
|
pub const baseline = CpuModel{
|
|
.name = "baseline",
|
|
.llvm_name = "generic",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7a,
|
|
}),
|
|
};
|
|
pub const cortex_a12 = CpuModel{
|
|
.name = "cortex_a12",
|
|
.llvm_name = "cortex-a12",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7a,
|
|
.avoid_partial_cpsr,
|
|
.mp,
|
|
.ret_addr_stack,
|
|
.trustzone,
|
|
.vfp4,
|
|
.virtualization,
|
|
.vmlx_forwarding,
|
|
}),
|
|
};
|
|
pub const cortex_a15 = CpuModel{
|
|
.name = "cortex_a15",
|
|
.llvm_name = "cortex-a15",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7a,
|
|
.avoid_partial_cpsr,
|
|
.dont_widen_vmovs,
|
|
.mp,
|
|
.muxed_units,
|
|
.ret_addr_stack,
|
|
.splat_vfp_neon,
|
|
.trustzone,
|
|
.vfp4,
|
|
.virtualization,
|
|
.vldn_align,
|
|
}),
|
|
};
|
|
pub const cortex_a17 = CpuModel{
|
|
.name = "cortex_a17",
|
|
.llvm_name = "cortex-a17",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7a,
|
|
.avoid_partial_cpsr,
|
|
.mp,
|
|
.ret_addr_stack,
|
|
.trustzone,
|
|
.vfp4,
|
|
.virtualization,
|
|
.vmlx_forwarding,
|
|
}),
|
|
};
|
|
pub const cortex_a32 = CpuModel{
|
|
.name = "cortex_a32",
|
|
.llvm_name = "cortex-a32",
|
|
.features = featureSet(&[_]Feature{
|
|
.crc,
|
|
.crypto,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
.v8a,
|
|
}),
|
|
};
|
|
pub const cortex_a35 = CpuModel{
|
|
.name = "cortex_a35",
|
|
.llvm_name = "cortex-a35",
|
|
.features = featureSet(&[_]Feature{
|
|
.crc,
|
|
.crypto,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
.v8a,
|
|
}),
|
|
};
|
|
pub const cortex_a5 = CpuModel{
|
|
.name = "cortex_a5",
|
|
.llvm_name = "cortex-a5",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7a,
|
|
.mp,
|
|
.ret_addr_stack,
|
|
.slow_fp_brcc,
|
|
.slowfpvfmx,
|
|
.slowfpvmlx,
|
|
.trustzone,
|
|
.vfp4,
|
|
.vmlx_forwarding,
|
|
}),
|
|
};
|
|
pub const cortex_a53 = CpuModel{
|
|
.name = "cortex_a53",
|
|
.llvm_name = "cortex-a53",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8a,
|
|
.crc,
|
|
.crypto,
|
|
.fpao,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
}),
|
|
};
|
|
pub const cortex_a55 = CpuModel{
|
|
.name = "cortex_a55",
|
|
.llvm_name = "cortex-a55",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8_2a,
|
|
.dotprod,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
}),
|
|
};
|
|
pub const cortex_a57 = CpuModel{
|
|
.name = "cortex_a57",
|
|
.llvm_name = "cortex-a57",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8a,
|
|
.avoid_partial_cpsr,
|
|
.cheap_predicable_cpsr,
|
|
.crc,
|
|
.crypto,
|
|
.fpao,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
}),
|
|
};
|
|
pub const cortex_a7 = CpuModel{
|
|
.name = "cortex_a7",
|
|
.llvm_name = "cortex-a7",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7a,
|
|
.mp,
|
|
.ret_addr_stack,
|
|
.slow_fp_brcc,
|
|
.slowfpvfmx,
|
|
.slowfpvmlx,
|
|
.trustzone,
|
|
.vfp4,
|
|
.virtualization,
|
|
.vmlx_forwarding,
|
|
.vmlx_hazards,
|
|
}),
|
|
};
|
|
pub const cortex_a72 = CpuModel{
|
|
.name = "cortex_a72",
|
|
.llvm_name = "cortex-a72",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8a,
|
|
.crc,
|
|
.crypto,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
}),
|
|
};
|
|
pub const cortex_a73 = CpuModel{
|
|
.name = "cortex_a73",
|
|
.llvm_name = "cortex-a73",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8a,
|
|
.crc,
|
|
.crypto,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
}),
|
|
};
|
|
pub const cortex_a75 = CpuModel{
|
|
.name = "cortex_a75",
|
|
.llvm_name = "cortex-a75",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8_2a,
|
|
.dotprod,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
}),
|
|
};
|
|
pub const cortex_a76 = CpuModel{
|
|
.name = "cortex_a76",
|
|
.llvm_name = "cortex-a76",
|
|
.features = featureSet(&[_]Feature{
|
|
.a76,
|
|
.v8_2a,
|
|
.crc,
|
|
.crypto,
|
|
.dotprod,
|
|
.fullfp16,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
}),
|
|
};
|
|
pub const cortex_a76ae = CpuModel{
|
|
.name = "cortex_a76ae",
|
|
.llvm_name = "cortex-a76ae",
|
|
.features = featureSet(&[_]Feature{
|
|
.a76,
|
|
.v8_2a,
|
|
.crc,
|
|
.crypto,
|
|
.dotprod,
|
|
.fullfp16,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
}),
|
|
};
|
|
pub const cortex_a77 = CpuModel{
|
|
.name = "cortex_a77",
|
|
.llvm_name = "cortex-a77",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8_2a,
|
|
.crc,
|
|
.crypto,
|
|
.dotprod,
|
|
.fullfp16,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
}),
|
|
};
|
|
pub const cortex_a78 = CpuModel{
|
|
.name = "cortex_a78",
|
|
.llvm_name = "cortex-a78",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8_2a,
|
|
.crc,
|
|
.crypto,
|
|
.dotprod,
|
|
.fullfp16,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
}),
|
|
};
|
|
pub const cortex_a8 = CpuModel{
|
|
.name = "cortex_a8",
|
|
.llvm_name = "cortex-a8",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7a,
|
|
.nonpipelined_vfp,
|
|
.ret_addr_stack,
|
|
.slow_fp_brcc,
|
|
.slowfpvfmx,
|
|
.slowfpvmlx,
|
|
.trustzone,
|
|
.vmlx_forwarding,
|
|
.vmlx_hazards,
|
|
}),
|
|
};
|
|
pub const cortex_a9 = CpuModel{
|
|
.name = "cortex_a9",
|
|
.llvm_name = "cortex-a9",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7a,
|
|
.avoid_partial_cpsr,
|
|
.expand_fp_mlx,
|
|
.fp16,
|
|
.mp,
|
|
.muxed_units,
|
|
.neon_fpmovs,
|
|
.prefer_vmovsr,
|
|
.ret_addr_stack,
|
|
.trustzone,
|
|
.vldn_align,
|
|
.vmlx_forwarding,
|
|
.vmlx_hazards,
|
|
}),
|
|
};
|
|
pub const cortex_m0 = CpuModel{
|
|
.name = "cortex_m0",
|
|
.llvm_name = "cortex-m0",
|
|
.features = featureSet(&[_]Feature{
|
|
.v6m,
|
|
}),
|
|
};
|
|
pub const cortex_m0plus = CpuModel{
|
|
.name = "cortex_m0plus",
|
|
.llvm_name = "cortex-m0plus",
|
|
.features = featureSet(&[_]Feature{
|
|
.v6m,
|
|
}),
|
|
};
|
|
pub const cortex_m1 = CpuModel{
|
|
.name = "cortex_m1",
|
|
.llvm_name = "cortex-m1",
|
|
.features = featureSet(&[_]Feature{
|
|
.v6m,
|
|
}),
|
|
};
|
|
pub const cortex_m23 = CpuModel{
|
|
.name = "cortex_m23",
|
|
.llvm_name = "cortex-m23",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8m,
|
|
.no_movt,
|
|
}),
|
|
};
|
|
pub const cortex_m3 = CpuModel{
|
|
.name = "cortex_m3",
|
|
.llvm_name = "cortex-m3",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7m,
|
|
.loop_align,
|
|
.m3,
|
|
.no_branch_predictor,
|
|
.use_misched,
|
|
}),
|
|
};
|
|
pub const cortex_m33 = CpuModel{
|
|
.name = "cortex_m33",
|
|
.llvm_name = "cortex-m33",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8m_main,
|
|
.dsp,
|
|
.fp_armv8d16sp,
|
|
.loop_align,
|
|
.no_branch_predictor,
|
|
.slowfpvfmx,
|
|
.slowfpvmlx,
|
|
.use_misched,
|
|
}),
|
|
};
|
|
pub const cortex_m35p = CpuModel{
|
|
.name = "cortex_m35p",
|
|
.llvm_name = "cortex-m35p",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8m_main,
|
|
.dsp,
|
|
.fp_armv8d16sp,
|
|
.loop_align,
|
|
.no_branch_predictor,
|
|
.slowfpvfmx,
|
|
.slowfpvmlx,
|
|
.use_misched,
|
|
}),
|
|
};
|
|
pub const cortex_m4 = CpuModel{
|
|
.name = "cortex_m4",
|
|
.llvm_name = "cortex-m4",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7em,
|
|
.loop_align,
|
|
.no_branch_predictor,
|
|
.slowfpvfmx,
|
|
.slowfpvmlx,
|
|
.use_misched,
|
|
.vfp4d16sp,
|
|
}),
|
|
};
|
|
pub const cortex_m55 = CpuModel{
|
|
.name = "cortex_m55",
|
|
.llvm_name = "cortex-m55",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8_1m_main,
|
|
.dsp,
|
|
.fp_armv8d16,
|
|
.loop_align,
|
|
.mve_fp,
|
|
.no_branch_predictor,
|
|
.slowfpvmlx,
|
|
.use_misched,
|
|
}),
|
|
};
|
|
pub const cortex_m7 = CpuModel{
|
|
.name = "cortex_m7",
|
|
.llvm_name = "cortex-m7",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7em,
|
|
.fp_armv8d16,
|
|
}),
|
|
};
|
|
pub const cortex_r4 = CpuModel{
|
|
.name = "cortex_r4",
|
|
.llvm_name = "cortex-r4",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7r,
|
|
.avoid_partial_cpsr,
|
|
.r4,
|
|
.ret_addr_stack,
|
|
}),
|
|
};
|
|
pub const cortex_r4f = CpuModel{
|
|
.name = "cortex_r4f",
|
|
.llvm_name = "cortex-r4f",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7r,
|
|
.avoid_partial_cpsr,
|
|
.r4,
|
|
.ret_addr_stack,
|
|
.slow_fp_brcc,
|
|
.slowfpvfmx,
|
|
.slowfpvmlx,
|
|
.vfp3d16,
|
|
}),
|
|
};
|
|
pub const cortex_r5 = CpuModel{
|
|
.name = "cortex_r5",
|
|
.llvm_name = "cortex-r5",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7r,
|
|
.avoid_partial_cpsr,
|
|
.hwdiv_arm,
|
|
.ret_addr_stack,
|
|
.slow_fp_brcc,
|
|
.slowfpvfmx,
|
|
.slowfpvmlx,
|
|
.vfp3d16,
|
|
}),
|
|
};
|
|
pub const cortex_r52 = CpuModel{
|
|
.name = "cortex_r52",
|
|
.llvm_name = "cortex-r52",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8r,
|
|
.fpao,
|
|
.use_misched,
|
|
}),
|
|
};
|
|
pub const cortex_r7 = CpuModel{
|
|
.name = "cortex_r7",
|
|
.llvm_name = "cortex-r7",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7r,
|
|
.avoid_partial_cpsr,
|
|
.fp16,
|
|
.hwdiv_arm,
|
|
.mp,
|
|
.ret_addr_stack,
|
|
.slow_fp_brcc,
|
|
.slowfpvfmx,
|
|
.slowfpvmlx,
|
|
.vfp3d16,
|
|
}),
|
|
};
|
|
pub const cortex_r8 = CpuModel{
|
|
.name = "cortex_r8",
|
|
.llvm_name = "cortex-r8",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7r,
|
|
.avoid_partial_cpsr,
|
|
.fp16,
|
|
.hwdiv_arm,
|
|
.mp,
|
|
.ret_addr_stack,
|
|
.slow_fp_brcc,
|
|
.slowfpvfmx,
|
|
.slowfpvmlx,
|
|
.vfp3d16,
|
|
}),
|
|
};
|
|
pub const cortex_x1 = CpuModel{
|
|
.name = "cortex_x1",
|
|
.llvm_name = "cortex-x1",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8_2a,
|
|
.crc,
|
|
.crypto,
|
|
.dotprod,
|
|
.fullfp16,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
}),
|
|
};
|
|
pub const cyclone = CpuModel{
|
|
.name = "cyclone",
|
|
.llvm_name = "cyclone",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8a,
|
|
.avoid_movs_shop,
|
|
.avoid_partial_cpsr,
|
|
.crypto,
|
|
.disable_postra_scheduler,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
.mp,
|
|
.neonfp,
|
|
.ret_addr_stack,
|
|
.slowfpvfmx,
|
|
.slowfpvmlx,
|
|
.swift,
|
|
.use_misched,
|
|
.vfp4,
|
|
.zcz,
|
|
}),
|
|
};
|
|
pub const ep9312 = CpuModel{
|
|
.name = "ep9312",
|
|
.llvm_name = "ep9312",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4t,
|
|
}),
|
|
};
|
|
pub const exynos_m1 = CpuModel{
|
|
.name = "exynos_m1",
|
|
.llvm_name = null,
|
|
.features = featureSet(&[_]Feature{
|
|
.v8a,
|
|
.exynos,
|
|
}),
|
|
};
|
|
pub const exynos_m2 = CpuModel{
|
|
.name = "exynos_m2",
|
|
.llvm_name = null,
|
|
.features = featureSet(&[_]Feature{
|
|
.v8a,
|
|
.exynos,
|
|
}),
|
|
};
|
|
pub const exynos_m3 = CpuModel{
|
|
.name = "exynos_m3",
|
|
.llvm_name = "exynos-m3",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8_2a,
|
|
.exynos,
|
|
}),
|
|
};
|
|
pub const exynos_m4 = CpuModel{
|
|
.name = "exynos_m4",
|
|
.llvm_name = "exynos-m4",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8_2a,
|
|
.dotprod,
|
|
.exynos,
|
|
.fullfp16,
|
|
}),
|
|
};
|
|
pub const exynos_m5 = CpuModel{
|
|
.name = "exynos_m5",
|
|
.llvm_name = "exynos-m5",
|
|
.features = featureSet(&[_]Feature{
|
|
.dotprod,
|
|
.exynos,
|
|
.fullfp16,
|
|
.v8_2a,
|
|
}),
|
|
};
|
|
pub const generic = CpuModel{
|
|
.name = "generic",
|
|
.llvm_name = "generic",
|
|
.features = featureSet(&[_]Feature{}),
|
|
};
|
|
pub const iwmmxt = CpuModel{
|
|
.name = "iwmmxt",
|
|
.llvm_name = "iwmmxt",
|
|
.features = featureSet(&[_]Feature{
|
|
.v5te,
|
|
}),
|
|
};
|
|
pub const krait = CpuModel{
|
|
.name = "krait",
|
|
.llvm_name = "krait",
|
|
.features = featureSet(&[_]Feature{
|
|
.avoid_partial_cpsr,
|
|
.fp16,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
.muxed_units,
|
|
.ret_addr_stack,
|
|
.v7a,
|
|
.vfp4,
|
|
.vldn_align,
|
|
.vmlx_forwarding,
|
|
}),
|
|
};
|
|
pub const kryo = CpuModel{
|
|
.name = "kryo",
|
|
.llvm_name = "kryo",
|
|
.features = featureSet(&[_]Feature{
|
|
.crc,
|
|
.crypto,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
.v8a,
|
|
}),
|
|
};
|
|
pub const mpcore = CpuModel{
|
|
.name = "mpcore",
|
|
.llvm_name = "mpcore",
|
|
.features = featureSet(&[_]Feature{
|
|
.v6k,
|
|
.slowfpvmlx,
|
|
.vfp2,
|
|
}),
|
|
};
|
|
pub const mpcorenovfp = CpuModel{
|
|
.name = "mpcorenovfp",
|
|
.llvm_name = "mpcorenovfp",
|
|
.features = featureSet(&[_]Feature{
|
|
.v6k,
|
|
}),
|
|
};
|
|
pub const neoverse_n1 = CpuModel{
|
|
.name = "neoverse_n1",
|
|
.llvm_name = "neoverse-n1",
|
|
.features = featureSet(&[_]Feature{
|
|
.v8_2a,
|
|
.crc,
|
|
.crypto,
|
|
.dotprod,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
}),
|
|
};
|
|
pub const sc000 = CpuModel{
|
|
.name = "sc000",
|
|
.llvm_name = "sc000",
|
|
.features = featureSet(&[_]Feature{
|
|
.v6m,
|
|
}),
|
|
};
|
|
pub const sc300 = CpuModel{
|
|
.name = "sc300",
|
|
.llvm_name = "sc300",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7m,
|
|
.m3,
|
|
.no_branch_predictor,
|
|
.use_misched,
|
|
}),
|
|
};
|
|
pub const strongarm = CpuModel{
|
|
.name = "strongarm",
|
|
.llvm_name = "strongarm",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4,
|
|
}),
|
|
};
|
|
pub const strongarm110 = CpuModel{
|
|
.name = "strongarm110",
|
|
.llvm_name = "strongarm110",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4,
|
|
}),
|
|
};
|
|
pub const strongarm1100 = CpuModel{
|
|
.name = "strongarm1100",
|
|
.llvm_name = "strongarm1100",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4,
|
|
}),
|
|
};
|
|
pub const strongarm1110 = CpuModel{
|
|
.name = "strongarm1110",
|
|
.llvm_name = "strongarm1110",
|
|
.features = featureSet(&[_]Feature{
|
|
.v4,
|
|
}),
|
|
};
|
|
pub const swift = CpuModel{
|
|
.name = "swift",
|
|
.llvm_name = "swift",
|
|
.features = featureSet(&[_]Feature{
|
|
.v7a,
|
|
.avoid_movs_shop,
|
|
.avoid_partial_cpsr,
|
|
.disable_postra_scheduler,
|
|
.hwdiv,
|
|
.hwdiv_arm,
|
|
.mp,
|
|
.neonfp,
|
|
.prefer_ishst,
|
|
.prof_unpr,
|
|
.ret_addr_stack,
|
|
.slow_load_D_subreg,
|
|
.slow_odd_reg,
|
|
.slow_vdup32,
|
|
.slow_vgetlni32,
|
|
.slowfpvfmx,
|
|
.slowfpvmlx,
|
|
.swift,
|
|
.use_misched,
|
|
.vfp4,
|
|
.vmlx_hazards,
|
|
.wide_stride_vfp,
|
|
}),
|
|
};
|
|
pub const xscale = CpuModel{
|
|
.name = "xscale",
|
|
.llvm_name = "xscale",
|
|
.features = featureSet(&[_]Feature{
|
|
.v5te,
|
|
}),
|
|
};
|
|
};
|