104 Commits

Author SHA1 Message Date
Isaac Freund
2fc18b5278 stage2: make link data in Decl into unions
This will allow for implementation of non-Elf backends without wasting
memory.
2020-08-07 19:25:06 -04:00
Noam Preil
a85452b2c2 Codegen: 16-bit pointers 2020-08-05 11:25:43 -07:00
Noam Preil
a5b76d2474 Stage2: minor File.ELF refactor 2020-08-05 11:25:08 -07:00
Andrew Kelley
02d09d1328 codegen: introduce toCanonicalReg to clean up x86-specific logic 2020-08-04 15:31:54 -07:00
pfg
ea3cc777cc stage2: riscv test case 2020-08-04 14:38:33 -07:00
pfg
0b53a2d996 stage2: riscv 0 argument non-nested function calls 2020-08-04 14:38:33 -07:00
pfg
1fd99ed324 stage2: riscv hello world 2020-08-04 14:38:33 -07:00
pfg
52ae2b10aa stage2: starting on a riscv64 backend 2020-08-04 14:38:33 -07:00
Andrew Kelley
331f6a07a9 stage2: fix ZIR support and C back end 2020-08-04 12:15:47 -07:00
Andrew Kelley
a33efc74ed stage2 codegen: revert the unneeded is_stmt stuff 2020-08-03 21:09:58 -07:00
Andrew Kelley
d624bf8059 stage2 .debug_line stepping with gdb is working 2020-08-03 21:01:06 -07:00
Andrew Kelley
ac10841fa9 stage2 .debug_line: simpler strategy for incremental compilation
See #5963
2020-08-03 19:14:09 -07:00
Andrew Kelley
659603c621 codegen: emit .debug_line ops for IR instructions 2020-08-02 21:28:06 -07:00
Andrew Kelley
ba6e5cbfd2 stage2: add the .debug_line header and associated data types
* the .debug_line header is written properly
 * link.File.Elf gains:
   - SrcFn, which is now a field in Module.Fn
   - SrcFile, which is now a field in Module.Scope.File
 * link.File.Elf gets a whole *Package field rather than only
   root_src_dir_path.
 * the fields first_dbg_line_file and last_dbg_line_file tell where the
   Line Number Program begins and ends, which alows moving files when
   the header gets too big, and allows appending files to the end.
 * codegen is passed a buffer for emitting .debug_line
   Line Number Program opcodes for functions.

See #5963

There is some work-in-progress code here, but I need to go make some
experimental changes to changing how to represent source locations and I
want to do that in a separate commit.
2020-08-02 12:02:43 -07:00
Andrew Kelley
8899e6e334 stage2: codegen: fix off-by-one stack variable offsets 2020-07-29 02:29:37 -07:00
Andrew Kelley
606f157a6b stage2: register-aliasing-aware codegen
* unify duplicated register allocation codepath
 * support the x86_64 concept of register aliasing
 * slightly improved memset codegen, supports sizes 1, 2, 4, 8
2020-07-29 02:29:37 -07:00
Andrew Kelley
1bbfa36b76 stage2: improved codegen
* multiple returns jump to one canonical function exitlude. This is in
   preparation for the defer feature.
 * simple elision of trivial jump relocs.
 * omit prelude/exitlude for naked calling convention functions.
 * fix not switching on arch for prelude/exitlude
 * fix swapped registers when setting stack mem from a register
2020-07-29 02:29:37 -07:00
Andrew Kelley
4beff80b2f stage2: codegen handles undefined values
* `optimize_mode` is passed to `link.File` and stored there
 * improve the debugging function `Module.dumpInst`
 * get rid of `Value.the_one_possible_value` in favor of a few more
   specific values for different types. This is less buggy, one less
   footgun.
 * `Type.onePossibleValue` now returns a `?Value` instead of `bool`.
 * codegen handles undefined values. `undef` is a new `MCValue` tag.
   It uses 0xaa values depending on optimization mode. However
   optimization mode does not yet support scope overrides.
 * link.zig: move the `Options` field from `File.Elf` and `File.C` to
   the base struct.
   - fix the Tag enum to adhere to style conventions
 * ZIR now supports emitting undefined values.
 * Fix the logic of comptime math to properly compare against zero using
   the `compareWithZero` function.
2020-07-29 02:29:37 -07:00
Andrew Kelley
cb3e8e323d stage2: x86_64 codegen for movs to/from stack variables 2020-07-29 02:29:37 -07:00
Andrew Kelley
5ccee4c986 stage2: more progress towards mutable local variables
* implement sema for runtime deref, store pointer, coerce_to_ptr_elem,
   and store
 * identifiers support being lvalues, except for decls is still TODO
 * codegen supports load, store, ref, alloc
 * introduce more MCValue union tags to support pointers
 * add load, ref, store typed IR instructions
 * add Type.isVolatilePtr
2020-07-29 02:29:36 -07:00
Andrew Kelley
d726c2a2d3 self-hosted: beginnings of stack allocation
Comment out non-x86_64 architectures for now in codegen.zig, because
they all have compile errors for their codepaths anyway, and it was
bloating the compilation speed and memory usage when stage1 tried to
build self-hosted. Here's the panic message:

"Backend architectures that don't have good support yet are commented
out, to improve compilation performance. If you are interested in one
of these other backends feel free to uncomment them. Eventually these
will be completed, but stage1 is slow and a memory hog."

This is a workaround to lower the time it takes to build self-hosted
with stage1 as well as use less memory. It should fix the CI.

Additionally:
 * Add `single_mut_pointer` support to `Type`
 * Trivial implementation of stack allocation in codegen.zig. It does
   not deal with freeing yet, and it's missing the stack pointer
   adjustment prologue.
 * Add the `alloc` IR instruction and semantic analysis for `alloc` ZIR
   instruction.
2020-07-28 01:43:04 -07:00
Andrew Kelley
b8e22d2002 stage2: implement integer return values 2020-07-27 18:59:13 -07:00
Vexu
7e7d1df4da
stage2: add floatCast to zir and ir 2020-07-21 22:34:12 +03:00
Vexu
7b52dbbf83
stage2: implement some casts for numbers 2020-07-21 22:29:29 +03:00
Andrew Kelley
ef91b11295 stage2: register allocator processes operand deaths
also rework the IR data structures
2020-07-20 13:12:20 -07:00
Andrew Kelley
a8065a05a5 stage2: fix implementation of liveness operandDies() 2020-07-20 13:12:20 -07:00
Andrew Kelley
896472c20e stage2: implement register copying 2020-07-20 13:12:20 -07:00
Andrew Kelley
ef9aeb6ac4 stage2: codegen: refactor to always have comptime arch 2020-07-20 13:12:20 -07:00
Andrew Kelley
d29dd5834b stage2: local consts
These are now supported enough that this example code hits the
limitations of the register allocator:

fn add(a: u32, b: u32) void {
    const c = a + b; // 7
    const d = a + c; // 10
    const e = d + b; // 14
    assert(e == 14);
}
// error: TODO implement copyToNewRegister

So now the next step is to implement register allocation as planned.
2020-07-15 22:36:35 -07:00
Andrew Kelley
a92990f993 stage2: implement enough for assert() function to codegen 2020-07-14 02:24:12 -07:00
Andrew Kelley
5da5ded743 stage2: detect unreferenced non-volatile asm and NOT 2020-07-13 23:48:26 -07:00
Andrew Kelley
4f5e065d6e stage2: add ZIR support for BoolNot 2020-07-13 20:47:47 -07:00
Andrew Kelley
c306392b44 stage2: codegen: more branching support 2020-07-13 00:08:21 -07:00
Andrew Kelley
b75a51f94b stage2: implement function calling convention for calls 2020-07-13 00:08:21 -07:00
Vexu
e85fe13e44
run zig fmt on std lib and self hosted 2020-07-11 20:41:19 +03:00
Andrew Kelley
7bd0500589 Merge remote-tracking branch 'origin/master' into register-allocation 2020-07-08 20:46:06 -07:00
Andrew Kelley
8e425c0c8d stage2: if AST=>ZIR 2020-07-08 20:33:33 -07:00
Andrew Kelley
5e60872060 stage2 misc fixes 2020-07-08 06:56:20 +00:00
Andrew Kelley
ab9df5b04b stage2: machine code for condbr jumps 2020-07-08 05:35:41 +00:00
Noam Preil
b4c571301b
Stage2: Refactor in preparation for C backend 2020-07-07 14:55:44 -04:00
Andrew Kelley
b55d0193e4 stage2: progress towards Block and CondBr codegen 2020-07-07 08:01:54 +00:00
Andrew Kelley
12737c9a30 stage2: codegen skeleton for cmp and sub 2020-07-06 09:21:57 +00:00
Andrew Kelley
8be8ebd698 stage2: skeleton codegen for x64 ADD
also rework Module to take advantage of the new hash map implementation.
2020-07-06 06:10:44 +00:00
Andrew Kelley
8fb392dbb4 stage2: implement liveness analysis 2020-07-05 23:20:08 +00:00
Andrew Kelley
3a89f214aa update more HashMap API usage 2020-07-05 21:11:42 +00:00
Andrew Kelley
1eed0cf0f3 zig fmt and delete unused type 2020-06-28 19:45:10 -04:00
Andrew Kelley
aa92446365 stage2: implement function parameters
In codegen.zig, the std.Target.Cpu.Arch is now generally available as a
comptime value where needed. This is a tradeoff that causes the compiler
binary to be more bloated, but gives us higher performance, since the
optimizer can optimize per architecture (which is usually how compilers
are designed anyway, with different code per-architecture), and it also
allows us to use per-architecture types, such as a Register enum that is
specific to the comptime-known architecture.

Adds abiSize method to Type.
2020-06-28 19:45:10 -04:00
Andrew Kelley
130c7fd23b self-hosted: working towards conditional branching test case
New features:
 * Functions can have parameters in semantic analysis. Codegen
   is not implemented yet.
 * Support for i8, i16, i32, i64, u8, u16, u32, u64 primitive
   identifiers.
 * New ZIR instructions: arg, block, and breakvoid

Implementation details:

 * Move Module.Body to ir.Body
 * Scope.Block gains a parent field and an optional Label field
 * Fix bug in integer type equality comparison.

Here's the test case I'm working towards:

```
@void = primitive(void)
@i32 = primitive(i32)
@fnty = fntype([@i32, @i32], @void)

@0 = str("entry")
@1 = export(@0, "entry")

@entry = fn(@fnty, {
  %0 = arg(0)
  %1 = arg(1)
  %2 = add(%0, %1)
  %3 = int(7)
  %4 = block("if", {
    %neq = cmp(%2, neq, %3)
    %5 = condbr(%neq, {
      %6 = unreachable()
    }, {
      %7 = breakvoid("if")
    })
  })
  %11 = returnvoid()
})
```

$ ./zig-cache/bin/zig build-obj test.zir
test.zir:9:12: error: TODO implement function parameters for Arch.x86_64

That's where I left off.
2020-06-26 02:30:14 -04:00
Andrew Kelley
c9a0ec25e0 self-hosted: add Tracy integration
This tool helps give an intuitive picture of performance. This will help
us understand where to improve the code.
2020-06-18 21:55:37 -04:00
Andrew Kelley
7e58c56ca7 self-hosted: implement Decl lookup
* Take advantage of coercing anonymous struct literals to struct types.
 * Reworks Module to favor Zig source as the primary use case.
   Breaks ZIR compilation, which will have to be restored in a future commit.
 * Decl uses src_index rather then src, pointing to an AST Decl node
   index, or ZIR Module Decl index, rather than a byte offset.
 * ZIR instructions have an `analyzed_inst` field instead of Module
   having a hash table.
 * Module.Fn loses the `fn_type` field since it is redundant with
   its `owner_decl` `TypedValue` type.
 * Implement Type and Value copying. A ZIR Const instruction's TypedValue
   is copied to the Decl arena during analysis, which allows freeing the
   ZIR text instructions post-analysis.
 * Don't flush the ELF file if there are compilation errors.
 * Function return types allow arbitrarily complex expressions.
 * AST->ZIR for function calls and return statements.
2020-06-18 17:12:56 -04:00