19 Commits

Author SHA1 Message Date
Noam Preil
a5b76d2474 Stage2: minor File.ELF refactor 2020-08-05 11:25:08 -07:00
pfg
ea3cc777cc stage2: riscv test case 2020-08-04 14:38:33 -07:00
pfg
0b53a2d996 stage2: riscv 0 argument non-nested function calls 2020-08-04 14:38:33 -07:00
pfg
1fd99ed324 stage2: riscv hello world 2020-08-04 14:38:33 -07:00
pfg
52ae2b10aa stage2: starting on a riscv64 backend 2020-08-04 14:38:33 -07:00
Andrew Kelley
331f6a07a9 stage2: fix ZIR support and C back end 2020-08-04 12:15:47 -07:00
Andrew Kelley
606f157a6b stage2: register-aliasing-aware codegen
* unify duplicated register allocation codepath
 * support the x86_64 concept of register aliasing
 * slightly improved memset codegen, supports sizes 1, 2, 4, 8
2020-07-29 02:29:37 -07:00
Andrew Kelley
b8e22d2002 stage2: implement integer return values 2020-07-27 18:59:13 -07:00
Andrew Kelley
aac6e8c418 self-hosted: AST flattening, astgen improvements, result locations, and more
* AST: flatten ControlFlowExpression into Continue, Break, and Return.
 * AST: unify identifiers and literals into the same AST type: OneToken
 * AST: ControlFlowExpression uses TrailerFlags to optimize storage
   space.
 * astgen: support `var` as well as `const` locals, and support
   explicitly typed locals. Corresponding Module and codegen code is not
   implemented yet.
 * astgen: support result locations.
 * ZIR: add the following instructions (see the corresponding doc
   comments for explanations of semantics):
   - alloc
   - alloc_inferred
   - bitcast_result_ptr
   - coerce_result_block_ptr
   - coerce_result_ptr
   - coerce_to_ptr_elem
   - ensure_result_used
   - ensure_result_non_error
   - ret_ptr
   - ret_type
   - store
   - param_type
 * the skeleton structure for result locations is set up. It's looking
   pretty clean so far.
 * add compile error for unused result and compile error for discarding
   errors.
 * astgen: split builtin calls up to implemented manually, and implement
   `@as`, `@bitCast` (and others) with respect to result locations.
 * add CLI support for hex and raw object formats. They are not
   supported by the self-hosted compiler yet, and emit errors.
 * rename `--c` CLI to `-ofmt=[objectformat]` which can be any of the
   object formats. Only ELF and C are supported so far. Also added missing
   help to the help text.
 * Remove hard tabs from C backend test cases. Shame on you Noam, you
   are grounded, you should know better, etc. Bad boy.
 * Delete C backend code and test case that relied on comptime_int
   incorrectly making it all the way to codegen.
2020-07-23 23:05:26 -07:00
Andrew Kelley
ef91b11295 stage2: register allocator processes operand deaths
also rework the IR data structures
2020-07-20 13:12:20 -07:00
Andrew Kelley
896472c20e stage2: implement register copying 2020-07-20 13:12:20 -07:00
Andrew Kelley
ef9aeb6ac4 stage2: codegen: refactor to always have comptime arch 2020-07-20 13:12:20 -07:00
Andrew Kelley
08154c0deb stage2: add retvoid support to CBE 2020-07-13 00:28:11 -07:00
Andrew Kelley
1eed0cf0f3 zig fmt and delete unused type 2020-06-28 19:45:10 -04:00
Andrew Kelley
aa92446365 stage2: implement function parameters
In codegen.zig, the std.Target.Cpu.Arch is now generally available as a
comptime value where needed. This is a tradeoff that causes the compiler
binary to be more bloated, but gives us higher performance, since the
optimizer can optimize per architecture (which is usually how compilers
are designed anyway, with different code per-architecture), and it also
allows us to use per-architecture types, such as a Register enum that is
specific to the comptime-known architecture.

Adds abiSize method to Type.
2020-06-28 19:45:10 -04:00
Noam Preil
c405844b0a [Stage2/x86] Fix 8-bit register order 2020-06-08 02:28:39 -04:00
Noam Preil
63aa9ffedc [Stage2/Codegen] Typo fix 2020-05-22 15:34:32 -04:00
Noam Preil
a52d1476b7 [Stage2/Codegen] Document x64 register enum layout 2020-05-22 15:32:33 -04:00
Andrew Kelley
88c8ff6e37 move some files around 2020-05-17 12:08:47 -04:00