Andrew Kelley
9845264a0b
aarch64: less feature-full baseline CPU
2020-01-22 18:40:34 -05:00
LemonBoy
a284be3f69
Fix unsafe cast in translate_c
...
Fixes #4250
2020-01-22 17:58:57 -05:00
Andrew Kelley
0c477f3c79
fix std.Target.Arch.parseCpuFeatureSet unit test
2020-01-22 17:47:18 -05:00
Andrew Kelley
3227aec848
fix not respecting sub-arch feature
2020-01-22 17:35:57 -05:00
Andrew Kelley
b94525c45b
Merge pull request #4263 from LemonBoy/debug-thing
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Refactor some debug stuff
2020-01-22 17:32:48 -05:00
Andrew Kelley
48c7e6c48b
std.Target.CpuFeatures is now a struct with both CPU and feature set
...
Previously it was a tagged union which was one of:
* baseline
* a specific CPU
* a set of features
Now, it's possible to have a CPU but also modify the CPU's feature set
on top of that. This is closer to what LLVM does.
This is more correct because Zig's notion of CPUs (and LLVM's) is not
exact CPU models. For example "skylake" is not one very specific model;
there are several different pieces of hardware that match "skylake" that
have different feature sets enabled.
2020-01-22 17:13:31 -05:00
LemonBoy
69c72e24d4
compiler-rt: Port __mulsi3 builtin
2020-01-22 13:04:45 -05:00
Andrew Kelley
c6bfece1d5
Revert "tests: use an older aarch64 sub-arch"
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This reverts commit 4640ef589e
.
This attempted workaround did not have the desired effect.
2020-01-21 22:24:40 -05:00
Andrew Kelley
cbe9a51518
don't trust llvm's GetHostCPUName
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comment from this commit reproduced here:
I have observed the CPU name reported by LLVM being incorrect. On
the SourceHut build services, LLVM 9.0 reports the CPU as "athlon-xp",
which is a 32-bit CPU, even though the system is 64-bit and the reported
CPU features include, among other things, +64bit.
So the strategy taken here is that we observe both reported CPU, and the
reported CPU features. The features are trusted more; but if the features
match exactly the features of the reported CPU, then we trust the reported CPU.
2020-01-21 22:02:13 -05:00
Andrew Kelley
830e0ba2d2
enable native CPU feature for windows; disable failing tests
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See #508 . These can be re-enabled when we upgrade to LLVM 10.
2020-01-21 21:46:06 -05:00
Andrew Kelley
4640ef589e
tests: use an older aarch64 sub-arch
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to avoid an illegal instruction error with the older qemu
version that is available on the CI server.
2020-01-21 21:02:33 -05:00
Andrew Kelley
6e6ec3d71d
put hack back in to disable windows native cpu features
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See #508 . This can be removed when we upgrade to LLVM 10.
2020-01-21 21:01:36 -05:00
Andrew Kelley
68b6867e76
lazily compute the full cpu features dependencies
2020-01-21 20:11:36 -05:00
Andrew Kelley
92559cd02c
hit a comptime limitation with computing dense sets
2020-01-21 19:40:44 -05:00
LemonBoy
b8601e9252
Adjust tests & work around a nasty ICE
2020-01-21 23:17:02 +01:00
LemonBoy
59d0dda080
Make writeByteNTimes faster and leaner
2020-01-21 20:58:02 +01:00
LemonBoy
bc82e0f3d3
Refactor some code in the debug output
2020-01-21 20:51:57 +01:00
Andrew Kelley
15d5cab569
fix target_triple_zig to emit zig-compatible triples
2020-01-21 12:25:22 -05:00
Andrew Kelley
91ecce3bc0
fix cache of cpu features
2020-01-21 12:14:43 -05:00
Andrew Kelley
6793af8d8b
these are not real cpu features
2020-01-21 12:14:36 -05:00
Andrew Kelley
327ad0ae89
target_triple_llvm: emit none instead of unknown
2020-01-21 03:05:56 -05:00
Andrew Kelley
1f7babbc80
properly forward baseline target cpu features to llvm
2020-01-21 03:01:20 -05:00
Andrew Kelley
0abaee79af
fix self-hosted compiler regression
2020-01-21 01:51:21 -05:00
Andrew Kelley
5974f95cb7
add cpus and cpu features to zig targets
2020-01-21 01:48:25 -05:00
Andrew Kelley
0c2dde2fda
add libc and glibcs to self-hosted zig targets
2020-01-21 01:31:27 -05:00
Andrew Kelley
39759b90fc
make zig targets show native cpu name and features
2020-01-21 01:22:37 -05:00
Andrew Kelley
e640d01535
fixups to arch data, support any number of cpu features
2020-01-21 00:34:54 -05:00
Andrew Kelley
6118b11afa
Revert "aarch64: remove CPU features that are actually just CPUs"
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This reverts commit 6dd514ac8a
.
This strategy won't work for arm 32-bit; instead need to try to figure
out how to get more bits into the bit set.
2020-01-20 23:15:07 -05:00
Andrew Kelley
89e107ee4e
uncomment all the archs in target.zig
2020-01-20 23:14:35 -05:00
Andrew Kelley
6dd514ac8a
aarch64: remove CPU features that are actually just CPUs
2020-01-20 22:49:26 -05:00
Andrew Kelley
6e88883edf
import data from llvm 9
2020-01-20 22:21:45 -05:00
Andrew Kelley
f3dd9bbdac
improve `zig targets`
2020-01-20 13:40:25 -05:00
Andrew Kelley
bf82929557
fix std.Target.Arch.parseCpuFeatureSet
2020-01-20 12:41:18 -05:00
LemonBoy
c522699f28
Fix ICE in build addAssemblyFile
2020-01-20 12:24:55 -05:00
Nathan Michaels
0000de4fee
Handle {s} format for C strings. ( #4219 )
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* Handle {s} format for C strings.
* Fix "cstr" test to actually use c strings.
2020-01-20 12:23:43 -05:00
daurnimator
5cc4932461
std: allocator interface sets freed memory to undefined
2020-01-21 03:17:40 +11:00
daurnimator
65013d8599
std: fix bug in http.headers where .put captures user-held variable
2020-01-21 03:17:36 +11:00
Andrew Kelley
8f29d14073
stage1 is building. `zig targets` now self-hosted
2020-01-20 01:42:31 -05:00
Andrew Kelley
20af858601
some fixes
2020-01-19 21:06:41 -05:00
Andrew Kelley
e3b5e91878
do the x86 arch
2020-01-19 20:54:05 -05:00
Andrew Kelley
a313f15384
figure out zig0/stage1 and scanning for native CPU
2020-01-19 20:54:05 -05:00
Andrew Kelley
a867b43366
progress towards merging
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see BRANCH_TODO file
2020-01-19 20:54:04 -05:00
Layne Gustafson
c15623428e
Pass target_details to child CodeGens
2020-01-19 20:53:20 -05:00
Layne Gustafson
430077df1b
Allow target details with no LLVM support
2020-01-19 20:53:20 -05:00
Layne Gustafson
62e4cc06fe
Pass target details to c compiler
2020-01-19 20:53:20 -05:00
Layne Gustafson
35c681b7b1
Fix sentinel mismatch in llvm strings
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Previously, buffers were used with toOwnedSlice() to create c strings
for LLVM cpu/feature strings. However, toOwnedSlice() shrinks the
string memory to the buffer's length, which cuts off the null terminator.
Now toSliceConst() is used instead, and the buffer is not deinited
so that the string memory is not freed.
2020-01-19 20:53:20 -05:00
Layne Gustafson
8902f3ca32
Enable 64bit feature for riscv64
2020-01-19 20:53:20 -05:00
Layne Gustafson
de8a5cf5f5
Remove features/cpus not in LLVM v9
2020-01-19 20:53:20 -05:00
Layne Gustafson
a5c9397539
No allocations for n.t. empty strings
2020-01-19 20:53:20 -05:00
Layne Gustafson
40ff359486
Only enable requested features
2020-01-19 20:53:20 -05:00