parent
34b4538d7b
commit
c1ee846c22
34
src/ir.cpp
34
src/ir.cpp
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@ -26599,6 +26599,23 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
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if ((err = resolve_ptr_align(ira, dest_type, &dest_align_bytes)))
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return ira->codegen->invalid_instruction;
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if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
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return ira->codegen->invalid_instruction;
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if ((err = type_resolve(ira->codegen, src_type, ResolveStatusZeroBitsKnown)))
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return ira->codegen->invalid_instruction;
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if (type_has_bits(dest_type) && !type_has_bits(src_type)) {
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ErrorMsg *msg = ir_add_error(ira, source_instr,
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buf_sprintf("'%s' and '%s' do not have the same in-memory representation",
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buf_ptr(&src_type->name), buf_ptr(&dest_type->name)));
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add_error_note(ira->codegen, msg, ptr->source_node,
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buf_sprintf("'%s' has no in-memory bits", buf_ptr(&src_type->name)));
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add_error_note(ira->codegen, msg, dest_type_src->source_node,
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buf_sprintf("'%s' has in-memory bits", buf_ptr(&dest_type->name)));
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return ira->codegen->invalid_instruction;
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}
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if (instr_is_comptime(ptr)) {
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bool dest_allows_addr_zero = ptr_allows_addr_zero(dest_type);
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UndefAllowed is_undef_allowed = dest_allows_addr_zero ? UndefOk : UndefBad;
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@ -26649,23 +26666,6 @@ static IrInstruction *ir_analyze_ptr_cast(IrAnalyze *ira, IrInstruction *source_
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IrInstruction *casted_ptr = ir_build_ptr_cast_gen(ira, source_instr, dest_type, ptr, safety_check_on);
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if ((err = type_resolve(ira->codegen, dest_type, ResolveStatusZeroBitsKnown)))
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return ira->codegen->invalid_instruction;
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if ((err = type_resolve(ira->codegen, src_type, ResolveStatusZeroBitsKnown)))
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return ira->codegen->invalid_instruction;
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if (type_has_bits(dest_type) && !type_has_bits(src_type)) {
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ErrorMsg *msg = ir_add_error(ira, source_instr,
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buf_sprintf("'%s' and '%s' do not have the same in-memory representation",
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buf_ptr(&src_type->name), buf_ptr(&dest_type->name)));
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add_error_note(ira->codegen, msg, ptr->source_node,
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buf_sprintf("'%s' has no in-memory bits", buf_ptr(&src_type->name)));
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add_error_note(ira->codegen, msg, dest_type_src->source_node,
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buf_sprintf("'%s' has in-memory bits", buf_ptr(&dest_type->name)));
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return ira->codegen->invalid_instruction;
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}
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// Keep the bigger alignment, it can only help-
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// unless the target is zero bits.
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IrInstruction *result;
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@ -2,6 +2,16 @@ const tests = @import("tests.zig");
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const builtin = @import("builtin");
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pub fn addCases(cases: *tests.CompileErrorContext) void {
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cases.add("comptime ptrcast of zero-sized type",
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\\fn foo() void {
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\\ const node: struct {} = undefined;
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\\ const vla_ptr = @ptrCast([*]const u8, &node);
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\\}
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\\comptime { foo(); }
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, &[_][]const u8{
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"tmp.zig:3:21: error: '*const struct:2:17' and '[*]const u8' do not have the same in-memory representation",
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});
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cases.add("slice sentinel mismatch",
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\\fn foo() [:0]u8 {
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\\ var x: []u8 = undefined;
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