2015-12-08 16:51:59 -08:00
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/*===---- immintrin.h - Intel intrinsics -----------------------------------===
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#define __IMMINTRIN_H
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__MMX__)
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2015-12-08 16:51:59 -08:00
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#include <mmintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__SSE__)
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2015-12-08 16:51:59 -08:00
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#include <xmmintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__SSE2__)
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2015-12-08 16:51:59 -08:00
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#include <emmintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__SSE3__)
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2015-12-08 16:51:59 -08:00
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#include <pmmintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__SSSE3__)
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2015-12-08 16:51:59 -08:00
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#include <tmmintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || \
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(defined(__SSE4_2__) || defined(__SSE4_1__))
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2015-12-08 16:51:59 -08:00
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#include <smmintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || \
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(defined(__AES__) || defined(__PCLMUL__))
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2015-12-08 16:51:59 -08:00
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#include <wmmintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__CLFLUSHOPT__)
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#include <clflushoptintrin.h>
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#endif
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX__)
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2015-12-08 16:51:59 -08:00
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#include <avxintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX2__)
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2015-12-08 16:51:59 -08:00
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#include <avx2intrin.h>
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2017-06-16 11:35:00 -07:00
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/* The 256-bit versions of functions in f16cintrin.h.
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Intel documents these as being in immintrin.h, and
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they depend on typedefs from avxintrin.h. */
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/// \brief Converts a 256-bit vector of [8 x float] into a 128-bit vector
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/// containing 16-bit half-precision float values.
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///
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/// \headerfile <x86intrin.h>
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///
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/// \code
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/// __m128i _mm256_cvtps_ph(__m256 a, const int imm);
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/// \endcode
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///
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/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
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///
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/// \param a
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/// A 256-bit vector containing 32-bit single-precision float values to be
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/// converted to 16-bit half-precision float values.
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/// \param imm
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/// An immediate value controlling rounding using bits [2:0]: \n
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/// 000: Nearest \n
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/// 001: Down \n
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/// 010: Up \n
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/// 011: Truncate \n
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/// 1XX: Use MXCSR.RC for rounding
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/// \returns A 128-bit vector containing the converted 16-bit half-precision
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/// float values.
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#define _mm256_cvtps_ph(a, imm) __extension__ ({ \
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(__m128i)__builtin_ia32_vcvtps2ph256((__v8sf)(__m256)(a), (imm)); })
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/// \brief Converts a 128-bit vector containing 16-bit half-precision float
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/// values into a 256-bit vector of [8 x float].
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
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///
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/// \param __a
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/// A 128-bit vector containing 16-bit half-precision float values to be
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/// converted to 32-bit single-precision float values.
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/// \returns A vector of [8 x float] containing the converted 32-bit
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/// single-precision float values.
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static __inline __m256 __attribute__((__always_inline__, __nodebug__, __target__("f16c")))
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_mm256_cvtph_ps(__m128i __a)
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{
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return (__m256)__builtin_ia32_vcvtph2ps256((__v8hi)__a);
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}
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#endif /* __AVX2__ */
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__BMI__)
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2015-12-08 16:51:59 -08:00
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#include <bmiintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__BMI2__)
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2015-12-08 16:51:59 -08:00
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#include <bmi2intrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__LZCNT__)
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2015-12-08 16:51:59 -08:00
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#include <lzcntintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__FMA__)
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2015-12-08 16:51:59 -08:00
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#include <fmaintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512F__)
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2015-12-08 16:51:59 -08:00
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#include <avx512fintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512VL__)
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2015-12-08 16:51:59 -08:00
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#include <avx512vlintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512BW__)
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2015-12-08 16:51:59 -08:00
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#include <avx512bwintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512CD__)
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2015-12-08 16:51:59 -08:00
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#include <avx512cdintrin.h>
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#endif
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2017-09-30 15:20:12 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512VPOPCNTDQ__)
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#include <avx512vpopcntdqintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512DQ__)
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2015-12-08 16:51:59 -08:00
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#include <avx512dqintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || \
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(defined(__AVX512VL__) && defined(__AVX512BW__))
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2015-12-08 16:51:59 -08:00
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#include <avx512vlbwintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || \
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(defined(__AVX512VL__) && defined(__AVX512CD__))
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#include <avx512vlcdintrin.h>
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#endif
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#if !defined(_MSC_VER) || __has_feature(modules) || \
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(defined(__AVX512VL__) && defined(__AVX512DQ__))
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2015-12-08 16:51:59 -08:00
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#include <avx512vldqintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512ER__)
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2015-12-08 16:51:59 -08:00
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#include <avx512erintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512IFMA__)
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#include <avx512ifmaintrin.h>
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#endif
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#if !defined(_MSC_VER) || __has_feature(modules) || \
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(defined(__AVX512IFMA__) && defined(__AVX512VL__))
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#include <avx512ifmavlintrin.h>
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#endif
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512VBMI__)
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#include <avx512vbmiintrin.h>
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#endif
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#if !defined(_MSC_VER) || __has_feature(modules) || \
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(defined(__AVX512VBMI__) && defined(__AVX512VL__))
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#include <avx512vbmivlintrin.h>
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#endif
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__AVX512PF__)
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#include <avx512pfintrin.h>
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#endif
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__PKU__)
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#include <pkuintrin.h>
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#endif
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__RDRND__)
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static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
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2015-12-08 16:51:59 -08:00
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_rdrand16_step(unsigned short *__p)
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{
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return __builtin_ia32_rdrand16_step(__p);
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}
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2017-06-16 11:35:00 -07:00
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static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
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2015-12-08 16:51:59 -08:00
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_rdrand32_step(unsigned int *__p)
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{
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return __builtin_ia32_rdrand32_step(__p);
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}
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2017-09-30 15:20:12 -07:00
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#ifdef __x86_64__
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static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
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_rdrand64_step(unsigned long long *__p)
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{
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return __builtin_ia32_rdrand64_step(__p);
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}
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#endif
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#endif /* __RDRND__ */
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2017-06-16 11:35:00 -07:00
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/* __bit_scan_forward */
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static __inline__ int __attribute__((__always_inline__, __nodebug__))
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_bit_scan_forward(int __A) {
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return __builtin_ctz(__A);
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}
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/* __bit_scan_reverse */
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2015-12-08 16:51:59 -08:00
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static __inline__ int __attribute__((__always_inline__, __nodebug__))
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2017-06-16 11:35:00 -07:00
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_bit_scan_reverse(int __A) {
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return 31 - __builtin_clz(__A);
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}
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__FSGSBASE__)
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2015-12-08 16:51:59 -08:00
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#ifdef __x86_64__
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2017-06-16 11:35:00 -07:00
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static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
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2015-12-08 16:51:59 -08:00
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_readfsbase_u32(void)
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{
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return __builtin_ia32_rdfsbase32();
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}
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2017-06-16 11:35:00 -07:00
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static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
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2015-12-08 16:51:59 -08:00
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_readfsbase_u64(void)
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{
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return __builtin_ia32_rdfsbase64();
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}
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2017-06-16 11:35:00 -07:00
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static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
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2015-12-08 16:51:59 -08:00
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_readgsbase_u32(void)
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{
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return __builtin_ia32_rdgsbase32();
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}
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2017-06-16 11:35:00 -07:00
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static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
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2015-12-08 16:51:59 -08:00
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_readgsbase_u64(void)
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{
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return __builtin_ia32_rdgsbase64();
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}
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2017-06-16 11:35:00 -07:00
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static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
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2015-12-08 16:51:59 -08:00
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_writefsbase_u32(unsigned int __V)
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{
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return __builtin_ia32_wrfsbase32(__V);
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}
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2017-06-16 11:35:00 -07:00
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static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
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2015-12-08 16:51:59 -08:00
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_writefsbase_u64(unsigned long long __V)
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{
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return __builtin_ia32_wrfsbase64(__V);
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}
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2017-06-16 11:35:00 -07:00
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static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
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2015-12-08 16:51:59 -08:00
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_writegsbase_u32(unsigned int __V)
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{
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return __builtin_ia32_wrgsbase32(__V);
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}
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2017-06-16 11:35:00 -07:00
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static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
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2015-12-08 16:51:59 -08:00
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_writegsbase_u64(unsigned long long __V)
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{
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return __builtin_ia32_wrgsbase64(__V);
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}
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2017-06-16 11:35:00 -07:00
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2015-12-08 16:51:59 -08:00
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#endif
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#endif /* __FSGSBASE__ */
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__RTM__)
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2015-12-08 16:51:59 -08:00
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#include <rtmintrin.h>
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#include <xtestintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__SHA__)
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2015-12-08 16:51:59 -08:00
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#include <shaintrin.h>
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#endif
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2017-06-16 11:35:00 -07:00
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__FXSR__)
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2015-12-08 16:51:59 -08:00
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#include <fxsrintrin.h>
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2017-06-16 11:35:00 -07:00
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#endif
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__XSAVE__)
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#include <xsaveintrin.h>
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#endif
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__XSAVEOPT__)
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#include <xsaveoptintrin.h>
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#endif
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__XSAVEC__)
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#include <xsavecintrin.h>
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#endif
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#if !defined(_MSC_VER) || __has_feature(modules) || defined(__XSAVES__)
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#include <xsavesintrin.h>
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#endif
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2015-12-08 16:51:59 -08:00
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/* Some intrinsics inside adxintrin.h are available only on processors with ADX,
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* whereas others are also available at all times. */
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#include <adxintrin.h>
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#endif /* __IMMINTRIN_H */
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