656 lines
23 KiB
Plaintext
656 lines
23 KiB
Plaintext
(***********************************************************************)
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(* *)
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(* Caml Special Light *)
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(* *)
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(* Xavier Leroy, projet Cristal, INRIA Rocquencourt *)
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(* *)
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(* Copyright 1995 Institut National de Recherche en Informatique et *)
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(* Automatique. Distributed only by permission. *)
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(* *)
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(***********************************************************************)
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(* $Id$ *)
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(* Emission of Alpha assembly code *)
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open Misc
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open Cmm
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open Arch
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open Proc
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open Reg
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open Mach
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open Linearize
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open Emitaux
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(* Tradeoff between code size and code speed *)
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let fastcode_flag = ref true
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(* Output a label *)
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let emit_label lbl =
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emit_string "$"; emit_int lbl
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(* Output a symbol *)
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let emit_symbol s =
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Emitaux.emit_symbol '$' s
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(* Output a pseudo-register *)
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let emit_reg r =
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match r.loc with
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Reg r -> emit_string (register_name r)
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| _ -> fatal_error "Emit_alpha.emit_reg"
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(* Layout of the stack frame *)
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let stack_offset = ref 0
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let uses_gp = ref false
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let frame_size () =
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let size =
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!stack_offset +
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8 * (num_stack_slots.(0) + num_stack_slots.(1)) +
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(if !contains_calls then 8 else 0) +
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(if !uses_gp then 8 else 0) in
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Misc.align size 16
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let slot_offset loc class =
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match loc with
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Incoming n -> frame_size() + n
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| Local n ->
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if class = 0
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then !stack_offset + n * 8
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else !stack_offset + (num_stack_slots.(0) + n) * 8
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| Outgoing n -> n
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(* Output a stack reference *)
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let emit_stack r =
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match r.loc with
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Stack s ->
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let ofs = slot_offset s (register_class r) in `{emit_int ofs}($sp)`
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| _ -> fatal_error "Emit_alpha.emit_stack"
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(* Output an addressing mode *)
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let emit_addressing addr r n =
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match addr with
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Iindexed ofs ->
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`{emit_int ofs}({emit_reg r.(n)})`
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| Ibased(s, 0) ->
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`{emit_symbol s}`
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| Ibased(s, ofs) ->
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`{emit_symbol s} + {emit_int ofs}`
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(* Communicate live registers at call points to the assembler *)
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let int_reg_number = [|
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0; 1; 2; 3; 4; 5; 6; 7; 8; 9; 10; 11; 12;
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16; 17; 18; 19; 20; 21; 22
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|]
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let float_reg_number = [|
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0; 1; 2; 3; 4; 5; 6; 7; 8; 9; 10; 11; 12; 13; 14; 15;
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16; 17; 18; 19; 20; 21; 22; 23; 24; 25; 26; 27; 28; 29
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|]
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let liveregs instr extra_msk =
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(* $13, $14, $15, $26 always live *)
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let int_mask = ref(0x00070020 lor extra_msk)
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and float_mask = ref 0 in
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let add_register = function
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{loc = Reg r; typ = (Int | Addr)} ->
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int_mask := !int_mask lor (1 lsl (31 - int_reg_number.(r)))
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| {loc = Reg r; typ = Float} ->
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float_mask := !float_mask lor (1 lsl (31 - float_reg_number.(r - 100)))
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| _ -> () in
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Reg.Set.iter add_register instr.live;
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Array.iter add_register instr.arg;
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emit_printf " .livereg 0x%08x, 0x%08x\n" !int_mask !float_mask
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let live_24 = 1 lsl (31 - 24)
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let live_25 = 1 lsl (31 - 25)
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let live_26 = 1 lsl (31 - 26)
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let live_27 = 1 lsl (31 - 27)
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(* Record live pointers at call points *)
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type frame_descr =
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{ fd_lbl: int; (* Return address *)
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fd_frame_size: int; (* Size of stack frame *)
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fd_live_offset: int list } (* Offsets/regs of live addresses *)
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let frame_descriptors = ref([] : frame_descr list)
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let record_frame_label live =
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let lbl = new_label() in
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let live_offset = ref [] in
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Reg.Set.iter
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(function
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{typ = Addr; loc = Reg r} ->
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live_offset := ((int_reg_number.(r) lsl 1) + 1) :: !live_offset
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| {typ = Addr; loc = Stack s} as reg ->
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live_offset := slot_offset s (register_class reg) :: !live_offset
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| _ -> ())
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live;
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frame_descriptors :=
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{ fd_lbl = lbl;
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fd_frame_size = frame_size();
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fd_live_offset = !live_offset } :: !frame_descriptors;
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lbl
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let record_frame live =
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let lbl = record_frame_label live in `{emit_label lbl}:`
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let emit_frame fd =
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` .quad {emit_label fd.fd_lbl} + 4\n`;
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` .word {emit_int fd.fd_frame_size}\n`;
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` .word {emit_int (List.length fd.fd_live_offset)}\n`;
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List.iter
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(fun n ->
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` .word {emit_int n}\n`)
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fd.fd_live_offset;
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` .align 3\n`
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(* Record calls to the GC -- we've moved them out of the way *)
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type gc_call =
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{ gc_lbl: label; (* Entry label *)
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gc_return_lbl: label; (* Where to branch after GC *)
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gc_desired_size: int; (* Required block size *)
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gc_frame: label; (* Label of frame descriptor *)
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gc_instr: instruction } (* Record live registers *)
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let call_gc_sites = ref ([] : gc_call list)
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let emit_call_gc gc =
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`{emit_label gc.gc_lbl}: ldiq $25, {emit_int gc.gc_desired_size}\n`;
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liveregs gc.gc_instr 0;
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`{emit_label gc.gc_frame}: bsr caml_call_gc\n`;
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` br {emit_label gc.gc_return_lbl}\n`
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(* Determine if $gp is used in the function *)
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let rec instr_uses_gp i =
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match i.desc with
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Lend -> false
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| Lop(Iconst_int n) ->
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if n < -0x8000000 or n > 0x7FFFFFFF then true else instr_uses_gp i.next
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| Lop(Iconst_float s) -> true
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| Lop(Iconst_symbol s) -> true
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| Lop(Iextcall(_, _)) -> true
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| Lop(Iload(_, Ibased(_, _))) -> true
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| Lop(Istore(_, Ibased(_, _))) -> true
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| Lop(Iintop(Idiv | Imod)) -> true (* divq and remq can be turned into *)
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| Lop(Iintop_imm((Idiv | Imod), _)) -> true (* a function call *)
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| Lop(Iintop_imm(_, n)) ->
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if n < -0x8000000 or n > 0x7FFFFFFF then true else instr_uses_gp i.next
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| _ ->
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instr_uses_gp i.next
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(* Names of various instructions *)
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let name_for_int_operation = function
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Iadd -> "addq"
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| Isub -> "subq"
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| Imul -> "mulq"
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| Idiv -> "divq"
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| Imod -> "remq"
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| Iand -> "and"
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| Ior -> "or"
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| Ixor -> "xor"
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| Ilsl -> "sll"
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| Ilsr -> "srl"
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| Iasr -> "sra"
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| _ -> Misc.fatal_error "Emit.name_for_int_operation"
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let name_for_float_operation = function
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Iaddf -> "addt"
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| Isubf -> "subt"
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| Imulf -> "mult"
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| Idivf -> "divt"
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| _ -> Misc.fatal_error "Emit.name_for_float_operation"
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let name_for_specific_operation = function
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Iadd4 -> "s4addq"
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| Iadd8 -> "s8addq"
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| Isub4 -> "s4subq"
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| Isub8 -> "s8subq"
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let name_for_int_comparison = function
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Isigned Ceq -> "cmpeq", true | Isigned Cne -> "cmpeq", false
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| Isigned Cle -> "cmple", true | Isigned Cgt -> "cmple", false
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| Isigned Clt -> "cmplt", true | Isigned Cge -> "cmplt", false
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| Iunsigned Ceq -> "cmpeq", true | Iunsigned Cne -> "cmpeq", false
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| Iunsigned Cle -> "cmpule", true | Iunsigned Cgt -> "cmpule", false
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| Iunsigned Clt -> "cmpult", true | Iunsigned Cge -> "cmpult", false
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(* Used for comparisons against 0 *)
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let name_for_int_cond_branch = function
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Isigned Ceq -> "beq" | Isigned Cne -> "bne"
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| Isigned Cle -> "ble" | Isigned Cgt -> "bgt"
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| Isigned Clt -> "blt" | Isigned Cge -> "bge"
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| Iunsigned Ceq -> "beq" | Iunsigned Cne -> "bne"
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| Iunsigned Cle -> "beq" | Iunsigned Cgt -> "bne"
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| Iunsigned Clt -> "#" | Iunsigned Cge -> "br"
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(* Always false *) (* Always true *)
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let name_for_float_comparison cmp neg =
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match cmp with
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Ceq -> ("cmpteq", false, neg) | Cne -> ("cmpteq", false, not neg)
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| Cle -> ("cmptle", false, neg) | Cgt -> ("cmptlt", true, neg)
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| Clt -> ("cmptlt", false, neg) | Cge -> ("cmptle", true, neg)
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(* Output the assembly code for an instruction *)
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(* Name of current function *)
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let function_name = ref ""
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(* Entry point for tail recursive calls *)
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let tailrec_entry_point = ref 0
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(* Label of trap for out-of-range accesses *)
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let range_check_trap = ref 0
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let emit_instr i =
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match i.desc with
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Lend -> ()
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| Lop(Imove | Ispill | Ireload) ->
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let src = i.arg.(0) and dst = i.res.(0) in
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if src.loc <> dst.loc then begin
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match (src.loc, dst.loc) with
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(Reg rs, Reg rd) ->
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if src.typ = Float then
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` fmov {emit_reg src}, {emit_reg dst}\n`
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else
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` mov {emit_reg src}, {emit_reg dst}\n`
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| (Reg rs, Stack sd) ->
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if src.typ = Float then
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` stt {emit_reg src}, {emit_stack dst}\n`
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else
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` stq {emit_reg src}, {emit_stack dst}\n`
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| (Stack ss, Reg rd) ->
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if src.typ = Float then
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` ldt {emit_reg dst}, {emit_stack src}\n`
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else
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` ldq {emit_reg dst}, {emit_stack src}\n`
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| _ ->
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fatal_error "Emit_alpha: Imove"
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end
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| Lop(Iconst_int 0) ->
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` clr {emit_reg i.res.(0)}\n`
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| Lop(Iconst_int n) ->
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` ldiq {emit_reg i.res.(0)}, {emit_int n}\n`
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| Lop(Iconst_float s) ->
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` ldit {emit_reg i.res.(0)}, {emit_string s}\n`
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| Lop(Iconst_symbol s) ->
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` lda {emit_reg i.res.(0)}, {emit_symbol s}\n`
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| Lop(Icall_ind) ->
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liveregs i 0;
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`{record_frame i.live} jsr ({emit_reg i.arg.(0)})\n`
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| Lop(Icall_imm s) ->
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liveregs i 0;
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`{record_frame i.live} bsr {emit_symbol s}\n`
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| Lop(Itailcall_ind) ->
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let n = frame_size() in
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if !contains_calls then
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` ldq $26, {emit_int(n - 8)}($sp)\n`;
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if !uses_gp then
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` ldq $gp, {emit_int(n - 16)}($sp)\n`;
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if n > 0 then
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` lda $sp, {emit_int n}($sp)\n`;
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liveregs i live_26;
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` jmp ({emit_reg i.arg.(0)})\n`
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| Lop(Itailcall_imm s) ->
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if s = !function_name then begin
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` br {emit_label !tailrec_entry_point}\n`
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end else begin
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let n = frame_size() in
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if !contains_calls then
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` ldq $26, {emit_int(n - 8)}($sp)\n`;
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if !uses_gp then
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` ldq $gp, {emit_int(n - 16)}($sp)\n`;
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if n > 0 then
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` lda $sp, {emit_int n}($sp)\n`;
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liveregs i live_26;
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` br {emit_symbol s}\n`
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end
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| Lop(Iextcall(s, alloc)) ->
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if alloc then begin
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` lda $27, {emit_symbol s}\n`;
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liveregs i live_27;
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`{record_frame i.live} bsr caml_c_call\n`
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(* caml_c_call preserves $gp *)
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end else begin
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` jsr {emit_symbol s}\n`;
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if !uses_gp then
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` ldgp $gp, 0($26)\n`
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end
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| Lop(Istackoffset n) ->
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` lda $sp, {emit_int (-n)}($sp)\n`;
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stack_offset := !stack_offset + n
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| Lop(Iload(chunk, addr)) ->
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let load_instr =
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match chunk with
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Word -> if i.res.(0).typ = Float then "ldt" else "ldq"
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| Byte_unsigned -> "ldbu"
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| Byte_signed -> "ldb"
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| Sixteen_unsigned -> "ldwu"
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| Sixteen_signed -> "ldw" in
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` {emit_string load_instr} {emit_reg i.res.(0)}, {emit_addressing addr i.arg 0}\n`
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| Lop(Istore(chunk, addr)) ->
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let store_instr =
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match chunk with
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Word -> if i.arg.(0).typ = Float then "stt" else "stq"
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| Byte_unsigned | Byte_signed -> "stb"
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| Sixteen_unsigned | Sixteen_signed -> "stw" in
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` {emit_string store_instr} {emit_reg i.arg.(0)}, {emit_addressing addr i.arg 1}\n`
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| Lop(Ialloc n) ->
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if !fastcode_flag then begin
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let lbl_cont = new_label() in
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` subq $13, {emit_int n}, $13\n`;
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` cmpult $13, $14, $25\n`;
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let lbl_call_gc = new_label() in
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let lbl_frame = record_frame_label i.live in
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` bne $25, {emit_label lbl_call_gc}\n`;
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call_gc_sites :=
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{ gc_lbl = lbl_call_gc;
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gc_return_lbl = lbl_cont;
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gc_desired_size = n;
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gc_frame = lbl_frame;
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gc_instr = i } :: !call_gc_sites;
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`{emit_label lbl_cont}: addq $13, 8, {emit_reg i.res.(0)}\n`
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end else begin
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begin match n with
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16 -> liveregs i 0;
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`{record_frame i.live} bsr caml_alloc1\n`
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| 24 -> liveregs i 0;
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`{record_frame i.live} bsr caml_alloc2\n`
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| 32 -> liveregs i 0;
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`{record_frame i.live} bsr caml_alloc3\n`
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| _ -> ` ldiq $25, {emit_int n}\n`;
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liveregs i live_25;
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`{record_frame i.live} bsr caml_alloc\n`
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end;
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` addq $13, 8, {emit_reg i.res.(0)}\n`
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end
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| Lop(Iintop(Icomp cmp)) ->
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let (comp, test) = name_for_int_comparison cmp in
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` {emit_string comp} {emit_reg i.arg.(0)}, {emit_reg i.arg.(1)}, {emit_reg i.res.(0)}\n`;
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if not test then
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` xor {emit_reg i.res.(0)}, 1, {emit_reg i.res.(0)}\n`
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| Lop(Iintop(Icheckbound)) ->
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if !range_check_trap = 0 then range_check_trap := new_label();
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` cmpule {emit_reg i.arg.(0)}, {emit_reg i.arg.(1)}, $25\n`;
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` bne $25, {emit_label !range_check_trap}\n`
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| Lop(Iintop op) ->
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let instr = name_for_int_operation op in
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` {emit_string instr} {emit_reg i.arg.(0)}, {emit_reg i.arg.(1)}, {emit_reg i.res.(0)}\n`
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| Lop(Iintop_imm(Idiv, n)) when n = 1 lsl (Misc.log2 n) ->
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let l = Misc.log2 n in
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` addq {emit_reg i.arg.(0)}, {emit_int(n-1)}, $25\n`;
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` cmovge {emit_reg i.arg.(0)}, {emit_reg i.arg.(0)}, $25\n`;
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` sra $25, {emit_int l}, {emit_reg i.res.(0)}\n`
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| Lop(Iintop_imm(Imod, n)) when n = 1 lsl (Misc.log2 n) ->
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let l = Misc.log2 n in
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` and {emit_reg i.arg.(0)}, {emit_int(n-1)}, $25\n`;
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` subq $25, {emit_int n}, $24\n`;
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` cmovge {emit_reg i.arg.(0)}, $25, $24\n`;
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` cmoveq $25, $25, $24\n`;
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` mov $24, {emit_reg i.res.(0)}\n`
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| Lop(Iintop_imm(Icomp cmp, n)) ->
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let (comp, test) = name_for_int_comparison cmp in
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` {emit_string comp} {emit_reg i.arg.(0)}, {emit_int n}, {emit_reg i.res.(0)}\n`;
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if not test then
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` xor {emit_reg i.res.(0)}, 1, {emit_reg i.res.(0)}\n`
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| Lop(Iintop_imm(Icheckbound, n)) ->
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if !range_check_trap = 0 then range_check_trap := new_label();
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` cmpule {emit_reg i.arg.(0)}, {emit_int n}, $25\n`;
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` bne $25, {emit_label !range_check_trap}\n`
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| Lop(Iintop_imm(op, n)) ->
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let instr = name_for_int_operation op in
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` {emit_string instr} {emit_reg i.arg.(0)}, {emit_int n}, {emit_reg i.res.(0)}\n`
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| Lop(Iaddf | Isubf | Imulf | Idivf as op) ->
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let instr = name_for_float_operation op in
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` {emit_string instr} {emit_reg i.arg.(0)}, {emit_reg i.arg.(1)}, {emit_reg i.res.(0)}\n`
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| Lop(Ifloatofint) ->
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` lda $sp, -8($sp)\n`;
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` stq {emit_reg i.arg.(0)}, 0($sp)\n`;
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` ldt $f30, 0($sp)\n`;
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` cvtqt $f30, {emit_reg i.res.(0)}\n`;
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` lda $sp, 8($sp)\n`
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| Lop(Iintoffloat) ->
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` lda $sp, -8($sp)\n`;
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` cvttqc {emit_reg i.arg.(0)}, $f30\n`;
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` stt $f30, 0($sp)\n`;
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` ldq {emit_reg i.res.(0)}, 0($sp)\n`;
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` lda $sp, 8($sp)\n`
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| Lop(Ispecific sop) ->
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let instr = name_for_specific_operation sop in
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` {emit_string instr} {emit_reg i.arg.(0)}, {emit_reg i.arg.(1)}, {emit_reg i.res.(0)}\n`
|
|
| Lreloadretaddr ->
|
|
let n = frame_size() in
|
|
` ldq $26, {emit_int(n - 8)}($sp)\n`
|
|
| Lreturn ->
|
|
let n = frame_size() in
|
|
if !uses_gp then
|
|
` ldq $gp, {emit_int(n - 16)}($sp)\n`;
|
|
if n > 0 then
|
|
` lda $sp, {emit_int n}($sp)\n`;
|
|
liveregs i 0;
|
|
` ret ($26)\n`
|
|
| Llabel lbl ->
|
|
`{emit_label lbl}:\n`
|
|
| Lbranch lbl ->
|
|
` br {emit_label lbl}\n`
|
|
| Lcondbranch(tst, lbl) ->
|
|
begin match tst with
|
|
Itruetest ->
|
|
` bne {emit_reg i.arg.(0)}, {emit_label lbl}\n`
|
|
| Ifalsetest ->
|
|
` beq {emit_reg i.arg.(0)}, {emit_label lbl}\n`
|
|
| Iinttest cmp ->
|
|
let (comp, test) = name_for_int_comparison cmp in
|
|
` {emit_string comp} {emit_reg i.arg.(0)}, {emit_reg i.arg.(1)}, $25\n`;
|
|
if test then
|
|
` bne $25, {emit_label lbl}\n`
|
|
else
|
|
` beq $25, {emit_label lbl}\n`
|
|
| Iinttest_imm(cmp, 0) ->
|
|
let branch = name_for_int_cond_branch cmp in
|
|
` {emit_string branch} {emit_reg i.arg.(0)}, {emit_label lbl}\n`
|
|
| Iinttest_imm(cmp, n) ->
|
|
let (comp, test) = name_for_int_comparison cmp in
|
|
` {emit_string comp} {emit_reg i.arg.(0)}, {emit_int n}, $25\n`;
|
|
if test then
|
|
` bne $25, {emit_label lbl}\n`
|
|
else
|
|
` beq $25, {emit_label lbl}\n`
|
|
| Ifloattest(cmp, neg) ->
|
|
let (comp, swap, test) = name_for_float_comparison cmp neg in
|
|
` {emit_string comp} `;
|
|
if swap
|
|
then `{emit_reg i.arg.(1)}, {emit_reg i.arg.(0)}, $f30\n`
|
|
else `{emit_reg i.arg.(0)}, {emit_reg i.arg.(1)}, $f30\n`;
|
|
if test
|
|
then ` fbeq $f30, {emit_label lbl}\n`
|
|
else ` fbne $f30, {emit_label lbl}\n`
|
|
| Ioddtest ->
|
|
` blbs {emit_reg i.arg.(0)}, {emit_label lbl}\n`
|
|
| Ieventest ->
|
|
` blbc {emit_reg i.arg.(0)}, {emit_label lbl}\n`
|
|
end
|
|
| Lcondbranch3(lbl0, lbl1, lbl2) ->
|
|
begin match lbl0 with
|
|
None -> ()
|
|
| Some lbl -> ` beq {emit_reg i.arg.(0)}, {emit_label lbl}\n`
|
|
end;
|
|
begin match lbl1 with
|
|
None -> ()
|
|
| Some lbl -> ` blbs {emit_reg i.arg.(0)}, {emit_label lbl}\n`
|
|
end;
|
|
begin match lbl2 with
|
|
None -> ()
|
|
| Some lbl ->
|
|
if lbl0 <> None then
|
|
` blbc {emit_reg i.arg.(0)}, {emit_label lbl}\n`
|
|
else if lbl1 <> None then
|
|
` bne {emit_reg i.arg.(0)}, {emit_label lbl}\n`
|
|
else begin
|
|
` subq {emit_reg i.arg.(0)}, 2, $25\n`;
|
|
` beq $25, {emit_label lbl}\n`
|
|
end
|
|
end
|
|
| Lswitch jumptbl ->
|
|
let lbl_jump = new_label() in
|
|
` br $25, {emit_label lbl_jump}\n`;
|
|
for i = 0 to Array.length jumptbl - 1 do
|
|
` br {emit_label jumptbl.(i)}\n`
|
|
done;
|
|
`{emit_label lbl_jump}: s4addq {emit_reg i.arg.(0)}, $25, $25\n`;
|
|
` jmp ($25)\n`
|
|
| Lsetuptrap lbl ->
|
|
` br $25, {emit_label lbl}\n`;
|
|
if !uses_gp then
|
|
` ldgp $gp, 0($27)\n`
|
|
| Lpushtrap ->
|
|
stack_offset := !stack_offset + 16;
|
|
` lda $sp, -16($sp)\n`;
|
|
` stq $15, 0($sp)\n`;
|
|
` stq $25, 8($sp)\n`;
|
|
` mov $sp, $15\n`
|
|
| Lpoptrap ->
|
|
` ldq $15, 0($sp)\n`;
|
|
` lda $sp, 16($sp)\n`;
|
|
stack_offset := !stack_offset - 16
|
|
| Lraise ->
|
|
` mov $15, $sp\n`;
|
|
` ldq $15, 0($sp)\n`;
|
|
` ldq $27, 8($sp)\n`;
|
|
` lda $sp, 16($sp)\n`;
|
|
liveregs i 0;
|
|
` jmp $25, ($27)\n` (* Keep retaddr in $25 for debugging *)
|
|
|
|
let rec emit_all i =
|
|
match i.desc with Lend -> () | _ -> emit_instr i; emit_all i.next
|
|
|
|
(* Emission of a function declaration *)
|
|
|
|
let fundecl fundecl =
|
|
function_name := fundecl.fun_name;
|
|
fastcode_flag := fundecl.fun_fast;
|
|
tailrec_entry_point := new_label();
|
|
stack_offset := 0;
|
|
call_gc_sites := [];
|
|
uses_gp := instr_uses_gp fundecl.fun_body;
|
|
if !uses_gp then contains_calls := true;
|
|
range_check_trap := 0;
|
|
` .text\n`;
|
|
` .align 4\n`;
|
|
` .globl {emit_symbol fundecl.fun_name}\n`;
|
|
` .ent {emit_symbol fundecl.fun_name}\n`;
|
|
`{emit_symbol fundecl.fun_name}:\n`;
|
|
let n = frame_size() in
|
|
if n > 0 then
|
|
` lda $sp, -{emit_int n}($sp)\n`;
|
|
if !uses_gp then begin
|
|
` stq $gp, {emit_int(n - 16)}($sp)\n`;
|
|
let lbl = new_label() in
|
|
` br $27, {emit_label lbl}\n`;
|
|
`{emit_label lbl}: ldgp $gp, 0($27)\n`
|
|
end;
|
|
if !contains_calls then
|
|
` stq $26, {emit_int(n - 8)}($sp)\n`;
|
|
`{emit_label !tailrec_entry_point}:\n`;
|
|
emit_all fundecl.fun_body;
|
|
List.iter emit_call_gc !call_gc_sites;
|
|
if !range_check_trap > 0 then
|
|
`{emit_label !range_check_trap}: br call_array_bound_error\n`;
|
|
` .end {emit_symbol fundecl.fun_name}\n`
|
|
|
|
(* Emission of data *)
|
|
|
|
let emit_item = function
|
|
Cdefine_symbol s ->
|
|
` .globl {emit_symbol s}\n`;
|
|
`{emit_symbol s}:\n`
|
|
| Cdefine_label lbl ->
|
|
`{emit_label (10000 + lbl)}:\n`
|
|
| Cint8 n ->
|
|
` .byte {emit_int n}\n`
|
|
| Cint16 n ->
|
|
` .word {emit_int n}\n`
|
|
| Cint n ->
|
|
` .quad {emit_int n}\n`
|
|
| Cintlit n ->
|
|
` .quad {emit_string n}\n`
|
|
| Cfloat f ->
|
|
` .double {emit_string f}\n`
|
|
| Csymbol_address s ->
|
|
` .quad {emit_symbol s}\n`
|
|
| Clabel_address lbl ->
|
|
` .quad {emit_label (10000 + lbl)}\n`
|
|
| Cstring s ->
|
|
let l = String.length s in
|
|
if l = 0 then ()
|
|
else if l < 80 then
|
|
` .ascii {emit_string_literal s}\n`
|
|
else begin
|
|
let i = ref 0 in
|
|
while !i < l do
|
|
let n = min (l - !i) 80 in
|
|
` .ascii {emit_string_literal(String.sub s !i n)}\n`;
|
|
i := !i + n
|
|
done
|
|
end
|
|
| Cskip n ->
|
|
if n > 0 then ` .space {emit_int n}\n`
|
|
| Calign n ->
|
|
` .align {emit_int(Misc.log2 n)}\n`
|
|
|
|
let data l =
|
|
` .data\n`;
|
|
List.iter emit_item l
|
|
|
|
(* Beginning / end of an assembly file *)
|
|
|
|
let begin_assembly() =
|
|
(* There are really two groups of registers:
|
|
$sp and $15 always point to stack locations
|
|
$0 - $14, $16-$23 never point to stack locations. *)
|
|
` .noalias $0,$sp; .noalias $0,$15; .noalias $1,$sp; .noalias $1,$15\n`;
|
|
` .noalias $2,$sp; .noalias $2,$15; .noalias $3,$sp; .noalias $3,$15\n`;
|
|
` .noalias $4,$sp; .noalias $4,$15; .noalias $5,$sp; .noalias $5,$15\n`;
|
|
` .noalias $6,$sp; .noalias $6,$15; .noalias $7,$sp; .noalias $7,$15\n`;
|
|
` .noalias $8,$sp; .noalias $8,$15; .noalias $9,$sp; .noalias $9,$15\n`;
|
|
` .noalias $10,$sp; .noalias $10,$15; .noalias $11,$sp; .noalias $11,$15\n`;
|
|
` .noalias $12,$sp; .noalias $12,$15; .noalias $13,$sp; .noalias $13,$15\n`;
|
|
` .noalias $14,$sp; .noalias $14,$15; .noalias $16,$sp; .noalias $16,$15\n`;
|
|
` .noalias $17,$sp; .noalias $17,$15; .noalias $18,$sp; .noalias $18,$15\n`;
|
|
` .noalias $19,$sp; .noalias $19,$15; .noalias $20,$sp; .noalias $20,$15\n`;
|
|
` .noalias $21,$sp; .noalias $21,$15; .noalias $22,$sp; .noalias $22,$15\n`;
|
|
` .noalias $23,$sp; .noalias $23,$15\n\n`;
|
|
(* The following .file directive is intended to prevent the generation
|
|
of line numbers for the debugger, 'cos they make .o files larger
|
|
and slow down linking. *)
|
|
` .file 1 \"{emit_string !Location.input_name}\"\n\n`;
|
|
let lbl_begin = Compilenv.current_unit_name() ^ "_begin" in
|
|
` .data\n`;
|
|
` .globl {emit_symbol lbl_begin}\n`;
|
|
`{emit_symbol lbl_begin}:\n`
|
|
|
|
let end_assembly () =
|
|
let lbl_end = Compilenv.current_unit_name() ^ "_end" in
|
|
` .data\n`;
|
|
` .globl {emit_symbol lbl_end}\n`;
|
|
`{emit_symbol lbl_end}:\n`;
|
|
` .quad 0\n`;
|
|
let lbl_frame = Compilenv.current_unit_name() ^ "_frametable" in
|
|
` .rdata\n`;
|
|
` .globl {emit_symbol lbl_frame}\n`;
|
|
`{emit_symbol lbl_frame}:\n`;
|
|
` .quad {emit_int (List.length !frame_descriptors)}\n`;
|
|
List.iter emit_frame !frame_descriptors;
|
|
frame_descriptors := []
|