628 lines
21 KiB
Plaintext
628 lines
21 KiB
Plaintext
(***********************************************************************)
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(* *)
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(* Objective Caml *)
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(* *)
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(* Xavier Leroy, projet Cristal, INRIA Rocquencourt *)
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(* *)
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(* Copyright 1996 Institut National de Recherche en Informatique et *)
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(* Automatique. Distributed only by permission. *)
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(* *)
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(***********************************************************************)
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(* $Id$ *)
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(* Emission of Mips assembly code *)
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open Misc
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open Cmm
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open Arch
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open Proc
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open Reg
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open Mach
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open Linearize
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open Emitaux
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(* Determine whether we're emitting PIC code (IRIX -32 model)
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or absolute code *)
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let pic =
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match Config.system with
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"ultrix" -> false
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| "irix" -> true
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| _ -> fatal_error "Emit_mips.pic"
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(* Tradeoff between code size and code speed *)
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let fastcode_flag = ref true
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(* Output a label *)
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let emit_label lbl =
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emit_string "$"; emit_int lbl
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(* Output a symbol *)
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let emit_symbol s =
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Emitaux.emit_symbol '$' s
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(* Output a pseudo-register *)
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let emit_reg r =
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match r.loc with
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Reg r -> emit_string (register_name r)
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| _ -> fatal_error "Emit_mips.emit_reg"
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(* Output the other half of a floating-point pseudo-register *)
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let float_reg_twin_name = [|
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(* 100-104 *) "$f1"; "$f3"; "$f5"; "$f7"; "$f9";
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(* 105-108 *) "$f13"; "$f15"; "$f17"; "$f19";
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(* 109-114 *) "$f21"; "$f23"; "$f25"; "$f27"; "$f29"; "$f31"
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|]
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let emit_twin_reg = function
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{ loc = Reg r; typ = Float } -> emit_string (float_reg_twin_name.(r - 100))
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| _ -> fatal_error "Emit_mips.emit_twin_reg"
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let emit_lower_reg = if big_endian then emit_twin_reg else emit_reg
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let emit_upper_reg = if big_endian then emit_reg else emit_twin_reg
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(* Record if $gp is needed (in PIC mode) *)
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let uses_gp = ref false
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(* Layout of the stack frame *)
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let stack_offset = ref 0
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let frame_size () =
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let size =
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!stack_offset +
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4 * num_stack_slots.(0) + 8 * num_stack_slots.(1) +
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(if !contains_calls then if !uses_gp then 8 else 4 else 0) in
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Misc.align size 8
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let slot_offset loc cl =
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match loc with
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Incoming n -> frame_size() + n
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| Local n ->
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if cl = 0
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then !stack_offset + num_stack_slots.(1) * 8 + n * 4
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else !stack_offset + n * 8
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| Outgoing n -> n
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(* Output a stack reference *)
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let emit_stack r =
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match r.loc with
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Stack s ->
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let ofs = slot_offset s (register_class r) in `{emit_int ofs}($sp)`
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| _ -> fatal_error "Emit_mips.emit_stack"
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(* Output an addressing mode *)
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let emit_addressing addr r n =
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match addr with
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Iindexed ofs ->
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`{emit_int ofs}({emit_reg r.(n)})`
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| Ibased(s, 0) ->
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`{emit_symbol s}`
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| Ibased(s, ofs) ->
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`{emit_symbol s} + {emit_int ofs}`
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(* Communicate live registers at call points to the assembler *)
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let int_reg_number = [|
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2; 3; 4; 5; 6; 7; 8; 9; 10; 11; 12; 13; 14; 15; 16; 17; 18; 19; 20; 21
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|]
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let float_reg_number = [|
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0; 2; 4; 6; 8; 12; 14; 16; 18; 20; 22; 24; 26; 28; 30
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|]
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let liveregs instr extra_msk =
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(* The .livereg directive is not supported by old Ultrix versions of
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the MIPS assembler... *)
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if pic then begin
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(* $22, $23, $30 always live *)
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let int_mask = ref(0x00000302 lor extra_msk)
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and float_mask = ref 0 in
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let add_register = function
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{loc = Reg r; typ = (Int | Addr)} ->
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int_mask :=
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!int_mask lor (1 lsl (31 - int_reg_number.(r)))
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| {loc = Reg r; typ = Float} ->
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float_mask :=
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!float_mask lor (3 lsl (31 - float_reg_number.(r - 100)))
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| _ -> () in
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Reg.Set.iter add_register instr.live;
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Array.iter add_register instr.arg;
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emit_printf " .livereg 0x%08x, 0x%08x\n" !int_mask !float_mask
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end
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let live_24 = 1 lsl (31 - 24)
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(* Record live pointers at call points *)
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type frame_descr =
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{ fd_lbl: int; (* Return address *)
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fd_frame_size: int; (* Size of stack frame *)
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fd_live_offset: int list } (* Offsets/regs of live addresses *)
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let frame_descriptors = ref([] : frame_descr list)
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let record_frame live =
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let lbl = new_label() in
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let live_offset = ref [] in
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Reg.Set.iter
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(function
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{typ = Addr; loc = Reg r} ->
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live_offset := ((int_reg_number.(r) lsl 1) + 1) :: !live_offset
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| {typ = Addr; loc = Stack s} as reg ->
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live_offset := slot_offset s (register_class reg) :: !live_offset
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| _ -> ())
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live;
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frame_descriptors :=
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{ fd_lbl = lbl;
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fd_frame_size = frame_size();
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fd_live_offset = !live_offset } :: !frame_descriptors;
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`{emit_label lbl}:`
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let emit_frame fd =
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` .word {emit_label fd.fd_lbl}\n`;
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` .half {emit_int fd.fd_frame_size}\n`;
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` .half {emit_int (List.length fd.fd_live_offset)}\n`;
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List.iter
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(fun n ->
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` .half {emit_int n}\n`)
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fd.fd_live_offset;
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` .align 2\n`
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(* In PIC mode, determine if $gp is used in the function *)
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let rec instr_uses_gp i =
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match i.desc with
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Lend -> false
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| Lop(Iconst_symbol s) -> true
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| Lop(Icall_imm s) -> true
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| Lop(Itailcall_imm s) -> true
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| Lop(Iextcall(_, _)) -> true
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| Lop(Iload(_, Ibased(_, _))) -> true
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| Lop(Istore(_, Ibased(_, _))) -> true
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| Lop(Ialloc _) -> true
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| Lop(Iintop(Icheckbound)) -> true
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| Lop(Iintop_imm(Icheckbound, _)) -> true
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| Lswitch jumptbl -> true
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| _ -> instr_uses_gp i.next
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(* Emit code to reload $gp after a jal *)
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let reload_gp () =
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if !uses_gp then
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` lw $gp, {emit_int(frame_size() - 8)}($sp)\n`
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(* Emit a branch to an external symbol. *)
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let emit_branch_symbol s =
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if not pic then
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` j {emit_symbol s}\n`
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else begin
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` la $25, {emit_symbol s}\n`;
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` j $25\n`
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end
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(* Names of various instructions *)
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let name_for_comparison = function
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Isigned Ceq -> "eq" | Isigned Cne -> "ne" | Isigned Cle -> "le"
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| Isigned Cge -> "ge" | Isigned Clt -> "lt" | Isigned Cgt -> "gt"
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| Iunsigned Ceq -> "eq" | Iunsigned Cne -> "ne" | Iunsigned Cle -> "leu"
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| Iunsigned Cge -> "geu" | Iunsigned Clt -> "ltu" | Iunsigned Cgt -> "gtu"
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let name_for_float_comparison cmp neg =
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match cmp with
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Ceq -> ("eq", neg) | Cne -> ("eq", not neg)
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| Cle -> ("le", neg) | Cge -> ("ult", not neg)
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| Clt -> ("lt", neg) | Cgt -> ("ule", not neg)
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let name_for_int_operation = function
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Iadd -> "addu"
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| Isub -> "subu"
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| Imul -> "mul"
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| Idiv -> "div"
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| Imod -> "rem"
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| Iand -> "and"
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| Ior -> "or"
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| Ixor -> "xor"
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| Ilsl -> "sll"
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| Ilsr -> "srl"
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| Iasr -> "sra"
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| Icomp cmp -> "s" ^ name_for_comparison cmp
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| _ -> Misc.fatal_error "Emit.name_for_int_operation"
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let name_for_float_operation = function
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Inegf -> "neg.d"
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| Iabsf -> "abs.d"
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| Iaddf -> "add.d"
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| Isubf -> "sub.d"
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| Imulf -> "mul.d"
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| Idivf -> "div.d"
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| _ -> Misc.fatal_error "Emit.name_for_float_operation"
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(* Output the assembly code for an instruction *)
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(* Name of current function *)
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let function_name = ref ""
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(* Entry point for tail recursive calls *)
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let tailrec_entry_point = ref 0
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(* Label of jump to caml_call_gc *)
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let call_gc_label = ref 0
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(* Label of trap for out-of-range accesses *)
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let range_check_trap = ref 0
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let emit_instr i =
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match i.desc with
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Lend -> ()
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| Lop(Imove | Ispill | Ireload) ->
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let src = i.arg.(0) and dst = i.res.(0) in
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if src.loc <> dst.loc then begin
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match (src, dst) with
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{loc = Reg rs; typ = Int|Addr}, {loc = Reg rd; typ = Int|Addr} ->
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` move {emit_reg dst}, {emit_reg src}\n`
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| {loc = Reg rs; typ = Float}, {loc = Reg rd; typ = Float} ->
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` mov.d {emit_reg dst}, {emit_reg src}\n`
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| {loc = Reg rs; typ = Float}, {loc = Reg rd; typ = Int|Addr} ->
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` mfc1.d {emit_reg dst}, {emit_reg src}\n`
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| {loc = Reg rs; typ = Int|Addr}, {loc = Stack sd} ->
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` sw {emit_reg src}, {emit_stack dst}\n`
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| {loc = Reg rs; typ = Float}, {loc = Stack sd} ->
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` s.d {emit_reg src}, {emit_stack dst}\n`
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| {loc = Stack ss; typ = Int|Addr}, {loc = Reg rd} ->
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` lw {emit_reg dst}, {emit_stack src}\n`
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| {loc = Stack ss; typ = Float}, {loc = Reg rd} ->
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` l.d {emit_reg dst}, {emit_stack src}\n`
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| _ ->
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fatal_error "Emit_mips: Imove"
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end
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| Lop(Iconst_int 0) ->
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` move {emit_reg i.res.(0)}, $0\n`
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| Lop(Iconst_int n) ->
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` li {emit_reg i.res.(0)}, {emit_int n}\n`
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| Lop(Iconst_float s) ->
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` li.d {emit_reg i.res.(0)}, {emit_string s}\n`
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| Lop(Iconst_symbol s) ->
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` la {emit_reg i.res.(0)}, {emit_symbol s}\n`
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| Lop(Icall_ind) ->
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liveregs i 0;
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if pic then
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` move $25, {emit_reg i.arg.(0)}\n`;
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` jal {emit_reg i.arg.(0)}\n`;
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`{record_frame i.live}\n`;
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reload_gp()
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| Lop(Icall_imm s) ->
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liveregs i 0;
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` jal {emit_symbol s}\n`;
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`{record_frame i.live}\n`;
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reload_gp()
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| Lop(Itailcall_ind) ->
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let n = frame_size() in
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if !contains_calls then
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` lw $31, {emit_int(n - 4)}($sp)\n`;
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if n > 0 then
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` addu $sp, $sp, {emit_int n}\n`;
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liveregs i 0;
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if pic then
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` move $25, {emit_reg i.arg.(0)}\n`;
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` j {emit_reg i.arg.(0)}\n`
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| Lop(Itailcall_imm s) ->
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if s = !function_name then begin
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` b {emit_label !tailrec_entry_point}\n`
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end else begin
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let n = frame_size() in
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if !contains_calls then
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` lw $31, {emit_int(n - 4)}($sp)\n`;
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if n > 0 then
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` addu $sp, $sp, {emit_int n}\n`;
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liveregs i 0;
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emit_branch_symbol s
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end
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| Lop(Iextcall(s, alloc)) ->
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if alloc then begin
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` la $24, {emit_symbol s}\n`;
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liveregs i live_24;
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` jal caml_c_call\n`;
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`{record_frame i.live}\n`
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end else begin
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` jal {emit_symbol s}\n`
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end;
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reload_gp()
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| Lop(Istackoffset n) ->
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if n >= 0 then
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` subu $sp, $sp, {emit_int n}\n`
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else
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` addu $sp, $sp, {emit_int (-n)}\n`;
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stack_offset := !stack_offset + n
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| Lop(Iload(chunk, addr)) ->
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begin match i.res.(0).typ with
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Int | Addr ->
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let load_instr =
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match chunk with
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Word -> "lw"
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| Byte_unsigned -> "lbu"
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| Byte_signed -> "lb"
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| Sixteen_unsigned -> "lhu"
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| Sixteen_signed -> "lh" in
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` {emit_string load_instr} {emit_reg i.res.(0)}, {emit_addressing addr i.arg 0}\n`
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| Float ->
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(* Destination is not necessarily 8-aligned, hence better not use l.d *)
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` lwc1 {emit_lower_reg i.res.(0)}, {emit_addressing addr i.arg 0}\n`;
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` lwc1 {emit_upper_reg i.res.(0)}, {emit_addressing (offset_addressing addr 4) i.arg 0}\n`
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end
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| Lop(Istore(chunk, addr)) ->
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begin match i.arg.(0).typ with
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Int | Addr ->
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let store_instr =
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match chunk with
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Word -> "sw"
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| Byte_unsigned | Byte_signed -> "sb"
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| Sixteen_unsigned | Sixteen_signed -> "sh" in
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` {emit_string store_instr} {emit_reg i.arg.(0)}, {emit_addressing addr i.arg 1}\n`
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| Float ->
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(* Destination is not necessarily 8-aligned, hence better not use s.d *)
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` swc1 {emit_lower_reg i.arg.(0)}, {emit_addressing addr i.arg 1}\n`;
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` swc1 {emit_upper_reg i.arg.(0)}, {emit_addressing (offset_addressing addr 4) i.arg 1}\n`
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end
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| Lop(Ialloc n) ->
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if pic or !fastcode_flag then begin
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if !call_gc_label = 0 then call_gc_label := new_label();
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` .set noreorder\n`;
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` subu $22, $22, {emit_int n}\n`;
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` subu $24, $22, $23\n`;
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` bltzal $24, {emit_label !call_gc_label}\n`;
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` addu {emit_reg i.res.(0)}, $22, 4\n`;
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`{record_frame i.live}\n`;
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` .set reorder\n`
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end else begin
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begin match n with
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8 -> liveregs i 0;
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` jal caml_alloc1\n`
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| 12 -> liveregs i 0;
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` jal caml_alloc2\n`
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| 16 -> liveregs i 0;
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` jal caml_alloc3\n`
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| _ -> ` li $24, {emit_int n}\n`;
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liveregs i live_24;
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` jal caml_alloc\n`
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end;
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`{record_frame i.live}\n`;
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` addu {emit_reg i.res.(0)}, $22, 4\n`
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end
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| Lop(Iintop(Icheckbound)) ->
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if !range_check_trap = 0 then range_check_trap := new_label();
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` bleu {emit_reg i.arg.(0)}, {emit_reg i.arg.(1)}, {emit_label !range_check_trap}\n`
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| Lop(Iintop op) ->
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let instr = name_for_int_operation op in
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` {emit_string instr} {emit_reg i.res.(0)}, {emit_reg i.arg.(0)}, {emit_reg i.arg.(1)}\n`
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| Lop(Iintop_imm(Icheckbound, n)) ->
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if !range_check_trap = 0 then range_check_trap := new_label();
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` bleu {emit_reg i.arg.(0)}, {emit_int n}, {emit_label !range_check_trap}\n`
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| Lop(Iintop_imm(op, n)) ->
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let instr = name_for_int_operation op in
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` {emit_string instr} {emit_reg i.res.(0)}, {emit_reg i.arg.(0)}, {emit_int n}\n`
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| Lop(Inegf | Iabsf as op) ->
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let instr = name_for_float_operation op in
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` {emit_string instr} {emit_reg i.res.(0)}, {emit_reg i.arg.(0)}\n`
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| Lop(Iaddf | Isubf | Imulf | Idivf as op) ->
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let instr = name_for_float_operation op in
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` {emit_string instr} {emit_reg i.res.(0)}, {emit_reg i.arg.(0)}, {emit_reg i.arg.(1)}\n`
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| Lop(Ifloatofint) ->
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` mtc1 {emit_reg i.arg.(0)}, {emit_reg i.res.(0)}\n`;
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` cvt.d.w {emit_reg i.res.(0)}, {emit_reg i.res.(0)}\n`
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| Lop(Iintoffloat) ->
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` trunc.w.d $f10, {emit_reg i.arg.(0)}, $24\n`;
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` mfc1 {emit_reg i.res.(0)}, $f10\n`
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| Lop(Ispecific sop) ->
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fatal_error "Emit_mips: Ispecific"
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| Lreloadretaddr ->
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let n = frame_size() in
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` lw $31, {emit_int(n - 4)}($sp)\n`
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| Lreturn ->
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let n = frame_size() in
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if n > 0 then
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` addu $sp, $sp, {emit_int n}\n`;
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liveregs i 0;
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` j $31\n`
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| Llabel lbl ->
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`{emit_label lbl}:\n`
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| Lbranch lbl ->
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` b {emit_label lbl}\n`
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| Lcondbranch(tst, lbl) ->
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begin match tst with
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Itruetest ->
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` bne {emit_reg i.arg.(0)}, $0, {emit_label lbl}\n`
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| Ifalsetest ->
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` beq {emit_reg i.arg.(0)}, $0, {emit_label lbl}\n`
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| Iinttest cmp ->
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let comp = name_for_comparison cmp in
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` b{emit_string comp} {emit_reg i.arg.(0)}, {emit_reg i.arg.(1)}, {emit_label lbl}\n`
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| Iinttest_imm(cmp, n) ->
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let comp = name_for_comparison cmp in
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` b{emit_string comp} {emit_reg i.arg.(0)}, {emit_int n}, {emit_label lbl}\n`
|
|
| Ifloattest(cmp, neg) ->
|
|
let (comp, branch) = name_for_float_comparison cmp neg in
|
|
` c.{emit_string comp}.d {emit_reg i.arg.(0)}, {emit_reg i.arg.(1)}\n`;
|
|
if branch
|
|
then ` bc1f {emit_label lbl}\n`
|
|
else ` bc1t {emit_label lbl}\n`
|
|
| Ioddtest ->
|
|
` and $24, {emit_reg i.arg.(0)}, 1\n`;
|
|
` bne $24, $0, {emit_label lbl}\n`
|
|
| Ieventest ->
|
|
` and $24, {emit_reg i.arg.(0)}, 1\n`;
|
|
` beq $24, $0, {emit_label lbl}\n`
|
|
end
|
|
| Lcondbranch3(lbl0, lbl1, lbl2) ->
|
|
` subu $24, {emit_reg i.arg.(0)}, 1\n`;
|
|
begin match lbl0 with
|
|
None -> ()
|
|
| Some lbl -> ` beq {emit_reg i.arg.(0)}, $0, {emit_label lbl}\n`
|
|
end;
|
|
begin match lbl1 with
|
|
None -> ()
|
|
| Some lbl -> ` beq $24, $0, {emit_label lbl}\n`
|
|
end;
|
|
begin match lbl2 with
|
|
None -> ()
|
|
| Some lbl -> ` bgtz $24, {emit_label lbl}\n`
|
|
end
|
|
| Lswitch jumptbl ->
|
|
let lbl_jumptbl = new_label() in
|
|
` sll $24, {emit_reg i.arg.(0)}, 2\n`;
|
|
` lw $24, {emit_label lbl_jumptbl}($24)\n`;
|
|
if pic then
|
|
` .cpadd $24\n`;
|
|
liveregs i live_24;
|
|
` j $24\n`;
|
|
` .rdata\n`;
|
|
`{emit_label lbl_jumptbl}:\n`;
|
|
for i = 0 to Array.length jumptbl - 1 do
|
|
if pic
|
|
then ` .gpword {emit_label jumptbl.(i)}\n`
|
|
else ` .word {emit_label jumptbl.(i)}\n`
|
|
done;
|
|
` .text\n`
|
|
| Lsetuptrap lbl ->
|
|
` subu $sp, $sp, 8\n`;
|
|
` bal {emit_label lbl}\n`;
|
|
reload_gp()
|
|
| Lpushtrap ->
|
|
stack_offset := !stack_offset + 8;
|
|
` sw $30, 0($sp)\n`;
|
|
` sw $31, 4($sp)\n`;
|
|
` move $30, $sp\n`
|
|
| Lpoptrap ->
|
|
` lw $30, 0($sp)\n`;
|
|
` addu $sp, $sp, 8\n`;
|
|
stack_offset := !stack_offset - 8
|
|
| Lraise ->
|
|
` lw $25, 4($30)\n`;
|
|
` move $sp, $30\n`;
|
|
` lw $30, 0($sp)\n`;
|
|
` addu $sp, $sp, 8\n`;
|
|
liveregs i 0;
|
|
` jal $25\n` (* Keep retaddr in $31 for debugging *)
|
|
|
|
let rec emit_all i =
|
|
match i.desc with Lend -> () | _ -> emit_instr i; emit_all i.next
|
|
|
|
(* Emission of a function declaration *)
|
|
|
|
let fundecl fundecl =
|
|
function_name := fundecl.fun_name;
|
|
fastcode_flag := fundecl.fun_fast;
|
|
uses_gp := pic && instr_uses_gp fundecl.fun_body;
|
|
tailrec_entry_point := new_label();
|
|
stack_offset := 0;
|
|
call_gc_label := 0;
|
|
range_check_trap := 0;
|
|
` .text\n`;
|
|
` .align 2\n`;
|
|
` .globl {emit_symbol fundecl.fun_name}\n`;
|
|
` .ent {emit_symbol fundecl.fun_name}\n`;
|
|
`{emit_symbol fundecl.fun_name}:\n`;
|
|
if !uses_gp then begin
|
|
` .set noreorder\n`;
|
|
` .cpload $25\n`;
|
|
` .set reorder\n`
|
|
end;
|
|
let n = frame_size() in
|
|
if n > 0 then
|
|
` subu $sp, $sp, {emit_int n}\n`;
|
|
if !contains_calls then
|
|
` sw $31, {emit_int(n - 4)}($sp)\n`;
|
|
if !uses_gp && !contains_calls then
|
|
` sw $gp, {emit_int(n - 8)}($sp)\n`;
|
|
`{emit_label !tailrec_entry_point}:\n`;
|
|
emit_all fundecl.fun_body;
|
|
if !call_gc_label > 0 then begin
|
|
`{emit_label !call_gc_label}:\n`;
|
|
emit_branch_symbol "caml_call_gc"
|
|
end;
|
|
if !range_check_trap > 0 then begin
|
|
`{emit_label !range_check_trap}:\n`;
|
|
emit_branch_symbol "array_bound_error"
|
|
end;
|
|
` .end {emit_symbol fundecl.fun_name}\n`
|
|
|
|
(* Emission of data *)
|
|
|
|
let emit_item = function
|
|
Cdefine_symbol s ->
|
|
` .globl {emit_symbol s}\n`;
|
|
`{emit_symbol s}:\n`
|
|
| Cdefine_label lbl ->
|
|
`{emit_label (10000 + lbl)}:\n`
|
|
| Cint8 n ->
|
|
` .byte {emit_int n}\n`
|
|
| Cint16 n ->
|
|
` .half {emit_int n}\n`
|
|
| Cint n ->
|
|
` .word {emit_int n}\n`
|
|
| Cintlit s ->
|
|
` .word {emit_string s}\n`
|
|
| Cfloat f ->
|
|
` .align 0\n`; (* Prevent alignment on 8-byte boundary *)
|
|
` .double {emit_string f}\n`
|
|
| Csymbol_address s ->
|
|
` .word {emit_symbol s}\n`
|
|
| Clabel_address lbl ->
|
|
` .word {emit_label (10000 + lbl)}\n`
|
|
| Cstring s ->
|
|
emit_string_directive " .ascii " s
|
|
| Cskip n ->
|
|
if n > 0 then ` .space {emit_int n}\n`
|
|
| Calign n ->
|
|
` .align {emit_int(Misc.log2 n)}\n`
|
|
|
|
let data l =
|
|
` .data\n`;
|
|
List.iter emit_item l
|
|
|
|
(* Beginning / end of an assembly file *)
|
|
|
|
let begin_assembly() =
|
|
(* There are really two groups of registers:
|
|
$sp and $30 always point to stack locations
|
|
$2 - $21 never point to stack locations. *)
|
|
` .noalias $2,$sp; .noalias $2,$30; .noalias $3,$sp; .noalias $3,$30\n`;
|
|
` .noalias $4,$sp; .noalias $4,$30; .noalias $5,$sp; .noalias $5,$30\n`;
|
|
` .noalias $6,$sp; .noalias $6,$30; .noalias $7,$sp; .noalias $7,$30\n`;
|
|
` .noalias $8,$sp; .noalias $8,$30; .noalias $9,$sp; .noalias $9,$30\n`;
|
|
` .noalias $10,$sp; .noalias $10,$30; .noalias $11,$sp; .noalias $11,$30\n`;
|
|
` .noalias $12,$sp; .noalias $12,$30; .noalias $13,$sp; .noalias $13,$30\n`;
|
|
` .noalias $14,$sp; .noalias $14,$30; .noalias $15,$sp; .noalias $15,$30\n`;
|
|
` .noalias $16,$sp; .noalias $16,$30; .noalias $17,$sp; .noalias $17,$30\n`;
|
|
` .noalias $18,$sp; .noalias $18,$30; .noalias $19,$sp; .noalias $19,$30\n`;
|
|
` .noalias $20,$sp; .noalias $20,$30; .noalias $21,$sp; .noalias $21,$30\n\n`;
|
|
(* The following .file directive is intended to prevent the generation
|
|
of line numbers for the debugger, since they make .o files larger. *)
|
|
` .file 1 \"{emit_string !Location.input_name}\"\n\n`;
|
|
let lbl_begin = Compilenv.current_unit_name() ^ "_begin" in
|
|
` .data\n`;
|
|
` .globl {emit_symbol lbl_begin}\n`;
|
|
`{emit_symbol lbl_begin}:\n`
|
|
|
|
let end_assembly () =
|
|
let lbl_end = Compilenv.current_unit_name() ^ "_end" in
|
|
` .data\n`;
|
|
` .globl {emit_symbol lbl_end}\n`;
|
|
`{emit_symbol lbl_end}:\n`;
|
|
` .word 0\n`;
|
|
let lbl = Compilenv.current_unit_name() ^ "_frametable" in
|
|
` .rdata\n`;
|
|
` .globl {emit_symbol lbl}\n`;
|
|
`{emit_symbol lbl}:\n`;
|
|
` .word {emit_int (List.length !frame_descriptors)}\n`;
|
|
List.iter emit_frame !frame_descriptors;
|
|
frame_descriptors := []
|