66 lines
2.2 KiB
OCaml
66 lines
2.2 KiB
OCaml
(***********************************************************************)
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(* *)
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(* Objective Caml *)
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(* *)
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(* Xavier Leroy, projet Cristal, INRIA Rocquencourt *)
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(* *)
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(* Copyright 1996 Institut National de Recherche en Informatique et *)
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(* en Automatique. All rights reserved. This file is distributed *)
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(* under the terms of the Q Public License version 1.0. *)
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(* *)
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(***********************************************************************)
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(* $Id$ *)
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open Cmm
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open Mach
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(* Instruction scheduling for the Sparc *)
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class scheduler = object
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inherit Schedgen.scheduler_generic
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(* Latencies (in cycles). *)
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(* UltraSPARC issues two integer operations, plus a single load or store,
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per cycle. At most one of the integer instructions may be a shift.
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Most integer operations have one cycle latency. Unsigned loads take
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two cycles. Signed loads take three cycles. Conditional moves have
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two cycle latency and may not issue in the same cycle as any other
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instruction. Floating point issue rules are complicated, but in
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general independent add and multiply can dual issue with four cycle
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latency. *)
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method oper_latency = function
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Ireload -> 2
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| Iload((Byte_signed|Sixteen_signed|Thirtytwo_signed), _) -> 3
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| Iload(_, _) -> 2
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| Iconst_float _ -> 2 (* turned into a load *)
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| Inegf | Iabsf | Iaddf | Isubf | Imulf -> 4
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| Idivf -> 15
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| _ -> 1
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(* Issue cycles. Rough approximations. *)
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method oper_issue_cycles = function
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Iconst_float _ -> 2
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| Iconst_symbol _ -> 2
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| Ialloc _ -> 6
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| Iintop(Icomp _) -> 4
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| Iintop(Icheckbound) -> 2
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| Iintop_imm(Idiv, _) -> 5
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| Iintop_imm(Imod, _) -> 5
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| Iintop_imm(Icomp _, _) -> 4
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| Iintop_imm(Icheckbound, _) -> 2
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| Inegf -> 2
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| Iabsf -> 2
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| Ifloatofint -> 6
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| Iintoffloat -> 6
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| _ -> 1
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end
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let fundecl f = (new scheduler)#schedule_fundecl f
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