359 lines
12 KiB
OCaml
359 lines
12 KiB
OCaml
(***********************************************************************)
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(* *)
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(* Objective Caml *)
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(* *)
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(* Xavier Leroy, projet Cristal, INRIA Rocquencourt *)
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(* *)
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(* Copyright 1996 Institut National de Recherche en Informatique et *)
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(* en Automatique. All rights reserved. This file is distributed *)
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(* under the terms of the Q Public License version 1.0. *)
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(* *)
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(***********************************************************************)
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(* $Id$ *)
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(* Instruction scheduling *)
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open Misc
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open Reg
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open Mach
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open Linearize
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(* Representation of the code DAG. *)
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type code_dag_node =
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{ instr: instruction; (* The instruction *)
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delay: int; (* How many cycles before result is available *)
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mutable sons: (code_dag_node * int) list;
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(* Instructions that depend on it *)
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mutable date: int; (* Start date *)
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mutable length: int; (* Length of longest path to result *)
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mutable ancestors: int; (* Number of ancestors *)
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mutable emitted_ancestors: int } (* Number of emitted ancestors *)
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let dummy_node =
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{ instr = end_instr; delay = 0; sons = []; date = 0;
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length = -1; ancestors = 0; emitted_ancestors = 0 }
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(* The code dag itself is represented by two tables from registers to nodes:
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- "results" maps registers to the instructions that produced them;
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- "uses" maps registers to the instructions that use them.
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In addition:
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- code_stores contains the latest store nodes emitted so far
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- code_loads contains all load nodes emitted since the last store
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- code_checkbounds contains the latest checkbound node not matched
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by a subsequent load or store. *)
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let code_results = (Hashtbl.create 31 : (location, code_dag_node) Hashtbl.t)
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let code_uses = (Hashtbl.create 31 : (location, code_dag_node) Hashtbl.t)
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let code_stores = ref ([] : code_dag_node list)
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let code_loads = ref ([] : code_dag_node list)
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let code_checkbounds = ref ([] : code_dag_node list)
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let clear_code_dag () =
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Hashtbl.clear code_results;
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Hashtbl.clear code_uses;
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code_stores := [];
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code_loads := [];
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code_checkbounds := []
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(* Add an edge to the code DAG *)
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let add_edge ancestor son delay =
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ancestor.sons <- (son, delay) :: ancestor.sons;
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son.ancestors <- son.ancestors + 1
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let add_edge_after son ancestor = add_edge ancestor son 0
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(* Compute length of longest path to a result.
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For leafs of the DAG, see whether their result is used in the instruction
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immediately following the basic block (a "critical" output). *)
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let is_critical critical_outputs results =
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try
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for i = 0 to Array.length results - 1 do
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let r = results.(i).loc in
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for j = 0 to Array.length critical_outputs - 1 do
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if critical_outputs.(j).loc = r then raise Exit
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done
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done;
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false
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with Exit ->
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true
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let rec longest_path critical_outputs node =
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if node.length < 0 then begin
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match node.sons with
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[] ->
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node.length <-
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if is_critical critical_outputs node.instr.res
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or node.instr.desc = Lreloadretaddr (* alway critical *)
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then node.delay
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else 0
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| sons ->
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node.length <-
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List.fold_left
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(fun len (son, delay) ->
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max len (longest_path critical_outputs son + delay))
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0 sons
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end;
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node.length
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(* Remove an instruction from the ready queue *)
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let rec remove_instr node = function
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[] -> []
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| instr :: rem ->
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if instr == node then rem else instr :: remove_instr node rem
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(* We treat Lreloadretaddr as a word-sized load *)
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let some_load = (Iload(Cmm.Word, Arch.identity_addressing))
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(* The generic scheduler *)
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class virtual scheduler_generic = object (self)
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(* Determine whether an operation ends a basic block or not.
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Can be overriden for some processors to signal specific instructions
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that terminate a basic block. *)
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method oper_in_basic_block = function
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Icall_ind -> false
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| Icall_imm _ -> false
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| Itailcall_ind -> false
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| Itailcall_imm _ -> false
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| Iextcall(_, _) -> false
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| Istackoffset _ -> false
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| Ialloc _ -> false
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| _ -> true
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(* Determine whether an instruction ends a basic block or not *)
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method private instr_in_basic_block instr =
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match instr.desc with
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Lop op -> self#oper_in_basic_block op
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| Lreloadretaddr -> true
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| _ -> false
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(* Determine whether an operation is a memory store or a memory load.
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Can be overriden for some processors to signal specific
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load or store instructions (e.g. on the I386). *)
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method is_store = function
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Istore(_, _) -> true
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| _ -> false
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method is_load = function
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Iload(_, _) -> true
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| _ -> false
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method is_checkbound = function
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Iintop Icheckbound -> true
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| Iintop_imm(Icheckbound, _) -> true
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| _ -> false
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method private instr_is_store instr =
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match instr.desc with
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Lop op -> self#is_store op
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| _ -> false
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method private instr_is_load instr =
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match instr.desc with
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Lop op -> self#is_load op
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| _ -> false
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method private instr_is_checkbound instr =
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match instr.desc with
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Lop op -> self#is_checkbound op
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| _ -> false
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(* Estimate the latency of an operation. *)
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method virtual oper_latency : Mach.operation -> int
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(* Estimate the latency of a Lreloadretaddr operation. *)
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method reload_retaddr_latency = self#oper_latency some_load
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(* Estimate the delay needed to evaluate an instruction *)
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method private instr_latency instr =
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match instr.desc with
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Lop op -> self#oper_latency op
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| Lreloadretaddr -> self#reload_retaddr_latency
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| _ -> assert false
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(* Estimate the number of cycles consumed by emitting an operation. *)
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method virtual oper_issue_cycles : Mach.operation -> int
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(* Estimate the number of cycles consumed by emitting a Lreloadretaddr. *)
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method reload_retaddr_issue_cycles = self#oper_issue_cycles some_load
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(* Estimate the number of cycles consumed by emitting an instruction. *)
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method private instr_issue_cycles instr =
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match instr.desc with
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Lop op -> self#oper_issue_cycles op
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| Lreloadretaddr -> self#reload_retaddr_issue_cycles
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| _ -> assert false
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(* Add an instruction to the code dag *)
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method private add_instruction ready_queue instr =
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let delay = self#instr_latency instr in
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let node =
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{ instr = instr;
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delay = delay;
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sons = [];
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date = 0;
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length = -1;
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ancestors = 0;
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emitted_ancestors = 0 } in
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(* Add edges from all instructions that define one of the registers used
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(RAW dependencies) *)
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for i = 0 to Array.length instr.arg - 1 do
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try
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let ancestor = Hashtbl.find code_results instr.arg.(i).loc in
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add_edge ancestor node ancestor.delay
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with Not_found ->
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()
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done;
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(* Also add edges from all instructions that use one of the result regs
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of this instruction (WAR dependencies). *)
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for i = 0 to Array.length instr.res - 1 do
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let ancestors = Hashtbl.find_all code_uses instr.res.(i).loc in
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List.iter (add_edge_after node) ancestors
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done;
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(* Also add edges from all instructions that have already defined one
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of the results of this instruction (WAW dependencies). *)
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for i = 0 to Array.length instr.res - 1 do
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try
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let ancestor = Hashtbl.find code_results instr.res.(i).loc in
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add_edge ancestor node 0
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with Not_found ->
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()
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done;
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(* If this is a load, add edges from the most recent store viewed so
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far (if any) and remember the load. Also add edges from the most
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recent checkbound and forget that checkbound. *)
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if self#instr_is_load instr then begin
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List.iter (add_edge_after node) !code_stores;
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code_loads := node :: !code_loads;
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List.iter (add_edge_after node) !code_checkbounds;
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code_checkbounds := []
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end
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(* If this is a store, add edges from the most recent store,
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as well as all loads viewed since then, and also the most recent
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checkbound. Remember the store,
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discarding the previous stores, loads and checkbounds. *)
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else if self#instr_is_store instr then begin
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List.iter (add_edge_after node) !code_stores;
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List.iter (add_edge_after node) !code_loads;
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List.iter (add_edge_after node) !code_checkbounds;
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code_stores := [node];
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code_loads := [];
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code_checkbounds := []
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end
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else if self#instr_is_checkbound instr then begin
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code_checkbounds := [node]
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end;
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(* Remember the registers used and produced by this instruction *)
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for i = 0 to Array.length instr.res - 1 do
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Hashtbl.add code_results instr.res.(i).loc node
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done;
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for i = 0 to Array.length instr.arg - 1 do
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Hashtbl.add code_uses instr.arg.(i).loc node
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done;
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(* If this is a root instruction (all arguments already computed),
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add it to the ready queue *)
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if node.ancestors = 0 then node :: ready_queue else ready_queue
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(* Given a list of instructions and a date, choose one or several
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that are ready to be computed (start date <= current date)
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and that we can emit in one cycle. Favor instructions with
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maximal distance to result. If we can't find any, return None.
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This does not take multiple issues into account, though. *)
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method private ready_instruction date queue =
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let rec extract best = function
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[] ->
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if best == dummy_node then None else Some best
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| instr :: rem ->
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let new_best =
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if instr.date <= date && instr.length > best.length
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then instr else best in
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extract new_best rem in
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extract dummy_node queue
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(* Schedule a basic block, adding its instructions in front of the given
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instruction sequence *)
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method private reschedule ready_queue date cont =
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if ready_queue = [] then cont else begin
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match self#ready_instruction date ready_queue with
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None ->
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self#reschedule ready_queue (date + 1) cont
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| Some node ->
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(* Remove node from queue *)
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let new_queue = ref (remove_instr node ready_queue) in
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(* Update the start date and number of ancestors emitted of
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all descendents of this node. Enter those that become ready
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in the queue. *)
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let issue_cycles = self#instr_issue_cycles node.instr in
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List.iter
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(fun (son, delay) ->
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let completion_date = date + issue_cycles + delay - 1 in
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if son.date < completion_date then son.date <- completion_date;
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son.emitted_ancestors <- son.emitted_ancestors + 1;
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if son.emitted_ancestors = son.ancestors then
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new_queue := son :: !new_queue)
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node.sons;
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instr_cons node.instr.desc node.instr.arg node.instr.res
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(self#reschedule !new_queue (date + issue_cycles) cont)
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end
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(* Entry point *)
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(* Don't bother to schedule for initialization code and the like. *)
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method schedule_fundecl f =
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let rec schedule i =
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match i.desc with
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Lend -> i
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| _ ->
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if self#instr_in_basic_block i then begin
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clear_code_dag();
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schedule_block [] i
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end else
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{ desc = i.desc; arg = i.arg; res = i.res; live = i.live;
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next = schedule i.next }
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and schedule_block ready_queue i =
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if self#instr_in_basic_block i then
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schedule_block (self#add_instruction ready_queue i) i.next
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else begin
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let critical_outputs =
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match i.desc with
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Lop(Icall_ind | Itailcall_ind) -> [| i.arg.(0) |]
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| Lop(Icall_imm _ | Itailcall_imm _ | Iextcall(_, _)) -> [||]
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| Lreturn -> [||]
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| _ -> i.arg in
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List.iter (fun x -> let len = longest_path critical_outputs x in ())
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ready_queue;
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self#reschedule ready_queue 0 (schedule i)
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end in
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if f.fun_fast then begin
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let new_body = schedule f.fun_body in
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clear_code_dag();
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{ fun_name = f.fun_name;
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fun_body = new_body;
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fun_fast = f.fun_fast }
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end else
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f
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end
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