226 lines
6.7 KiB
OCaml
226 lines
6.7 KiB
OCaml
(***********************************************************************)
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(* *)
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(* Objective Caml *)
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(* *)
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(* Xavier Leroy, projet Cristal, INRIA Rocquencourt *)
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(* *)
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(* Copyright 1996 Institut National de Recherche en Informatique et *)
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(* en Automatique. All rights reserved. This file is distributed *)
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(* under the terms of the Q Public License version 1.0. *)
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(* *)
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(***********************************************************************)
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(* $Id$ *)
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(* Description of the Sparc processor *)
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open Misc
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open Cmm
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open Reg
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open Arch
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open Mach
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(* Instruction selection *)
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let word_addressed = false
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(* Registers available for register allocation *)
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(* Register map:
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%o0 - %o5 0 - 5 function results, C functions args / res
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%i0 - %i5 6 - 11 function arguments, preserved by C
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%l0 - %l4 12 - 16 general purpose, preserved by C
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%g3 - %g4 17 - 18 general purpose, not preserved by C
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%l5 exception pointer
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%l6 allocation pointer
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%l7 address of allocation limit
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%g0 always zero
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%g1 - %g2 temporaries
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%g5 - %g7 reserved for system libraries
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%f0 - %f10 100 - 105 function arguments and results
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%f12 - %f28 106 - 114 general purpose
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%f30 temporary *)
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let int_reg_name = [|
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(* 0-5 *) "%o0"; "%o1"; "%o2"; "%o3"; "%o4"; "%o5";
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(* 6-11 *) "%i0"; "%i1"; "%i2"; "%i3"; "%i4"; "%i5";
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(* 12-16 *) "%l0"; "%l1"; "%l2"; "%l3"; "%l4";
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(* 17-18 *) "%g3"; "%g4"
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|]
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let float_reg_name = [|
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(* 100-105 *) "%f0"; "%f2"; "%f4"; "%f6"; "%f8"; "%f10";
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(* 106-109 *) "%f12"; "%f14"; "%f16"; "%f18";
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(* 110-114 *) "%f20"; "%f22"; "%f24"; "%f26"; "%f28";
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(* 115 *) "%f30";
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(* Odd parts of register pairs *)
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(* 116-121 *) "%f1"; "%f3"; "%f5"; "%f7"; "%f9"; "%f11";
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(* 122-125 *) "%f13"; "%f15"; "%f17"; "%f19";
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(* 126-130 *) "%f21"; "%f23"; "%f25"; "%f27"; "%f29";
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(* 131 *) "%f31"
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|]
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let num_register_classes = 2
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let register_class r =
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match r.typ with
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Int -> 0
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| Addr -> 0
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| Float -> 1
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let num_available_registers = [| 19; 15 |]
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let first_available_register = [| 0; 100 |]
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let register_name r =
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if r < 100 then int_reg_name.(r) else float_reg_name.(r - 100)
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let rotate_registers = true
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(* Representation of hard registers by pseudo-registers *)
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let hard_int_reg =
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let v = Array.create 19 Reg.dummy in
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for i = 0 to 18 do v.(i) <- Reg.at_location Int (Reg i) done;
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v
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let hard_float_reg =
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let v = Array.create 32 Reg.dummy in
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for i = 0 to 31 do v.(i) <- Reg.at_location Float (Reg(100 + i)) done;
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v
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let all_phys_regs =
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Array.append hard_int_reg (Array.sub hard_float_reg 0 15)
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(* No need to include the odd parts of float register pairs,
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nor the temporary register %f30 *)
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let phys_reg n =
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if n < 100 then hard_int_reg.(n) else hard_float_reg.(n - 100)
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let stack_slot slot ty =
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Reg.at_location ty (Stack slot)
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(* Calling conventions *)
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let calling_conventions first_int last_int first_float last_float make_stack
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arg =
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let loc = Array.create (Array.length arg) Reg.dummy in
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let int = ref first_int in
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let float = ref first_float in
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let ofs = ref 0 in
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for i = 0 to Array.length arg - 1 do
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match arg.(i).typ with
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Int | Addr as ty ->
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if !int <= last_int then begin
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loc.(i) <- phys_reg !int;
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incr int
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end else begin
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loc.(i) <- stack_slot (make_stack !ofs) ty;
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ofs := !ofs + size_int
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end
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| Float ->
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if !float <= last_float then begin
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loc.(i) <- phys_reg !float;
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incr float
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end else begin
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loc.(i) <- stack_slot (make_stack !ofs) Float;
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ofs := !ofs + size_float
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end
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done;
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(loc, Misc.align !ofs 8) (* Keep stack 8-aligned *)
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let incoming ofs = Incoming ofs
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let outgoing ofs = Outgoing ofs
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let not_supported ofs = fatal_error "Proc.loc_results: cannot call"
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let loc_arguments arg =
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calling_conventions 6 15 100 105 outgoing arg
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let loc_parameters arg =
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let (loc, ofs) = calling_conventions 6 15 100 105 incoming arg in loc
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let loc_results res =
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let (loc, ofs) = calling_conventions 0 5 100 105 not_supported res in loc
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(* On the Sparc, all arguments to C functions, even floating-point arguments,
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are passed in %o0..%o5, then on the stack *)
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let loc_external_arguments arg =
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let loc = ref [] in
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let reg = ref 0 (* %o0 *) in
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let ofs = ref (-4) in (* start at sp + 92 = sp + 96 - 4 *)
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for i = 0 to Array.length arg - 1 do
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if !reg <= 5 (* %o5 *) then begin
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match arg.(i).typ with
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Int | Addr ->
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loc := phys_reg !reg :: !loc;
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incr reg
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| Float ->
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if !reg = 5 then fatal_error "Proc_sparc: cannot call";
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loc := phys_reg (!reg + 1) :: phys_reg !reg :: !loc;
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reg := !reg + 2
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end else begin
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loc := stack_slot (outgoing !ofs) arg.(i).typ :: !loc;
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ofs := !ofs + size_component arg.(i).typ
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end
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done;
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(* Keep stack 8-aligned *)
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(Array.of_list(List.rev !loc), Misc.align (!ofs + 4) 8)
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let loc_external_results res =
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let (loc, ofs) = calling_conventions 0 0 100 100 not_supported res in loc
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let loc_exn_bucket = phys_reg 0 (* $o0 *)
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(* Registers destroyed by operations *)
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let destroyed_at_c_call = (* %l0-%l4, %i0-%i5 preserved *)
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Array.of_list(List.map phys_reg
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[0; 1; 2; 3; 4; 5; 17; 18;
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100; 101; 102; 103; 104; 105; 106; 107;
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108; 109; 110; 111; 112; 113; 114])
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let destroyed_at_oper = function
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Iop(Icall_ind | Icall_imm _ | Iextcall(_, true)) -> all_phys_regs
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| Iop(Iextcall(_, false)) -> destroyed_at_c_call
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| _ -> [||]
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let destroyed_at_raise = all_phys_regs
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(* Maximal register pressure *)
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let safe_register_pressure = function
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Iextcall(_, _) -> 0
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| _ -> 15
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let max_register_pressure = function
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Iextcall(_, _) -> [| 11; 0 |]
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| _ -> [| 19; 15 |]
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(* Latencies (in cycles). Wild guesses. *)
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let need_scheduling = true
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let oper_latency = function
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Ireload -> 3
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| Iload(_, _) -> 3
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| Iconst_float _ -> 3 (* turned into a load *)
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| Iaddf | Isubf -> 3
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| Imulf -> 5
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| Idivf -> 15
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| _ -> 1
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(* Layout of the stack *)
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let num_stack_slots = [| 0; 0 |]
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let contains_calls = ref false
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(* Calling the assembler and the archiver *)
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let assemble_file infile outfile =
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Ccomp.command ("as -o " ^ Filename.quote outfile ^ " " ^ Filename.quote infile)
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open Clflags;;
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open Config;;
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