52 lines
1.7 KiB
OCaml
52 lines
1.7 KiB
OCaml
(* Processor descriptions *)
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(* The Use_default exception is raised by the selection and reloading
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functions to signal cases they don't handle *)
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exception Use_default
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(* Instruction selection *)
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val select_addressing:
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Cmm.expression -> Arch.addressing_mode * Cmm.expression
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val select_oper:
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Cmm.operation -> Cmm.expression list ->
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Mach.operation * Cmm.expression
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val pseudoregs_for_operation:
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Mach.operation -> Reg.t array -> Reg.t array ->
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Reg.t array * Reg.t array
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val is_immediate: int -> bool
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(* Registers available for register allocation *)
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val num_register_classes: int
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val register_class: Reg.t -> int
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val num_available_registers: int array
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val first_available_register: int array
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val register_name: int -> string
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val phys_reg: int -> Reg.t
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(* Calling conventions *)
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val loc_arguments: Reg.t array -> Reg.t array * int
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val loc_results: Reg.t array -> Reg.t array
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val loc_parameters: Reg.t array -> Reg.t array
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val loc_external_arguments: Reg.t array -> Reg.t array * int
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val loc_external_results: Reg.t array -> Reg.t array
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val loc_exn_bucket: Reg.t
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(* Registers destroyed by operations *)
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val destroyed_at_oper: Mach.instruction_desc -> Reg.t array
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val destroyed_at_call: Reg.t array
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val destroyed_at_extcall: Reg.t array
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val destroyed_at_raise: Reg.t array
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(* Reloading of instruction arguments, storing of instruction results *)
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val reload_test: (Reg.t -> Reg.t) -> Mach.test -> Reg.t array -> Reg.t array
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val reload_operation:
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(Reg.t -> Reg.t) -> Mach.operation -> Reg.t array -> Reg.t array ->
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Reg.t array * Reg.t array
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(* Layout of the stack frame *)
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val num_stack_slots: int array
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val stack_offset: int ref
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val contains_calls: bool ref
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val frame_size: unit -> int
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val slot_offset: Reg.stack_location -> int -> int
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