214 lines
7.2 KiB
OCaml
214 lines
7.2 KiB
OCaml
(***********************************************************************)
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(* *)
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(* Objective Caml *)
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(* *)
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(* Xavier Leroy, projet Cristal, INRIA Rocquencourt *)
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(* *)
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(* Copyright 2000 Institut National de Recherche en Informatique et *)
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(* en Automatique. All rights reserved. This file is distributed *)
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(* under the terms of the Q Public License version 1.0. *)
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(* *)
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(***********************************************************************)
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(* $Id$ *)
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(* Description of the IA64 processor *)
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open Misc
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open Cmm
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open Reg
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open Arch
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open Mach
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(* Instruction selection *)
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let word_addressed = false
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(* Registers available for register allocation *)
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(* Register map:
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r0 always 0
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r1 global pointer (gp)
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r2 - r3 temporaries (for the code generator)
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r4 allocation pointer
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r5 allocation limit
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r6 trap pointer
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r7 saved gp during C calls (preserved by C)
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r8 - r11 0 - 3 function results
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r12 stack pointer
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r13 reserved by C (thread-specific data)
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r14 - r15 80 - 81 temporaries (for accessing stack variables)
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r16 - r31 4 - 19 general purpose
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r32 - r63 20 - 51 function arguments
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r64 - r91 52 - 79 general purpose
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r92 - r95 used by C glue code
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We do not use register windows, but instead allocate 64 "out" registers
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(r32-r95) when entering Caml code.
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f0 always 0.0
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f1 always 1.0
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f2 - f5 100 - 103 general purpose (preserved by C)
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f6 - f7 104 - 105 general purpose
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f8 - f15 106 - 113 function results
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f16 - f31 114 - 129 function arguments (preserved by C)
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f32 - f63 130 - 161 general purpose
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f64 - f66 temporaries
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f67 - f127 unused
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*)
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let int_reg_name = [|
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(* 0-3 *) "r8"; "r9"; "r10"; "r11";
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(* 4-19 *) "r16"; "r17"; "r18"; "r19"; "r20"; "r21"; "r22"; "r23";
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"r24"; "r25"; "r26"; "r27"; "r28"; "r29"; "r30"; "r31";
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(* 20-51 *) "r32"; "r33"; "r34"; "r35"; "r36"; "r37"; "r38"; "r39";
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"r40"; "r41"; "r42"; "r43"; "r44"; "r45"; "r46"; "r47";
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"r48"; "r49"; "r50"; "r51"; "r52"; "r53"; "r54"; "r55";
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"r56"; "r57"; "r58"; "r59"; "r60"; "r61"; "r62"; "r63";
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(* 52-79 *) "r64"; "r65"; "r66"; "r67"; "r68"; "r69"; "r70"; "r71";
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"r72"; "r73"; "r74"; "r75"; "r76"; "r77"; "r78"; "r79";
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"r80"; "r81"; "r82"; "r83"; "r84"; "r85"; "r86"; "r87";
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"r88"; "r89"; "r90"; "r91";
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(* 80-81 *) "r14"; "r15"
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|]
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let float_reg_name = [|
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(* 0-13 *) "f2"; "f3"; "f4"; "f5"; "f6"; "f7";
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"f8"; "f9"; "f10"; "f11"; "f12"; "f13"; "f14"; "f15";
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(* 14-29 *) "f16"; "f17"; "f18"; "f19"; "f20"; "f21"; "f22"; "f23";
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"f24"; "f25"; "f26"; "f27"; "f28"; "f29"; "f30"; "f31";
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(* 30-61 *) "f32"; "f33"; "f34"; "f35"; "f36"; "f37"; "f38"; "f39";
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"f40"; "f41"; "f42"; "f43"; "f44"; "f45"; "f46"; "f47";
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"f48"; "f49"; "f50"; "f51"; "f52"; "f53"; "f54"; "f55";
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"f56"; "f57"; "f58"; "f59"; "f60"; "f61"; "f62"; "f63"
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|]
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let num_register_classes = 2
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let register_class r =
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match r.typ with
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Int -> 0
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| Addr -> 0
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| Float -> 1
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let num_available_registers = [| 80; 62 |]
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let first_available_register = [| 0; 100 |]
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let register_name r =
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if r < 100 then int_reg_name.(r) else float_reg_name.(r - 100)
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let rotate_registers = true
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(* Representation of hard registers by pseudo-registers *)
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let hard_int_reg =
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let v = Array.create 82 Reg.dummy in
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for i = 0 to 81 do v.(i) <- Reg.at_location Int (Reg i) done;
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v
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let hard_float_reg =
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let v = Array.create 62 Reg.dummy in
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for i = 0 to 61 do v.(i) <- Reg.at_location Float (Reg(100 + i)) done;
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v
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let all_phys_regs =
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Array.append hard_int_reg hard_float_reg
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let phys_reg n =
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if n < 100 then hard_int_reg.(n) else hard_float_reg.(n - 100)
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let stack_slot slot ty =
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Reg.at_location ty (Stack slot)
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(* Calling conventions *)
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let calling_conventions first_int last_int first_float last_float
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lockstep make_stack arg =
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let loc = Array.create (Array.length arg) Reg.dummy in
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let int = ref first_int in
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let float = ref first_float in
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let ofs = ref 0 in
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for i = 0 to Array.length arg - 1 do
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match arg.(i).typ with
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Int | Addr as ty ->
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if !int <= last_int then begin
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loc.(i) <- phys_reg !int;
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incr int;
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if lockstep then incr float
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end else begin
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loc.(i) <- stack_slot (make_stack !ofs) ty;
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ofs := !ofs + size_int
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end
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| Float ->
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if !float <= last_float then begin
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loc.(i) <- phys_reg !float;
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incr float;
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if lockstep then incr int
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end else begin
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loc.(i) <- stack_slot (make_stack !ofs) Float;
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ofs := !ofs + size_float
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end
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done;
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(loc, Misc.align !ofs 16) (* Keep stack 16-aligned *)
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let incoming ofs = Incoming ofs
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let outgoing ofs = Outgoing ofs
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let not_supported ofs = fatal_error "Proc.loc_results: cannot call"
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let loc_arguments arg =
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calling_conventions 20 51 114 129 false outgoing arg
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let loc_parameters arg =
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let (loc, ofs) = calling_conventions 20 51 114 129 false incoming arg in loc
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let loc_results res =
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let (loc, ofs) = calling_conventions 0 3 106 113 false not_supported res
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in loc
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(* Arguments in r32...r39, f8...f15
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Results in r8...r11, f8...f15 *)
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let loc_external_arguments arg =
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calling_conventions 20 27 106 113 true outgoing arg
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let loc_external_results res =
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let (loc, ofs) = calling_conventions 0 3 106 113 false not_supported res
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in loc
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let extcall_use_push = false
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let loc_exn_bucket = phys_reg 0 (* r8 *)
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(* Registers destroyed by operations *)
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let destroyed_at_c_call = (* f2...f5, f16...f31 preserved by C *)
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Array.append
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hard_int_reg
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(Array.of_list(List.map phys_reg
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[100;101;102;103;104;105;106;107;108;109;110;111;112;113;
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130;131;132;133;134;135;136;137;138;139;
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140;141;142;143;144;145;146;147;148;149;
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150;151;152;153;154;155;156;157;158;159;
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160;161]))
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let destroyed_at_oper = function
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Iop(Icall_ind | Icall_imm _ | Iextcall(_, true)) -> all_phys_regs
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| Iop(Iextcall(_, false)) -> destroyed_at_c_call
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| _ -> [||]
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let destroyed_at_raise = all_phys_regs
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(* Maximal register pressure *)
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let safe_register_pressure = function
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Iextcall(_, _) -> 0
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| _ -> 62
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let max_register_pressure = function
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Iextcall(_, _) -> [| 0; 20 |]
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| _ -> num_available_registers
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(* Layout of the stack *)
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let num_stack_slots = [| 0; 0 |]
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let contains_calls = ref false
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(* Calling the assembler *)
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let assemble_file infile outfile =
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Ccomp.command ("as -xexplicit -o " ^ outfile ^ " " ^ infile)
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