359 lines
11 KiB
OCaml
359 lines
11 KiB
OCaml
(***********************************************************************)
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(* *)
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(* Objective Caml *)
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(* *)
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(* Xavier Leroy, projet Cristal, INRIA Rocquencourt *)
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(* *)
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(* Copyright 1996 Institut National de Recherche en Informatique et *)
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(* Automatique. Distributed only by permission. *)
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(* *)
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(***********************************************************************)
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(* $Id$ *)
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(* Description of the Power PC *)
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open Misc
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open Cmm
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open Reg
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open Arch
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open Mach
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(* Distinguish between the PowerPC and the Power/RS6000 submodels *)
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let powerpc =
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match Config.model with
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"ppc" -> true
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| "rs6000" -> false
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| _ -> fatal_error "wrong $(MODEL)"
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(* Distinguish between the PowerOpen (AIX, MacOS) relative-addressing model
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and the SVR4 (Solaris, MkLinux) absolute-addressing model. *)
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let svr4 =
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match Config.system with
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"aix" -> false
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| "elf" -> true
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| _ -> fatal_error "wrong $(SYSTEM)"
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(* Exceptions raised to signal cases not handled here *)
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exception Use_default
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(* Recognition of addressing modes *)
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type addressing_expr =
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Asymbol of string
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| Alinear of expression
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| Aadd of expression * expression
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let rec select_addr = function
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Cconst_symbol s when svr4 -> (* don't recognize this mode in the TOC-based model *)
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(Asymbol s, 0)
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| Cop((Caddi | Cadda), [arg; Cconst_int m]) ->
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let (a, n) = select_addr arg in (a, n + m)
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| Cop((Caddi | Cadda), [Cconst_int m; arg]) ->
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let (a, n) = select_addr arg in (a, n + m)
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| Cop((Caddi | Cadda), [arg1; arg2]) ->
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begin match (select_addr arg1, select_addr arg2) with
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((Alinear e1, n1), (Alinear e2, n2)) ->
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(Aadd(e1, e2), n1 + n2)
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| _ ->
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(Aadd(arg1, arg2), 0)
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end
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| exp ->
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(Alinear exp, 0)
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let select_addressing exp =
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match select_addr exp with
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(Asymbol s, d) ->
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(Ibased(s, d), Ctuple [])
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| (Alinear e, d) ->
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(Iindexed d, e)
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| (Aadd(e1, e2), d) ->
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if d = 0
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then (Iindexed2, Ctuple[e1; e2])
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else (Iindexed d, Cop(Cadda, [e1; e2]))
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(* Instruction selection *)
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let select_logical op = function
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[arg; Cconst_int n] when n >= 0 & n <= 0xFFFF ->
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(Iintop_imm(op, n), [arg])
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| [Cconst_int n; arg] when n >= 0 & n <= 0xFFFF ->
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(Iintop_imm(op, n), [arg])
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| args ->
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(Iintop op, args)
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let select_oper op args =
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match (op, args) with
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(* Prevent the recognition of (x / cst) and (x % cst) when cst is not
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a power of 2, which do not correspond to an instruction. *)
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(Cdivi, [arg; Cconst_int n]) when n = 1 lsl (Misc.log2 n) ->
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(Iintop_imm(Idiv, n), [arg])
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| (Cdivi, _) ->
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(Iintop Idiv, args)
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| (Cmodi, [arg; Cconst_int n]) when n = 1 lsl (Misc.log2 n) ->
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(Iintop_imm(Imod, n), [arg])
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| (Cmodi, _) ->
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(Iintop Imod, args)
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(* The and, or and xor instructions have a different range of immediate
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operands than the other instructions *)
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| (Cand, _) -> select_logical Iand args
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| (Cor, _) -> select_logical Ior args
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| (Cxor, _) -> select_logical Ixor args
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(* intoffloat goes through a library function on the RS6000 *)
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| (Cintoffloat, _) when not powerpc ->
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(Iextcall("itrunc", false), args)
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(* Recognize mult-add and mult-sub instructions *)
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| (Caddf, [Cop(Cmulf, [arg1; arg2]); arg3]) ->
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(Ispecific Imultaddf, [arg1; arg2; arg3])
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| (Caddf, [arg3; Cop(Cmulf, [arg1; arg2])]) ->
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(Ispecific Imultaddf, [arg1; arg2; arg3])
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| (Csubf, [Cop(Cmulf, [arg1; arg2]); arg3]) ->
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(Ispecific Imultsubf, [arg1; arg2; arg3])
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| _ ->
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raise Use_default
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let select_store addr exp = raise Use_default
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let select_push exp = fatal_error "Proc: select_push"
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let pseudoregs_for_operation op arg res = raise Use_default
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let is_immediate n = (n <= 32767) & (n >= -32768)
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let word_addressed = false
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(* Registers available for register allocation *)
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(* Integer register map:
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0 temporary, null register for some operations
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1 stack pointer
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2 pointer to table of contents
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3 - 10 function arguments and results
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11 - 12 temporaries
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13 pointer to small data area
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14 - 28 general purpose, preserved by C
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29 trap pointer
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30 allocation limit
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31 allocation pointer
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Floating-point register map:
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0 temporary
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1 - 13 function arguments and results
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14 - 31 general purpose, preserved by C
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*)
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let int_reg_name = [|
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"3"; "4"; "5"; "6"; "7"; "8"; "9"; "10";
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"14"; "15"; "16"; "17"; "18"; "19"; "20"; "21";
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"22"; "23"; "24"; "25"; "26"; "27"; "28"
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|]
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let float_reg_name = [|
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"1"; "2"; "3"; "4"; "5"; "6"; "7"; "8";
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"9"; "10"; "11"; "12"; "13"; "14"; "15"; "16";
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"17"; "18"; "19"; "20"; "21"; "22"; "23"; "24";
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"25"; "26"; "27"; "28"; "29"; "30"; "31" |]
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let num_register_classes = 2
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let register_class r =
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match r.typ with
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Int -> 0
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| Addr -> 0
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| Float -> 1
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let num_available_registers = [| 23; 31 |]
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let first_available_register = [| 0; 100 |]
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let register_name r =
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if r < 100 then int_reg_name.(r) else float_reg_name.(r - 100)
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let rotate_registers = true
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(* Representation of hard registers by pseudo-registers *)
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let hard_int_reg =
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let v = Array.create 24 Reg.dummy in
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for i = 0 to 23 do v.(i) <- Reg.at_location Int (Reg i) done; v
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let hard_float_reg =
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let v = Array.create 31 Reg.dummy in
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for i = 0 to 30 do v.(i) <- Reg.at_location Float (Reg(100 + i)) done; v
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let all_phys_regs =
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Array.append hard_int_reg hard_float_reg
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let phys_reg n =
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if n < 100 then hard_int_reg.(n) else hard_float_reg.(n - 100)
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let stack_slot slot ty =
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Reg.at_location ty (Stack slot)
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(* Calling conventions *)
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let calling_conventions
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first_int last_int first_float last_float make_stack stack_ofs arg =
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let loc = Array.create (Array.length arg) Reg.dummy in
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let int = ref first_int in
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let float = ref first_float in
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let ofs = ref stack_ofs in
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for i = 0 to Array.length arg - 1 do
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match arg.(i).typ with
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Int | Addr as ty ->
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if !int <= last_int then begin
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loc.(i) <- phys_reg !int;
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incr int
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end else begin
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loc.(i) <- stack_slot (make_stack !ofs) ty;
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ofs := !ofs + size_int
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end
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| Float ->
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if !float <= last_float then begin
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loc.(i) <- phys_reg !float;
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incr float
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end else begin
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loc.(i) <- stack_slot (make_stack !ofs) Float;
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ofs := !ofs + size_float
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end
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done;
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let final_ofs = if not svr4 && !ofs > 0 then !ofs + 24 else !ofs in
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(loc, Misc.align final_ofs 8)
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(* Keep stack 8-aligned.
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Under PowerOpen, keep a free 24 byte linkage area at the bottom
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if we need to stack-allocate some arguments. *)
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let incoming ofs = Incoming ofs
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let outgoing ofs = Outgoing ofs
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let not_supported ofs = fatal_error "Proc.loc_results: cannot call"
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let loc_arguments arg =
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calling_conventions 0 7 100 112 outgoing 0 arg
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let loc_parameters arg =
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let (loc, ofs) = calling_conventions 0 7 100 112 incoming 0 arg in loc
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let loc_results res =
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let (loc, ofs) = calling_conventions 0 7 100 112 not_supported 0 res in loc
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(* C calling conventions under PowerOpen:
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use GPR 3-10 and FPR 1-13 just like ML calling
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conventions, but always reserve stack space for all arguments.
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Also, using a float register automatically reserves two int registers.
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(If we were to call a non-prototyped C function, each float argument
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would have to go both in a float reg and in the matching pair
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of integer regs.)
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C calling conventions under SVR4:
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use GPR 3-10 and FPR 1-8 just like ML calling conventions.
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Using a float register does not affect the int registers.
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Always reserve 8 bytes at bottom of stack, plus whatever is needed
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to hold the overflow arguments. *)
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let poweropen_external_conventions first_int last_int
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first_float last_float arg =
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let loc = Array.create (Array.length arg) Reg.dummy in
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let int = ref first_int in
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let float = ref first_float in
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let ofs = ref 56 in
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for i = 0 to Array.length arg - 1 do
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match arg.(i).typ with
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Int | Addr as ty ->
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if !int <= last_int then begin
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loc.(i) <- phys_reg !int;
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incr int
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end else begin
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loc.(i) <- stack_slot (Outgoing !ofs) ty;
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ofs := !ofs + size_int
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end
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| Float ->
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if !float <= last_float then begin
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loc.(i) <- phys_reg !float;
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incr float
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end else begin
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loc.(i) <- stack_slot (Outgoing !ofs) Float;
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ofs := !ofs + size_float
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end;
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int := !int + 2
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done;
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(loc, Misc.align !ofs 8) (* Keep stack 8-aligned *)
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let loc_external_arguments arg =
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if svr4
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then calling_conventions 0 7 100 107 outgoing 8 arg
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else poweropen_external_conventions 0 7 100 112 arg
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let extcall_use_push = false
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(* Results are in GPR 3 and FPR 1 *)
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let loc_external_results res =
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let (loc, ofs) = calling_conventions 0 0 100 100 not_supported 0 res in loc
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(* Exceptions are in GPR 3 *)
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let loc_exn_bucket = phys_reg 0
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(* Registers destroyed by operations *)
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let destroyed_at_c_call =
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Array.of_list(List.map phys_reg
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[0; 1; 2; 3; 4; 5; 6; 7;
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100; 101; 102; 103; 104; 105; 106; 107; 108; 109; 110; 111; 112])
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let destroyed_at_oper = function
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Iop(Icall_ind | Icall_imm _ | Iextcall(_, true)) -> all_phys_regs
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| Iop(Iextcall(_, false)) -> destroyed_at_c_call
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| _ -> [||]
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let destroyed_at_raise = all_phys_regs
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(* Maximal register pressure *)
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let safe_register_pressure = function
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Iextcall(_, _) -> 15
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| _ -> 23
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let max_register_pressure = function
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Iextcall(_, _) -> [| 15; 18 |]
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| _ -> [| 23; 30 |]
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(* Reloading *)
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let reload_test makereg round tst args = raise Use_default
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let reload_operation makereg round op args res = raise Use_default
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(* Latencies (in cycles).
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Based on the Motorola 601, with some poetic license. *)
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let need_scheduling = true
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let oper_latency = function
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Ireload -> 2
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| Iload(_, _) -> 2
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| Iconst_float _ -> 2 (* turned into a load *)
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| Iconst_symbol _ -> if svr4 then 1 else 2 (* turned into a load *)
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| Iintop Imul -> 9
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| Iintop_imm(Imul, _) -> 5
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| Iintop(Idiv | Imod) -> 36
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| Iaddf | Isubf -> 4
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| Imulf -> 5
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| Idivf -> 31
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| Ispecific(Imultaddf | Imultsubf) -> 5
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| _ -> 1
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(* Layout of the stack *)
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let num_stack_slots = [| 0; 0 |]
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let contains_calls = ref false
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(* Calling the assembler and the archiver *)
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let assemble_file infile outfile =
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let proc = if powerpc then "ppc" else "pwr" in
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Sys.command ("as -u -m " ^ proc ^ " -o " ^ outfile ^ " " ^ infile)
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let create_archive archive file_list =
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Misc.remove_file archive;
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Sys.command ("ar rc " ^ archive ^ " " ^ String.concat " " file_list)
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