323 lines
10 KiB
OCaml
323 lines
10 KiB
OCaml
(***********************************************************************)
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(* *)
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(* Objective Caml *)
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(* *)
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(* Xavier Leroy, projet Cristal, INRIA Rocquencourt *)
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(* *)
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(* Copyright 1996 Institut National de Recherche en Informatique et *)
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(* Automatique. Distributed only by permission. *)
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(* *)
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(***********************************************************************)
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(* $Id$ *)
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(* Description of the HP PA-RICS processor *)
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open Misc
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open Cmm
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open Reg
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open Arch
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open Mach
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(* Registers available for register allocation *)
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(* Register map:
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%r0 always zero
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%r1 temporary, target of ADDIL
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%r2 return address
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%r3 allocation pointer
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%r4 allocation limit
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%r5 trap pointer
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%r6 - %r26 general purpose
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%r27 global pointer
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%r28 - %r29 general purpose, C function results
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%r30 stack pointer
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%r31 temporary, used by BLE
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%fr0 - %fr3 float status info
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%fr4 - %fr30 general purpose
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%fr31 temporary *)
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let int_reg_name = [|
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(* 0-4 *) "%r6"; "%r7"; "%r8"; "%r9"; "%r10";
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(* 5-10 *) "%r11"; "%r12"; "%r13"; "%r14"; "%r15"; "%r16";
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(* 11-16 *) "%r17"; "%r18"; "%r19"; "%r20"; "%r21"; "%r22";
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(* 17-20 *) "%r23"; "%r24"; "%r25"; "%r26";
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(* 21-22 *) "%r28"; "%r29"
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|]
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let float_reg_name = [|
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(* 100-105 *) "%fr4"; "%fr5"; "%fr6"; "%fr7"; "%fr8"; "%fr9";
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(* 106-111 *) "%fr10"; "%fr11"; "%fr12"; "%fr13"; "%fr14"; "%fr15";
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(* 112-117 *) "%fr16"; "%fr17"; "%fr18"; "%fr19"; "%fr20"; "%fr21";
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(* 118-123 *) "%fr22"; "%fr23"; "%fr24"; "%fr25"; "%fr26"; "%fr27";
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(* 124-126 *) "%fr28"; "%fr29"; "%fr30"
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|]
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let num_register_classes = 2
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let register_class r =
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match r.typ with
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Int -> 0
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| Addr -> 0
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| Float -> 1
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let num_available_registers = [| 23; 27 |]
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let first_available_register = [| 0; 100 |]
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let register_name r =
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if r < 100 then int_reg_name.(r) else float_reg_name.(r - 100)
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let rotate_registers = true
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(* Representation of hard registers by pseudo-registers *)
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let hard_int_reg =
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let v = Array.create 23 Reg.dummy in
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for i = 0 to 22 do v.(i) <- Reg.at_location Int (Reg i) done;
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v
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let hard_float_reg =
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let v = Array.create 27 Reg.dummy in
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for i = 0 to 26 do v.(i) <- Reg.at_location Float (Reg(100 + i)) done;
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v
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let all_phys_regs =
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Array.append hard_int_reg (Array.sub hard_float_reg 0 27)
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(* No need to include the left/right parts of float registers *)
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let phys_reg n =
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if n < 100 then hard_int_reg.(n) else hard_float_reg.(n - 100)
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let stack_slot slot ty =
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Reg.at_location ty (Stack slot)
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(* Exceptions raised to signal cases not handled here *)
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exception Use_default
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(* Recognition of addressing modes *)
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let select_addressing = function
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Cconst_symbol s ->
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(Ibased(s, 0), Ctuple [])
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| Cop(Cadda, [Cconst_symbol s; Cconst_int n]) ->
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(Ibased(s, n), Ctuple [])
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| Cop(Cadda, [arg; Cconst_int n]) ->
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(Iindexed n, arg)
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| Cop(Cadda, [arg1; Cop(Caddi, [arg2; Cconst_int n])]) ->
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(Iindexed n, Cop(Cadda, [arg1; arg2]))
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| arg ->
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(Iindexed 0, arg)
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(* Instruction selection *)
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let shiftadd = function
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2 -> Ishift1add
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| 4 -> Ishift2add
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| 8 -> Ishift3add
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| _ -> fatal_error "Proc_hppa.shiftadd"
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let select_oper op args =
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match (op, args) with
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(* Recognize shift-add operations. *)
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((Caddi|Cadda),
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[arg2; Cop(Clsl, [arg1; Cconst_int(1|2|3 as shift)])]) ->
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(Ispecific(shiftadd(1 lsl shift)), [arg1; arg2])
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| ((Caddi|Cadda),
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[arg2; Cop(Cmuli, [arg1; Cconst_int(2|4|8 as mult)])]) ->
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(Ispecific(shiftadd mult), [arg1; arg2])
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| ((Caddi|Cadda),
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[arg2; Cop(Cmuli, [Cconst_int(2|4|8 as mult); arg1])]) ->
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(Ispecific(shiftadd mult), [arg1; arg2])
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| (Caddi, [Cop(Clsl, [arg1; Cconst_int(1|2|3 as shift)]); arg2]) ->
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(Ispecific(shiftadd(1 lsl shift)), [arg1; arg2])
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| (Caddi, [Cop(Cmuli, [arg1; Cconst_int(2|4|8 as mult)]); arg2]) ->
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(Ispecific(shiftadd mult), [arg1; arg2])
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| (Caddi, [Cop(Cmuli, [Cconst_int(2|4|8 as mult); arg1]); arg2]) ->
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(Ispecific(shiftadd mult), [arg1; arg2])
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(* Prevent the recognition of some immediate arithmetic operations *)
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(* Cmuli : -> Ilsl if power of 2
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Cdivi, Cmodi : only if power of 2
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Cand, Cor, Cxor : never *)
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| (Cmuli, ([arg1; Cconst_int n] as args)) ->
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let l = Misc.log2 n in
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if n = 1 lsl l
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then (Iintop_imm(Ilsl, l), [arg1])
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else (Iintop Imul, args)
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| (Cmuli, ([Cconst_int n; arg1] as args)) ->
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let l = Misc.log2 n in
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if n = 1 lsl l
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then (Iintop_imm(Ilsl, l), [arg1])
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else (Iintop Imul, args)
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| (Cmuli, args) -> (Iintop Imul, args)
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| (Cdivi, [arg1; Cconst_int n]) when n = 1 lsl (Misc.log2 n) ->
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(Iintop_imm(Idiv, n), [arg1])
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| (Cdivi, args) -> (Iintop Idiv, args)
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| (Cmodi, [arg1; Cconst_int n]) when n = 1 lsl (Misc.log2 n) ->
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(Iintop_imm(Imod, n), [arg1])
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| (Cmodi, args) -> (Iintop Imod, args)
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| (Cand, args) -> (Iintop Iand, args)
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| (Cor, args) -> (Iintop Ior, args)
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| (Cxor, args) -> (Iintop Ixor, args)
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| _ -> raise Use_default
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let select_store addr exp = raise Use_default
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let select_push exp = fatal_error "Proc: select_push"
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let pseudoregs_for_operation op arg res =
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match op with
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Iintop(Idiv | Imod) -> (* handled via calls to millicode *)
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([|phys_reg 20; phys_reg 19|], [|phys_reg 22|], true)
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(* %r26, %r25, %r29 *)
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| _ ->
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raise Use_default
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let is_immediate n = (n < 16) & (n >= -16) (* 5 bits *)
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let word_addressed = false
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(* Calling conventions *)
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let calling_conventions first_int last_int first_float last_float make_stack
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arg =
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let loc = Array.create (Array.length arg) Reg.dummy in
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let int = ref first_int in
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let float = ref first_float in
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let ofs = ref 0 in
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for i = 0 to Array.length arg - 1 do
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match arg.(i).typ with
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Int | Addr as ty ->
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if !int >= last_int then begin
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loc.(i) <- phys_reg !int;
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decr int
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end else begin
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ofs := !ofs + size_int;
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loc.(i) <- stack_slot (make_stack !ofs) ty
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end
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| Float ->
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if !float <= last_float then begin
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loc.(i) <- phys_reg !float;
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incr float
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end else begin
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ofs := Misc.align (!ofs + size_float) 8;
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loc.(i) <- stack_slot (make_stack !ofs) Float
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end
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done;
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(loc, Misc.align !ofs 8) (* Keep stack 8-aligned *)
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let incoming ofs = Incoming ofs
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let outgoing ofs = Outgoing ofs
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let not_supported ofs = fatal_error "Proc.loc_results: cannot call"
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(* Arguments and results: %r26-%r19, %fr4-%fr11. *)
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let loc_arguments arg =
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calling_conventions 20 13 100 107 outgoing arg
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let loc_parameters arg =
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let (loc, ofs) = calling_conventions 20 13 100 107 incoming arg in loc
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let loc_results res =
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let (loc, ofs) = calling_conventions 20 13 100 107 not_supported res in loc
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(* Calling C functions:
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when all arguments are integers, use %r26 - %r23,
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then -52(%r30), -56(%r30), etc.
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When some arguments are floats, we handle a couple of cases by hand
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and fail otherwise. *)
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let loc_external_arguments arg =
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match List.map register_class (Array.to_list arg) with
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[1] -> ([| phys_reg 101 |], 56) (* %fr5 *)
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| [1; 1] -> ([| phys_reg 101; phys_reg 103 |], 56) (* %fr5, %fr7 *)
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| [1; 0] -> ([| phys_reg 101; phys_reg 18 |], 56) (* %fr5, %r24 *)
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| [0; 1] -> ([| phys_reg 20; phys_reg 103 |], 56) (* %r26, %fr7 *)
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| _ ->
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let loc = Array.create (Array.length arg) Reg.dummy in
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let int = ref 20 in
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let ofs = ref 48 in
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for i = 0 to Array.length arg - 1 do
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match arg.(i).typ with
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Int | Addr as ty ->
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if !int >= 17 then begin
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loc.(i) <- phys_reg (!int);
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decr int
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end else begin
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ofs := !ofs + 4;
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loc.(i) <- stack_slot (Outgoing !ofs) ty
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end
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| Float ->
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fatal_error "Proc.external_calling_conventions: cannot call"
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done;
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(loc, Misc.align !ofs 8)
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let extcall_use_push = false
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let loc_external_results res =
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let (loc, ofs) = calling_conventions 21 21 100 100 not_supported res in loc
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let loc_exn_bucket = phys_reg 20 (* %r26 *)
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(* Registers destroyed by operations *)
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let destroyed_at_c_call = (* %r3 - %r18, %fr12 - %fr21 preserved *)
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Array.of_list(List.map phys_reg
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[13;14;15;16;17;18;19;20;21;22;
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100;101;102;103;104;105;106;107;118;119;120;121;122;123;124;125;126])
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let destroyed_by_millicode = (* %r25, %r26, %r28, %r29 -- more? *)
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[| phys_reg 19; phys_reg 20; phys_reg 21; phys_reg 22 |]
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let destroyed_at_oper = function
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Iop(Icall_ind | Icall_imm _ | Iextcall(_, true)) -> all_phys_regs
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| Iop(Iextcall(_, false)) -> destroyed_at_c_call
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| Iop(Iintop(Idiv | Imod)) -> destroyed_by_millicode
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| _ -> [||]
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let destroyed_at_raise = all_phys_regs
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(* Maximal register pressure *)
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let safe_register_pressure = function
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Iextcall(_, _) -> 16
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| Iintop(Idiv | Imod) -> 19
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| _ -> 23
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let max_register_pressure = function
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Iextcall(_, _) -> [| 16; 19 |]
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| Iintop(Idiv | Imod) -> [| 19; 27 |]
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| _ -> [| 23; 27 |]
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(* Reloading *)
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let reload_test makereg round tst args = raise Use_default
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let reload_operation makereg round op args res = raise Use_default
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(* Latencies (in cycles). Roughly based on the ``Mustang'' chips. *)
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let need_scheduling = true
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let oper_latency = function
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Ireload -> 2
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| Iload(_, _) -> 2
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| Iconst_float _ -> 2 (* turned into a load *)
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| Iintop Imul -> 2 (* ends up with a load *)
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| Iaddf | Isubf | Imulf -> 3
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| Idivf -> 12
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| _ -> 1
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(* Layout of the stack *)
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let num_stack_slots = [| 0; 0 |]
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let contains_calls = ref false
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(* Calling the assembler *)
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let assemble_file infile outfile =
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if Config.system = "hpux"
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(* Use the GNU assembler, since /bin/as is too buggy *)
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then Sys.command ("gcc -c -o " ^ outfile ^ " " ^ infile)
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else Sys.command ("as -o " ^ outfile ^ " " ^ infile)
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