64 lines
2.3 KiB
OCaml
64 lines
2.3 KiB
OCaml
(**************************************************************************)
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(* *)
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(* OCaml *)
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(* *)
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(* Xavier Leroy, projet Gallium, INRIA Rocquencourt *)
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(* Bill O'Farrell, IBM *)
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(* *)
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(* Copyright 2015 Institut National de Recherche en Informatique et *)
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(* en Automatique. *)
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(* Copyright 2015 IBM (Bill O'Farrell with help from Tristan Amini). *)
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(* *)
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(* All rights reserved. This file is distributed under the terms of *)
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(* the GNU Lesser General Public License version 2.1, with the *)
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(* special exception on linking described in the file LICENSE. *)
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(* *)
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(**************************************************************************)
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(* Instruction scheduling for the Z processor *)
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open Arch
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open Mach
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(* The z10 processor is in-order, dual-issue. It could benefit from some
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basic-block scheduling, although precise latency information
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is not available.
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The z196 and later are out-of-order processors. Basic-block
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scheduling probably makes no difference. *)
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class scheduler = object
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inherit Schedgen.scheduler_generic
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(* Latencies (in cycles). Wild guesses. We multiply all latencies by 2
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to favor dual-issue. *)
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method oper_latency = function
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Ireload -> 4
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| Iload(_, _) -> 4
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| Iconst_float _ -> 4 (* turned into a load *)
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| Iintop(Imul) -> 10
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| Iintop_imm(Imul, _) -> 10
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| Iaddf | Isubf | Imulf -> 8
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| Idivf -> 40
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| Ispecific(Imultaddf | Imultsubf) -> 8
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| _ -> 2
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method! reload_retaddr_latency = 4
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(* Issue cycles. Rough approximations. *)
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method oper_issue_cycles = function
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| Ialloc _ -> 4
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| Iintop(Imulh) -> 15
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| Iintop(Idiv|Imod) -> 20
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| Iintop(Icomp _) -> 4
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| Iintop_imm(Icomp _, _) -> 4
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| _ -> 1
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method! reload_retaddr_issue_cycles = 1
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end
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let fundecl f = (new scheduler)#schedule_fundecl f
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